You've already forked linux-apfs
mirror of
https://github.com/linux-apfs/linux-apfs.git
synced 2026-05-01 15:00:59 -07:00
Merge remote branch 'acme/perf/urgent' into perf/core
Fixups due to rename of event_t routines from event__ to perf_event__ done in perf/core. Conflicts: tools/perf/builtin-record.c tools/perf/builtin-top.c tools/perf/util/event.c tools/perf/util/event.h Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
@@ -1,7 +1,7 @@
|
||||
VERSION = 2
|
||||
PATCHLEVEL = 6
|
||||
SUBLEVEL = 38
|
||||
EXTRAVERSION = -rc3
|
||||
EXTRAVERSION = -rc4
|
||||
NAME = Flesh-Eating Bats with Fangs
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
||||
@@ -838,7 +838,7 @@ EXPORT_SYMBOL(ep93xx_i2s_release);
|
||||
static struct resource ep93xx_ac97_resources[] = {
|
||||
{
|
||||
.start = EP93XX_AAC_PHYS_BASE,
|
||||
.end = EP93XX_AAC_PHYS_BASE + 0xb0 - 1,
|
||||
.end = EP93XX_AAC_PHYS_BASE + 0xac - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
|
||||
@@ -180,7 +180,7 @@ static const uint32_t mx25pdk_keymap[] = {
|
||||
KEY(3, 3, KEY_POWER),
|
||||
};
|
||||
|
||||
static const struct matrix_keymap_data mx25pdk_keymap_data __initdata = {
|
||||
static const struct matrix_keymap_data mx25pdk_keymap_data __initconst = {
|
||||
.keymap = mx25pdk_keymap,
|
||||
.keymap_size = ARRAY_SIZE(mx25pdk_keymap),
|
||||
};
|
||||
|
||||
@@ -304,7 +304,7 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \
|
||||
reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \
|
||||
reg &= ~BM_CLKCTRL_##dr##_DIV; \
|
||||
reg |= div << BP_CLKCTRL_##dr##_DIV; \
|
||||
if (reg | (1 << clk->enable_shift)) { \
|
||||
if (reg & (1 << clk->enable_shift)) { \
|
||||
pr_err("%s: clock is gated\n", __func__); \
|
||||
return -EINVAL; \
|
||||
} \
|
||||
@@ -347,7 +347,7 @@ static int name##_set_parent(struct clk *clk, struct clk *parent) \
|
||||
{ \
|
||||
if (parent != clk->parent) { \
|
||||
__raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \
|
||||
HW_CLKCTRL_CLKSEQ_TOG); \
|
||||
CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ_TOG); \
|
||||
clk->parent = parent; \
|
||||
} \
|
||||
\
|
||||
|
||||
@@ -355,12 +355,12 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \
|
||||
} else { \
|
||||
reg &= ~BM_CLKCTRL_##dr##_DIV; \
|
||||
reg |= div << BP_CLKCTRL_##dr##_DIV; \
|
||||
if (reg | (1 << clk->enable_shift)) { \
|
||||
if (reg & (1 << clk->enable_shift)) { \
|
||||
pr_err("%s: clock is gated\n", __func__); \
|
||||
return -EINVAL; \
|
||||
} \
|
||||
} \
|
||||
__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU); \
|
||||
__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##dr); \
|
||||
\
|
||||
for (i = 10000; i; i--) \
|
||||
if (!(__raw_readl(CLKCTRL_BASE_ADDR + \
|
||||
@@ -483,7 +483,7 @@ static int name##_set_parent(struct clk *clk, struct clk *parent) \
|
||||
{ \
|
||||
if (parent != clk->parent) { \
|
||||
__raw_writel(BM_CLKCTRL_CLKSEQ_BYPASS_##bit, \
|
||||
HW_CLKCTRL_CLKSEQ_TOG); \
|
||||
CLKCTRL_BASE_ADDR + HW_CLKCTRL_CLKSEQ_TOG); \
|
||||
clk->parent = parent; \
|
||||
} \
|
||||
\
|
||||
@@ -609,7 +609,6 @@ static struct clk_lookup lookups[] = {
|
||||
_REGISTER_CLOCK("duart", NULL, uart_clk)
|
||||
_REGISTER_CLOCK("imx28-fec.0", NULL, fec_clk)
|
||||
_REGISTER_CLOCK("imx28-fec.1", NULL, fec_clk)
|
||||
_REGISTER_CLOCK("fec.0", NULL, fec_clk)
|
||||
_REGISTER_CLOCK("rtc", NULL, rtc_clk)
|
||||
_REGISTER_CLOCK("pll2", NULL, pll2_clk)
|
||||
_REGISTER_CLOCK(NULL, "hclk", hbus_clk)
|
||||
|
||||
@@ -57,7 +57,6 @@ static void __clk_disable(struct clk *clk)
|
||||
if (clk->disable)
|
||||
clk->disable(clk);
|
||||
__clk_disable(clk->parent);
|
||||
__clk_disable(clk->secondary);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -68,7 +67,6 @@ static int __clk_enable(struct clk *clk)
|
||||
|
||||
if (clk->usecount++ == 0) {
|
||||
__clk_enable(clk->parent);
|
||||
__clk_enable(clk->secondary);
|
||||
|
||||
if (clk->enable)
|
||||
clk->enable(clk);
|
||||
|
||||
@@ -139,6 +139,8 @@ static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc)
|
||||
struct mxs_gpio_port *port = (struct mxs_gpio_port *)get_irq_data(irq);
|
||||
u32 gpio_irq_no_base = port->virtual_irq_start;
|
||||
|
||||
desc->irq_data.chip->irq_ack(&desc->irq_data);
|
||||
|
||||
irq_stat = __raw_readl(port->base + PINCTRL_IRQSTAT(port->id)) &
|
||||
__raw_readl(port->base + PINCTRL_IRQEN(port->id));
|
||||
|
||||
|
||||
@@ -29,8 +29,6 @@ struct clk {
|
||||
int id;
|
||||
/* Source clock this clk depends on */
|
||||
struct clk *parent;
|
||||
/* Secondary clock to enable/disable with this clock */
|
||||
struct clk *secondary;
|
||||
/* Reference count of clock enable/disable */
|
||||
__s8 usecount;
|
||||
/* Register bit position for clock's enable/disable control. */
|
||||
|
||||
@@ -37,7 +37,7 @@ int omap_lcd_dma_running(void)
|
||||
* On OMAP1510, internal LCD controller will start the transfer
|
||||
* when it gets enabled, so assume DMA running if LCD enabled.
|
||||
*/
|
||||
if (cpu_is_omap1510())
|
||||
if (cpu_is_omap15xx())
|
||||
if (omap_readw(OMAP_LCDC_CONTROL) & OMAP_LCDC_CTRL_LCD_EN)
|
||||
return 1;
|
||||
|
||||
@@ -95,7 +95,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_single_transfer);
|
||||
|
||||
void omap_set_lcd_dma_b1_rotation(int rotate)
|
||||
{
|
||||
if (cpu_is_omap1510()) {
|
||||
if (cpu_is_omap15xx()) {
|
||||
printk(KERN_ERR "DMA rotation is not supported in 1510 mode\n");
|
||||
BUG();
|
||||
return;
|
||||
@@ -106,7 +106,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_rotation);
|
||||
|
||||
void omap_set_lcd_dma_b1_mirror(int mirror)
|
||||
{
|
||||
if (cpu_is_omap1510()) {
|
||||
if (cpu_is_omap15xx()) {
|
||||
printk(KERN_ERR "DMA mirror is not supported in 1510 mode\n");
|
||||
BUG();
|
||||
}
|
||||
@@ -116,7 +116,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_mirror);
|
||||
|
||||
void omap_set_lcd_dma_b1_vxres(unsigned long vxres)
|
||||
{
|
||||
if (cpu_is_omap1510()) {
|
||||
if (cpu_is_omap15xx()) {
|
||||
printk(KERN_ERR "DMA virtual resulotion is not supported "
|
||||
"in 1510 mode\n");
|
||||
BUG();
|
||||
@@ -127,7 +127,7 @@ EXPORT_SYMBOL(omap_set_lcd_dma_b1_vxres);
|
||||
|
||||
void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale)
|
||||
{
|
||||
if (cpu_is_omap1510()) {
|
||||
if (cpu_is_omap15xx()) {
|
||||
printk(KERN_ERR "DMA scale is not supported in 1510 mode\n");
|
||||
BUG();
|
||||
}
|
||||
@@ -177,7 +177,7 @@ static void set_b1_regs(void)
|
||||
bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
|
||||
/* 1510 DMA requires the bottom address to be 2 more
|
||||
* than the actual last memory access location. */
|
||||
if (cpu_is_omap1510() &&
|
||||
if (cpu_is_omap15xx() &&
|
||||
lcd_dma.data_type == OMAP_DMA_DATA_TYPE_S32)
|
||||
bottom += 2;
|
||||
ei = PIXSTEP(0, 0, 1, 0);
|
||||
@@ -241,7 +241,7 @@ static void set_b1_regs(void)
|
||||
return; /* Suppress warning about uninitialized vars */
|
||||
}
|
||||
|
||||
if (cpu_is_omap1510()) {
|
||||
if (cpu_is_omap15xx()) {
|
||||
omap_writew(top >> 16, OMAP1510_DMA_LCD_TOP_F1_U);
|
||||
omap_writew(top, OMAP1510_DMA_LCD_TOP_F1_L);
|
||||
omap_writew(bottom >> 16, OMAP1510_DMA_LCD_BOT_F1_U);
|
||||
@@ -343,7 +343,7 @@ void omap_free_lcd_dma(void)
|
||||
BUG();
|
||||
return;
|
||||
}
|
||||
if (!cpu_is_omap1510())
|
||||
if (!cpu_is_omap15xx())
|
||||
omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~1,
|
||||
OMAP1610_DMA_LCD_CCR);
|
||||
lcd_dma.reserved = 0;
|
||||
@@ -360,7 +360,7 @@ void omap_enable_lcd_dma(void)
|
||||
* connected. Otherwise the OMAP internal controller will
|
||||
* start the transfer when it gets enabled.
|
||||
*/
|
||||
if (cpu_is_omap1510() || !lcd_dma.ext_ctrl)
|
||||
if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
|
||||
return;
|
||||
|
||||
w = omap_readw(OMAP1610_DMA_LCD_CTRL);
|
||||
@@ -378,14 +378,14 @@ EXPORT_SYMBOL(omap_enable_lcd_dma);
|
||||
void omap_setup_lcd_dma(void)
|
||||
{
|
||||
BUG_ON(lcd_dma.active);
|
||||
if (!cpu_is_omap1510()) {
|
||||
if (!cpu_is_omap15xx()) {
|
||||
/* Set some reasonable defaults */
|
||||
omap_writew(0x5440, OMAP1610_DMA_LCD_CCR);
|
||||
omap_writew(0x9102, OMAP1610_DMA_LCD_CSDP);
|
||||
omap_writew(0x0004, OMAP1610_DMA_LCD_LCH_CTRL);
|
||||
}
|
||||
set_b1_regs();
|
||||
if (!cpu_is_omap1510()) {
|
||||
if (!cpu_is_omap15xx()) {
|
||||
u16 w;
|
||||
|
||||
w = omap_readw(OMAP1610_DMA_LCD_CCR);
|
||||
@@ -407,7 +407,7 @@ void omap_stop_lcd_dma(void)
|
||||
u16 w;
|
||||
|
||||
lcd_dma.active = 0;
|
||||
if (cpu_is_omap1510() || !lcd_dma.ext_ctrl)
|
||||
if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
|
||||
return;
|
||||
|
||||
w = omap_readw(OMAP1610_DMA_LCD_CCR);
|
||||
|
||||
@@ -44,7 +44,6 @@
|
||||
#include <linux/clocksource.h>
|
||||
#include <linux/clockchips.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/sched.h>
|
||||
|
||||
#include <asm/system.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
@@ -115,9 +115,6 @@ static struct omap2_hsmmc_info mmc[] = {
|
||||
|
||||
static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev)
|
||||
{
|
||||
twl_i2c_write_u8(TWL4030_MODULE_GPIO, 0x80, REG_GPIODATADIR1);
|
||||
twl_i2c_write_u8(TWL4030_MODULE_LED, 0x0, 0x0);
|
||||
|
||||
if (gpio_is_valid(dssdev->reset_gpio))
|
||||
gpio_set_value_cansleep(dssdev->reset_gpio, 1);
|
||||
return 0;
|
||||
@@ -247,6 +244,8 @@ static struct gpio_led gpio_leds[];
|
||||
static int devkit8000_twl_gpio_setup(struct device *dev,
|
||||
unsigned gpio, unsigned ngpio)
|
||||
{
|
||||
int ret;
|
||||
|
||||
omap_mux_init_gpio(29, OMAP_PIN_INPUT);
|
||||
/* gpio + 0 is "mmc0_cd" (input/IRQ) */
|
||||
mmc[0].gpio_cd = gpio + 0;
|
||||
@@ -255,17 +254,23 @@ static int devkit8000_twl_gpio_setup(struct device *dev,
|
||||
/* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
|
||||
gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
|
||||
|
||||
/* gpio + 1 is "LCD_PWREN" (out, active high) */
|
||||
devkit8000_lcd_device.reset_gpio = gpio + 1;
|
||||
gpio_request(devkit8000_lcd_device.reset_gpio, "LCD_PWREN");
|
||||
/* Disable until needed */
|
||||
gpio_direction_output(devkit8000_lcd_device.reset_gpio, 0);
|
||||
/* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */
|
||||
devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0;
|
||||
ret = gpio_request_one(devkit8000_lcd_device.reset_gpio,
|
||||
GPIOF_DIR_OUT | GPIOF_INIT_LOW, "LCD_PWREN");
|
||||
if (ret < 0) {
|
||||
devkit8000_lcd_device.reset_gpio = -EINVAL;
|
||||
printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n");
|
||||
}
|
||||
|
||||
/* gpio + 7 is "DVI_PD" (out, active low) */
|
||||
devkit8000_dvi_device.reset_gpio = gpio + 7;
|
||||
gpio_request(devkit8000_dvi_device.reset_gpio, "DVI PowerDown");
|
||||
/* Disable until needed */
|
||||
gpio_direction_output(devkit8000_dvi_device.reset_gpio, 0);
|
||||
ret = gpio_request_one(devkit8000_dvi_device.reset_gpio,
|
||||
GPIOF_DIR_OUT | GPIOF_INIT_LOW, "DVI PowerDown");
|
||||
if (ret < 0) {
|
||||
devkit8000_dvi_device.reset_gpio = -EINVAL;
|
||||
printk(KERN_ERR "Failed to request GPIO for DVI PowerDown\n");
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -409,8 +409,6 @@ static void __init omap4_panda_init(void)
|
||||
platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices));
|
||||
omap_serial_init();
|
||||
omap4_twl6030_hsmmc_init(mmc);
|
||||
/* OMAP4 Panda uses internal transceiver so register nop transceiver */
|
||||
usb_nop_xceiv_register();
|
||||
omap4_ehci_init();
|
||||
usb_musb_init(&musb_board_data);
|
||||
}
|
||||
|
||||
@@ -40,9 +40,6 @@ static struct regulator_consumer_supply rm680_vemmc_consumers[] = {
|
||||
static struct regulator_init_data rm680_vemmc = {
|
||||
.constraints = {
|
||||
.name = "rm680_vemmc",
|
||||
.min_uV = 2900000,
|
||||
.max_uV = 2900000,
|
||||
.apply_uV = 1,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS
|
||||
|
||||
@@ -1000,6 +1000,7 @@ int __init omap_mux_init(const char *name, u32 flags,
|
||||
if (!partition->base) {
|
||||
pr_err("%s: Could not ioremap mux partition at 0x%08x\n",
|
||||
__func__, partition->phys);
|
||||
kfree(partition);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
|
||||
@@ -168,9 +168,10 @@ static void omap3_core_restore_context(void)
|
||||
* once during boot sequence, but this works as we are not using secure
|
||||
* services.
|
||||
*/
|
||||
static void omap3_save_secure_ram_context(u32 target_mpu_state)
|
||||
static void omap3_save_secure_ram_context(void)
|
||||
{
|
||||
u32 ret;
|
||||
int mpu_next_state = pwrdm_read_next_pwrst(mpu_pwrdm);
|
||||
|
||||
if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
|
||||
/*
|
||||
@@ -181,7 +182,7 @@ static void omap3_save_secure_ram_context(u32 target_mpu_state)
|
||||
pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
|
||||
ret = _omap_save_secure_sram((u32 *)
|
||||
__pa(omap3_secure_ram_storage));
|
||||
pwrdm_set_next_pwrst(mpu_pwrdm, target_mpu_state);
|
||||
pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state);
|
||||
/* Following is for error tracking, it should not happen */
|
||||
if (ret) {
|
||||
printk(KERN_ERR "save_secure_sram() returns %08x\n",
|
||||
@@ -1094,7 +1095,7 @@ static int __init omap3_pm_init(void)
|
||||
local_fiq_disable();
|
||||
|
||||
omap_dma_global_context_save();
|
||||
omap3_save_secure_ram_context(PWRDM_POWER_ON);
|
||||
omap3_save_secure_ram_context();
|
||||
omap_dma_global_context_restore();
|
||||
|
||||
local_irq_enable();
|
||||
|
||||
@@ -780,8 +780,7 @@ static int omap_sr_autocomp_show(void *data, u64 *val)
|
||||
struct omap_sr *sr_info = (struct omap_sr *) data;
|
||||
|
||||
if (!sr_info) {
|
||||
pr_warning("%s: omap_sr struct for sr_%s not found\n",
|
||||
__func__, sr_info->voltdm->name);
|
||||
pr_warning("%s: omap_sr struct not found\n", __func__);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
@@ -795,8 +794,7 @@ static int omap_sr_autocomp_store(void *data, u64 val)
|
||||
struct omap_sr *sr_info = (struct omap_sr *) data;
|
||||
|
||||
if (!sr_info) {
|
||||
pr_warning("%s: omap_sr struct for sr_%s not found\n",
|
||||
__func__, sr_info->voltdm->name);
|
||||
pr_warning("%s: omap_sr struct not found\n", __func__);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
@@ -834,7 +832,8 @@ static int __init omap_sr_probe(struct platform_device *pdev)
|
||||
|
||||
if (!pdata) {
|
||||
dev_err(&pdev->dev, "%s: platform data missing\n", __func__);
|
||||
return -EINVAL;
|
||||
ret = -EINVAL;
|
||||
goto err_free_devinfo;
|
||||
}
|
||||
|
||||
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
@@ -966,7 +965,7 @@ static int __devexit omap_sr_remove(struct platform_device *pdev)
|
||||
}
|
||||
|
||||
sr_info = _sr_lookup(pdata->voltdm);
|
||||
if (!sr_info) {
|
||||
if (IS_ERR(sr_info)) {
|
||||
dev_warn(&pdev->dev, "%s: omap_sr struct not found\n",
|
||||
__func__);
|
||||
return -EINVAL;
|
||||
|
||||
@@ -471,6 +471,7 @@ static void __init vdd_debugfs_init(struct omap_vdd_info *vdd)
|
||||
strcat(name, vdd->voltdm.name);
|
||||
|
||||
vdd->debug_dir = debugfs_create_dir(name, voltage_dir);
|
||||
kfree(name);
|
||||
if (IS_ERR(vdd->debug_dir)) {
|
||||
pr_warning("%s: Unable to create debugfs directory for"
|
||||
" vdd_%s\n", __func__, vdd->voltdm.name);
|
||||
|
||||
@@ -95,6 +95,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
|
||||
case MACH_TYPE_MX35_3DS:
|
||||
case MACH_TYPE_PCM043:
|
||||
case MACH_TYPE_LILLY1131:
|
||||
case MACH_TYPE_VPR200:
|
||||
uart_base = MX3X_UART1_BASE_ADDR;
|
||||
break;
|
||||
case MACH_TYPE_MAGX_ZN5:
|
||||
@@ -102,6 +103,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id)
|
||||
break;
|
||||
case MACH_TYPE_MX51_BABBAGE:
|
||||
case MACH_TYPE_EUKREA_CPUIMX51SD:
|
||||
case MACH_TYPE_MX51_3DS:
|
||||
uart_base = MX51_UART1_BASE_ADDR;
|
||||
break;
|
||||
case MACH_TYPE_MX50_RDP:
|
||||
|
||||
+101
-4
@@ -12,7 +12,7 @@
|
||||
#
|
||||
# http://www.arm.linux.org.uk/developer/machines/?action=new
|
||||
#
|
||||
# Last update: Sun Dec 12 23:24:27 2010
|
||||
# Last update: Mon Feb 7 08:59:27 2011
|
||||
#
|
||||
# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
|
||||
#
|
||||
@@ -2240,7 +2240,7 @@ arm_ultimator2 MACH_ARM_ULTIMATOR2 ARM_ULTIMATOR2 2250
|
||||
vs_v210 MACH_VS_V210 VS_V210 2252
|
||||
vs_v212 MACH_VS_V212 VS_V212 2253
|
||||
hmt MACH_HMT HMT 2254
|
||||
suen3 MACH_SUEN3 SUEN3 2255
|
||||
km_kirkwood MACH_KM_KIRKWOOD KM_KIRKWOOD 2255
|
||||
vesper MACH_VESPER VESPER 2256
|
||||
str9 MACH_STR9 STR9 2257
|
||||
omap3_wl_ff MACH_OMAP3_WL_FF OMAP3_WL_FF 2258
|
||||
@@ -2987,7 +2987,7 @@ pxwnas_500_1000 MACH_PXWNAS_500_1000 PXWNAS_500_1000 3001
|
||||
ea20 MACH_EA20 EA20 3002
|
||||
awm2 MACH_AWM2 AWM2 3003
|
||||
ti8148evm MACH_TI8148EVM TI8148EVM 3004
|
||||
tegra_seaboard MACH_TEGRA_SEABOARD TEGRA_SEABOARD 3005
|
||||
seaboard MACH_SEABOARD SEABOARD 3005
|
||||
linkstation_chlv2 MACH_LINKSTATION_CHLV2 LINKSTATION_CHLV2 3006
|
||||
tera_pro2_rack MACH_TERA_PRO2_RACK TERA_PRO2_RACK 3007
|
||||
rubys MACH_RUBYS RUBYS 3008
|
||||
@@ -3190,7 +3190,7 @@ synergy MACH_SYNERGY SYNERGY 3205
|
||||
ics_if_voip MACH_ICS_IF_VOIP ICS_IF_VOIP 3206
|
||||
wlf_cragg_6410 MACH_WLF_CRAGG_6410 WLF_CRAGG_6410 3207
|
||||
punica MACH_PUNICA PUNICA 3208
|
||||
sbc_nt250 MACH_SBC_NT250 SBC_NT250 3209
|
||||
trimslice MACH_TRIMSLICE TRIMSLICE 3209
|
||||
mx27_wmultra MACH_MX27_WMULTRA MX27_WMULTRA 3210
|
||||
mackerel MACH_MACKEREL MACKEREL 3211
|
||||
fa9x27 MACH_FA9X27 FA9X27 3213
|
||||
@@ -3219,3 +3219,100 @@ pivicc MACH_PIVICC PIVICC 3235
|
||||
pcm048 MACH_PCM048 PCM048 3236
|
||||
dds MACH_DDS DDS 3237
|
||||
chalten_xa1 MACH_CHALTEN_XA1 CHALTEN_XA1 3238
|
||||
ts48xx MACH_TS48XX TS48XX 3239
|
||||
tonga2_tfttimer MACH_TONGA2_TFTTIMER TONGA2_TFTTIMER 3240
|
||||
whistler MACH_WHISTLER WHISTLER 3241
|
||||
asl_phoenix MACH_ASL_PHOENIX ASL_PHOENIX 3242
|
||||
at91sam9263otlite MACH_AT91SAM9263OTLITE AT91SAM9263OTLITE 3243
|
||||
ddplug MACH_DDPLUG DDPLUG 3244
|
||||
d2plug MACH_D2PLUG D2PLUG 3245
|
||||
kzm9d MACH_KZM9D KZM9D 3246
|
||||
verdi_lte MACH_VERDI_LTE VERDI_LTE 3247
|
||||
nanozoom MACH_NANOZOOM NANOZOOM 3248
|
||||
dm3730_som_lv MACH_DM3730_SOM_LV DM3730_SOM_LV 3249
|
||||
dm3730_torpedo MACH_DM3730_TORPEDO DM3730_TORPEDO 3250
|
||||
anchovy MACH_ANCHOVY ANCHOVY 3251
|
||||
re2rev20 MACH_RE2REV20 RE2REV20 3253
|
||||
re2rev21 MACH_RE2REV21 RE2REV21 3254
|
||||
cns21xx MACH_CNS21XX CNS21XX 3255
|
||||
rider MACH_RIDER RIDER 3257
|
||||
nsk330 MACH_NSK330 NSK330 3258
|
||||
cns2133evb MACH_CNS2133EVB CNS2133EVB 3259
|
||||
z3_816x_mod MACH_Z3_816X_MOD Z3_816X_MOD 3260
|
||||
z3_814x_mod MACH_Z3_814X_MOD Z3_814X_MOD 3261
|
||||
beect MACH_BEECT BEECT 3262
|
||||
dma_thunderbug MACH_DMA_THUNDERBUG DMA_THUNDERBUG 3263
|
||||
omn_at91sam9g20 MACH_OMN_AT91SAM9G20 OMN_AT91SAM9G20 3264
|
||||
mx25_e2s_uc MACH_MX25_E2S_UC MX25_E2S_UC 3265
|
||||
mione MACH_MIONE MIONE 3266
|
||||
top9000_tcu MACH_TOP9000_TCU TOP9000_TCU 3267
|
||||
top9000_bsl MACH_TOP9000_BSL TOP9000_BSL 3268
|
||||
kingdom MACH_KINGDOM KINGDOM 3269
|
||||
armadillo460 MACH_ARMADILLO460 ARMADILLO460 3270
|
||||
lq2 MACH_LQ2 LQ2 3271
|
||||
sweda_tms2 MACH_SWEDA_TMS2 SWEDA_TMS2 3272
|
||||
mx53_loco MACH_MX53_LOCO MX53_LOCO 3273
|
||||
acer_a8 MACH_ACER_A8 ACER_A8 3275
|
||||
acer_gauguin MACH_ACER_GAUGUIN ACER_GAUGUIN 3276
|
||||
guppy MACH_GUPPY GUPPY 3277
|
||||
mx61_ard MACH_MX61_ARD MX61_ARD 3278
|
||||
tx53 MACH_TX53 TX53 3279
|
||||
omapl138_case_a3 MACH_OMAPL138_CASE_A3 OMAPL138_CASE_A3 3280
|
||||
uemd MACH_UEMD UEMD 3281
|
||||
ccwmx51mut MACH_CCWMX51MUT CCWMX51MUT 3282
|
||||
rockhopper MACH_ROCKHOPPER ROCKHOPPER 3283
|
||||
nookcolor MACH_NOOKCOLOR NOOKCOLOR 3284
|
||||
hkdkc100 MACH_HKDKC100 HKDKC100 3285
|
||||
ts42xx MACH_TS42XX TS42XX 3286
|
||||
aebl MACH_AEBL AEBL 3287
|
||||
wario MACH_WARIO WARIO 3288
|
||||
gfs_spm MACH_GFS_SPM GFS_SPM 3289
|
||||
cm_t3730 MACH_CM_T3730 CM_T3730 3290
|
||||
isc3 MACH_ISC3 ISC3 3291
|
||||
rascal MACH_RASCAL RASCAL 3292
|
||||
hrefv60 MACH_HREFV60 HREFV60 3293
|
||||
tpt_2_0 MACH_TPT_2_0 TPT_2_0 3294
|
||||
pyramid_td MACH_PYRAMID_TD PYRAMID_TD 3295
|
||||
splendor MACH_SPLENDOR SPLENDOR 3296
|
||||
guf_planet MACH_GUF_PLANET GUF_PLANET 3297
|
||||
msm8x60_qt MACH_MSM8X60_QT MSM8X60_QT 3298
|
||||
htc_hd_mini MACH_HTC_HD_MINI HTC_HD_MINI 3299
|
||||
athene MACH_ATHENE ATHENE 3300
|
||||
deep_r_ek_1 MACH_DEEP_R_EK_1 DEEP_R_EK_1 3301
|
||||
vivow_ct MACH_VIVOW_CT VIVOW_CT 3302
|
||||
nery_1000 MACH_NERY_1000 NERY_1000 3303
|
||||
rfl109145_ssrv MACH_RFL109145_SSRV RFL109145_SSRV 3304
|
||||
nmh MACH_NMH NMH 3305
|
||||
wn802t MACH_WN802T WN802T 3306
|
||||
dragonet MACH_DRAGONET DRAGONET 3307
|
||||
geneva_b MACH_GENEVA_B GENEVA_B 3308
|
||||
at91sam9263desk16l MACH_AT91SAM9263DESK16L AT91SAM9263DESK16L 3309
|
||||
bcmhana_sv MACH_BCMHANA_SV BCMHANA_SV 3310
|
||||
bcmhana_tablet MACH_BCMHANA_TABLET BCMHANA_TABLET 3311
|
||||
koi MACH_KOI KOI 3312
|
||||
ts4800 MACH_TS4800 TS4800 3313
|
||||
tqma9263 MACH_TQMA9263 TQMA9263 3314
|
||||
holiday MACH_HOLIDAY HOLIDAY 3315
|
||||
dma_6410 MACH_DMA6410 DMA6410 3316
|
||||
pcats_overlay MACH_PCATS_OVERLAY PCATS_OVERLAY 3317
|
||||
hwgw6410 MACH_HWGW6410 HWGW6410 3318
|
||||
shenzhou MACH_SHENZHOU SHENZHOU 3319
|
||||
cwme9210 MACH_CWME9210 CWME9210 3320
|
||||
cwme9210js MACH_CWME9210JS CWME9210JS 3321
|
||||
pgs_v1 MACH_PGS_SITARA PGS_SITARA 3322
|
||||
colibri_tegra2 MACH_COLIBRI_TEGRA2 COLIBRI_TEGRA2 3323
|
||||
w21 MACH_W21 W21 3324
|
||||
polysat1 MACH_POLYSAT1 POLYSAT1 3325
|
||||
dataway MACH_DATAWAY DATAWAY 3326
|
||||
cobral138 MACH_COBRAL138 COBRAL138 3327
|
||||
roverpcs8 MACH_ROVERPCS8 ROVERPCS8 3328
|
||||
marvelc MACH_MARVELC MARVELC 3329
|
||||
navefihid MACH_NAVEFIHID NAVEFIHID 3330
|
||||
dm365_cv100 MACH_DM365_CV100 DM365_CV100 3331
|
||||
able MACH_ABLE ABLE 3332
|
||||
legacy MACH_LEGACY LEGACY 3333
|
||||
icong MACH_ICONG ICONG 3334
|
||||
rover_g8 MACH_ROVER_G8 ROVER_G8 3335
|
||||
t5388p MACH_T5388P T5388P 3336
|
||||
dingo MACH_DINGO DINGO 3337
|
||||
goflexhome MACH_GOFLEXHOME GOFLEXHOME 3338
|
||||
|
||||
@@ -40,8 +40,8 @@
|
||||
|
||||
/* MAS registers bit definitions */
|
||||
|
||||
#define MAS0_TLBSEL(x) ((x << 28) & 0x30000000)
|
||||
#define MAS0_ESEL(x) ((x << 16) & 0x0FFF0000)
|
||||
#define MAS0_TLBSEL(x) (((x) << 28) & 0x30000000)
|
||||
#define MAS0_ESEL(x) (((x) << 16) & 0x0FFF0000)
|
||||
#define MAS0_NV(x) ((x) & 0x00000FFF)
|
||||
#define MAS0_HES 0x00004000
|
||||
#define MAS0_WQ_ALLWAYS 0x00000000
|
||||
@@ -50,12 +50,12 @@
|
||||
|
||||
#define MAS1_VALID 0x80000000
|
||||
#define MAS1_IPROT 0x40000000
|
||||
#define MAS1_TID(x) ((x << 16) & 0x3FFF0000)
|
||||
#define MAS1_TID(x) (((x) << 16) & 0x3FFF0000)
|
||||
#define MAS1_IND 0x00002000
|
||||
#define MAS1_TS 0x00001000
|
||||
#define MAS1_TSIZE_MASK 0x00000f80
|
||||
#define MAS1_TSIZE_SHIFT 7
|
||||
#define MAS1_TSIZE(x) ((x << MAS1_TSIZE_SHIFT) & MAS1_TSIZE_MASK)
|
||||
#define MAS1_TSIZE(x) (((x) << MAS1_TSIZE_SHIFT) & MAS1_TSIZE_MASK)
|
||||
|
||||
#define MAS2_EPN 0xFFFFF000
|
||||
#define MAS2_X0 0x00000040
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user