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Merge branch 'davinci-next' into davinci-for-linus
Conflicts: arch/arm/mach-davinci/board-da830-evm.c arch/arm/mach-davinci/board-da850-evm.c
This commit is contained in:
Kevin Hilman
+2
-2
@@ -5303,8 +5303,8 @@ F: drivers/*/*s3c2410*
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F: drivers/*/*/*s3c2410*
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TI DAVINCI MACHINE SUPPORT
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P: Kevin Hilman
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M: davinci-linux-open-source@linux.davincidsp.com
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M: Kevin Hilman <khilman@deeprootsystems.com>
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L: davinci-linux-open-source@linux.davincidsp.com (subscribers-only)
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Q: http://patchwork.kernel.org/project/linux-davinci/list/
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S: Supported
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F: arch/arm/mach-davinci
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@@ -17,6 +17,8 @@ CONFIG_MODVERSIONS=y
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CONFIG_ARCH_DAVINCI=y
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CONFIG_ARCH_DAVINCI_DA830=y
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CONFIG_ARCH_DAVINCI_DA850=y
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CONFIG_MACH_MITYOMAPL138=y
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CONFIG_MACH_OMAPL138_HAWKBOARD=y
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CONFIG_DAVINCI_RESET_CLOCKS=y
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CONFIG_NO_HZ=y
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CONFIG_HIGH_RES_TIMERS=y
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@@ -79,6 +81,7 @@ CONFIG_I2C_DAVINCI=y
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# CONFIG_HWMON is not set
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CONFIG_WATCHDOG=y
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CONFIG_REGULATOR=y
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CONFIG_REGULATOR_DUMMY=y
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CONFIG_REGULATOR_TPS6507X=y
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CONFIG_FB=y
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CONFIG_FB_DA8XX=y
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@@ -20,23 +20,23 @@ config ARCH_DAVINCI_DM644x
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select ARCH_DAVINCI_DMx
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config ARCH_DAVINCI_DM355
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bool "DaVinci 355 based system"
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bool "DaVinci 355 based system"
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select AINTC
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select ARCH_DAVINCI_DMx
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config ARCH_DAVINCI_DM646x
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bool "DaVinci 646x based system"
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bool "DaVinci 646x based system"
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select AINTC
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select ARCH_DAVINCI_DMx
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config ARCH_DAVINCI_DA830
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bool "DA830/OMAP-L137 based system"
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bool "DA830/OMAP-L137/AM17x based system"
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select CP_INTC
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select ARCH_DAVINCI_DA8XX
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select CPU_DCACHE_WRITETHROUGH # needed on silicon revs 1.0, 1.1
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config ARCH_DAVINCI_DA850
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bool "DA850/OMAP-L138 based system"
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bool "DA850/OMAP-L138/AM18x based system"
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select CP_INTC
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select ARCH_DAVINCI_DA8XX
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select ARCH_HAS_CPUFREQ
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@@ -115,21 +115,21 @@ config MACH_DAVINCI_DM365_EVM
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for development is a DM365 EVM
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config MACH_DAVINCI_DA830_EVM
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bool "TI DA830/OMAP-L137 Reference Platform"
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bool "TI DA830/OMAP-L137/AM17x Reference Platform"
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default ARCH_DAVINCI_DA830
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depends on ARCH_DAVINCI_DA830
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select GPIO_PCF857X
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help
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Say Y here to select the TI DA830/OMAP-L137 Evaluation Module.
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Say Y here to select the TI DA830/OMAP-L137/AM17x Evaluation Module.
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choice
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prompt "Select DA830/OMAP-L137 UI board peripheral"
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prompt "Select DA830/OMAP-L137/AM17x UI board peripheral"
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depends on MACH_DAVINCI_DA830_EVM
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help
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The presence of UI card on the DA830/OMAP-L137 EVM is detected
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automatically based on successful probe of the I2C based GPIO
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expander on that board. This option selected in this menu has
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an effect only in case of a successful UI card detection.
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The presence of UI card on the DA830/OMAP-L137/AM17x EVM is
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detected automatically based on successful probe of the I2C
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based GPIO expander on that board. This option selected in this
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menu has an effect only in case of a successful UI card detection.
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config DA830_UI_LCD
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bool "LCD"
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@@ -140,23 +140,23 @@ config DA830_UI_LCD
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config DA830_UI_NAND
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bool "NAND flash"
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help
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Say Y here to use the NAND flash. Do not forget to setup
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Say Y here to use the NAND flash. Do not forget to setup
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the switch correctly.
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endchoice
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config MACH_DAVINCI_DA850_EVM
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bool "TI DA850/OMAP-L138 Reference Platform"
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bool "TI DA850/OMAP-L138/AM18x Reference Platform"
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default ARCH_DAVINCI_DA850
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depends on ARCH_DAVINCI_DA850
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select GPIO_PCA953X
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help
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Say Y here to select the TI DA850/OMAP-L138 Evaluation Module.
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Say Y here to select the TI DA850/OMAP-L138/AM18x Evaluation Module.
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choice
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prompt "Select peripherals connected to expander on UI board"
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depends on MACH_DAVINCI_DA850_EVM
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help
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The presence of User Interface (UI) card on the DA850/OMAP-L138
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The presence of User Interface (UI) card on the DA850/OMAP-L138/AM18x
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EVM is detected automatically based on successful probe of the I2C
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based GPIO expander on that card. This option selected in this
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menu has an effect only in case of a successful UI card detection.
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@@ -165,13 +165,13 @@ config DA850_UI_NONE
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bool "No peripheral is enabled"
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help
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Say Y if you do not want to enable any of the peripherals connected
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to TCA6416 expander on DA850/OMAP-L138 EVM UI card
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to TCA6416 expander on DA850/OMAP-L138/AM18x EVM UI card
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config DA850_UI_RMII
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bool "RMII Ethernet PHY"
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help
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Say Y if you want to use the RMII PHY on the DA850/OMAP-L138 EVM.
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This PHY is found on the UI daughter card that is supplied with
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Say Y if you want to use the RMII PHY on the DA850/OMAP-L138/AM18x
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EVM. This PHY is found on the UI daughter card that is supplied with
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the EVM.
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NOTE: Please take care while choosing this option, MII PHY will
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not be functional if RMII mode is selected.
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@@ -185,6 +185,22 @@ config MACH_TNETV107X
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help
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Say Y here to select the TI TNETV107X Evaluation Module.
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config MACH_MITYOMAPL138
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bool "Critical Link MityDSP-L138/MityARM-1808 SoM"
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depends on ARCH_DAVINCI_DA850
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help
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Say Y here to select the Critical Link MityDSP-L138/MityARM-1808
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System on Module. Information on this SoM may be found at
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http://www.mitydsp.com
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config MACH_OMAPL138_HAWKBOARD
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bool "TI AM1808 / OMAPL-138 Hawkboard platform"
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depends on ARCH_DAVINCI_DA850
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help
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Say Y here to select the TI AM1808 / OMAPL-138 Hawkboard platform .
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Information of this board may be found at
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http://www.hawkboard.org/
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config DAVINCI_MUX
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bool "DAVINCI multiplexing support"
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depends on ARCH_DAVINCI
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@@ -195,20 +211,20 @@ config DAVINCI_MUX
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say Y.
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config DAVINCI_MUX_DEBUG
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bool "Multiplexing debug output"
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depends on DAVINCI_MUX
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help
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Makes the multiplexing functions print out a lot of debug info.
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This is useful if you want to find out the correct values of the
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multiplexing registers.
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bool "Multiplexing debug output"
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depends on DAVINCI_MUX
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help
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Makes the multiplexing functions print out a lot of debug info.
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This is useful if you want to find out the correct values of the
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multiplexing registers.
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config DAVINCI_MUX_WARNINGS
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bool "Warn about pins the bootloader didn't set up"
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depends on DAVINCI_MUX
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help
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Choose Y here to warn whenever driver initialization logic needs
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to change the pin multiplexing setup. When there are no warnings
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printed, it's safe to deselect DAVINCI_MUX for your product.
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bool "Warn about pins the bootloader didn't set up"
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depends on DAVINCI_MUX
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help
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Choose Y here to warn whenever driver initialization logic needs
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to change the pin multiplexing setup. When there are no warnings
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printed, it's safe to deselect DAVINCI_MUX for your product.
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config DAVINCI_RESET_CLOCKS
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bool "Reset unused clocks during boot"
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@@ -5,7 +5,7 @@
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# Common objects
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obj-y := time.o clock.o serial.o io.o psc.o \
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gpio.o dma.o usb.o common.o sram.o
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gpio.o dma.o usb.o common.o sram.o aemif.o
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obj-$(CONFIG_DAVINCI_MUX) += mux.o
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@@ -33,6 +33,8 @@ obj-$(CONFIG_MACH_DAVINCI_DM365_EVM) += board-dm365-evm.o
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obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += board-da830-evm.o
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obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += board-da850-evm.o
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obj-$(CONFIG_MACH_TNETV107X) += board-tnetv107x-evm.o
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obj-$(CONFIG_MACH_MITYOMAPL138) += board-mityomapl138.o
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obj-$(CONFIG_MACH_OMAPL138_HAWKBOARD) += board-omapl138-hawk.o
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# Power Management
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obj-$(CONFIG_CPU_FREQ) += cpufreq.o
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@@ -0,0 +1,133 @@
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/*
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* AEMIF support for DaVinci SoCs
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*
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* Copyright (C) 2010 Texas Instruments Incorporated. http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/module.h>
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#include <linux/time.h>
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#include <mach/aemif.h>
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/* Timing value configuration */
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#define TA(x) ((x) << 2)
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#define RHOLD(x) ((x) << 4)
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#define RSTROBE(x) ((x) << 7)
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#define RSETUP(x) ((x) << 13)
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#define WHOLD(x) ((x) << 17)
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#define WSTROBE(x) ((x) << 20)
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#define WSETUP(x) ((x) << 26)
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#define TA_MAX 0x3
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#define RHOLD_MAX 0x7
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#define RSTROBE_MAX 0x3f
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#define RSETUP_MAX 0xf
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#define WHOLD_MAX 0x7
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#define WSTROBE_MAX 0x3f
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#define WSETUP_MAX 0xf
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#define TIMING_MASK (TA(TA_MAX) | \
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RHOLD(RHOLD_MAX) | \
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RSTROBE(RSTROBE_MAX) | \
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RSETUP(RSETUP_MAX) | \
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WHOLD(WHOLD_MAX) | \
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WSTROBE(WSTROBE_MAX) | \
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WSETUP(WSETUP_MAX))
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/*
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* aemif_calc_rate - calculate timing data.
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* @wanted: The cycle time needed in nanoseconds.
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* @clk: The input clock rate in kHz.
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* @max: The maximum divider value that can be programmed.
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*
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* On success, returns the calculated timing value minus 1 for easy
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* programming into AEMIF timing registers, else negative errno.
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*/
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static int aemif_calc_rate(int wanted, unsigned long clk, int max)
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{
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int result;
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result = DIV_ROUND_UP((wanted * clk), NSEC_PER_MSEC) - 1;
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pr_debug("%s: result %d from %ld, %d\n", __func__, result, clk, wanted);
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/* It is generally OK to have a more relaxed timing than requested... */
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if (result < 0)
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result = 0;
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/* ... But configuring tighter timings is not an option. */
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else if (result > max)
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result = -EINVAL;
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return result;
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}
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/**
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* davinci_aemif_setup_timing - setup timing values for a given AEMIF interface
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* @t: timing values to be progammed
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* @base: The virtual base address of the AEMIF interface
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* @cs: chip-select to program the timing values for
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*
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* This function programs the given timing values (in real clock) into the
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* AEMIF registers taking the AEMIF clock into account.
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*
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* This function does not use any locking while programming the AEMIF
|
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* because it is expected that there is only one user of a given
|
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* chip-select.
|
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*
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* Returns 0 on success, else negative errno.
|
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*/
|
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int davinci_aemif_setup_timing(struct davinci_aemif_timing *t,
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void __iomem *base, unsigned cs)
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{
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unsigned set, val;
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unsigned ta, rhold, rstrobe, rsetup, whold, wstrobe, wsetup;
|
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unsigned offset = A1CR_OFFSET + cs * 4;
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struct clk *aemif_clk;
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unsigned long clkrate;
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if (!t)
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return 0; /* Nothing to do */
|
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|
||||
aemif_clk = clk_get(NULL, "aemif");
|
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if (IS_ERR(aemif_clk))
|
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return PTR_ERR(aemif_clk);
|
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|
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clkrate = clk_get_rate(aemif_clk);
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||||
|
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clkrate /= 1000; /* turn clock into kHz for ease of use */
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|
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ta = aemif_calc_rate(t->ta, clkrate, TA_MAX);
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rhold = aemif_calc_rate(t->rhold, clkrate, RHOLD_MAX);
|
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rstrobe = aemif_calc_rate(t->rstrobe, clkrate, RSTROBE_MAX);
|
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rsetup = aemif_calc_rate(t->rsetup, clkrate, RSETUP_MAX);
|
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whold = aemif_calc_rate(t->whold, clkrate, WHOLD_MAX);
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wstrobe = aemif_calc_rate(t->wstrobe, clkrate, WSTROBE_MAX);
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wsetup = aemif_calc_rate(t->wsetup, clkrate, WSETUP_MAX);
|
||||
|
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if (ta < 0 || rhold < 0 || rstrobe < 0 || rsetup < 0 ||
|
||||
whold < 0 || wstrobe < 0 || wsetup < 0) {
|
||||
pr_err("%s: cannot get suitable timings\n", __func__);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
set = TA(ta) | RHOLD(rhold) | RSTROBE(rstrobe) | RSETUP(rsetup) |
|
||||
WHOLD(whold) | WSTROBE(wstrobe) | WSETUP(wsetup);
|
||||
|
||||
val = __raw_readl(base + offset);
|
||||
val &= ~TIMING_MASK;
|
||||
val |= set;
|
||||
__raw_writel(val, base + offset);
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(davinci_aemif_setup_timing);
|
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@@ -29,10 +29,9 @@
|
||||
#include <mach/nand.h>
|
||||
#include <mach/da8xx.h>
|
||||
#include <mach/usb.h>
|
||||
#include <mach/aemif.h>
|
||||
|
||||
#define DA830_EVM_PHY_MASK 0x0
|
||||
#define DA830_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
|
||||
|
||||
#define DA830_EVM_PHY_ID ""
|
||||
/*
|
||||
* USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
|
||||
*/
|
||||
@@ -360,6 +359,16 @@ static struct nand_bbt_descr da830_evm_nand_bbt_mirror_descr = {
|
||||
.pattern = da830_evm_nand_mirror_pattern
|
||||
};
|
||||
|
||||
static struct davinci_aemif_timing da830_evm_nandflash_timing = {
|
||||
.wsetup = 24,
|
||||
.wstrobe = 21,
|
||||
.whold = 14,
|
||||
.rsetup = 19,
|
||||
.rstrobe = 50,
|
||||
.rhold = 0,
|
||||
.ta = 20,
|
||||
};
|
||||
|
||||
static struct davinci_nand_pdata da830_evm_nand_pdata = {
|
||||
.parts = da830_evm_nand_partitions,
|
||||
.nr_parts = ARRAY_SIZE(da830_evm_nand_partitions),
|
||||
@@ -368,6 +377,7 @@ static struct davinci_nand_pdata da830_evm_nand_pdata = {
|
||||
.options = NAND_USE_FLASH_BBT,
|
||||
.bbt_td = &da830_evm_nand_bbt_main_descr,
|
||||
.bbt_md = &da830_evm_nand_bbt_mirror_descr,
|
||||
.timing = &da830_evm_nandflash_timing,
|
||||
};
|
||||
|
||||
static struct resource da830_evm_nand_resources[] = {
|
||||
@@ -546,9 +556,8 @@ static __init void da830_evm_init(void)
|
||||
|
||||
da830_evm_usb_init();
|
||||
|
||||
soc_info->emac_pdata->phy_mask = DA830_EVM_PHY_MASK;
|
||||
soc_info->emac_pdata->mdio_max_freq = DA830_EVM_MDIO_FREQUENCY;
|
||||
soc_info->emac_pdata->rmii_en = 1;
|
||||
soc_info->emac_pdata->phy_id = DA830_EVM_PHY_ID;
|
||||
|
||||
ret = davinci_cfg_reg_list(da830_cpgmac_pins);
|
||||
if (ret)
|
||||
@@ -586,6 +595,9 @@ static __init void da830_evm_init(void)
|
||||
#ifdef CONFIG_SERIAL_8250_CONSOLE
|
||||
static int __init da830_evm_console_init(void)
|
||||
{
|
||||
if (!machine_is_davinci_da830_evm())
|
||||
return 0;
|
||||
|
||||
return add_preferred_console("ttyS", 2, "115200");
|
||||
}
|
||||
console_initcall(da830_evm_console_init);
|
||||
@@ -596,7 +608,7 @@ static void __init da830_evm_map_io(void)
|
||||
da830_init();
|
||||
}
|
||||
|
||||
MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137 EVM")
|
||||
MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
|
||||
.boot_params = (DA8XX_DDR_BASE + 0x100),
|
||||
.map_io = da830_evm_map_io,
|
||||
.init_irq = cp_intc_init,
|
||||
|
||||
@@ -26,7 +26,6 @@
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
#include <linux/regulator/tps6507x.h>
|
||||
#include <linux/mfd/tps6507x.h>
|
||||
#include <linux/input/tps6507x-ts.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
@@ -36,10 +35,9 @@
|
||||
#include <mach/da8xx.h>
|
||||
#include <mach/nand.h>
|
||||
#include <mach/mux.h>
|
||||
#include <mach/aemif.h>
|
||||
|
||||
#define DA850_EVM_PHY_MASK 0x1
|
||||
#define DA850_EVM_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
|
||||
|
||||
#define DA850_EVM_PHY_ID "0:00"
|
||||
#define DA850_LCD_PWR_PIN GPIO_TO_PIN(2, 8)
|
||||
#define DA850_LCD_BL_PIN GPIO_TO_PIN(2, 15)
|
||||
|
||||
@@ -110,7 +108,7 @@ static struct platform_device da850_pm_device = {
|
||||
* to boot, using TI's tools to install the secondary boot loader
|
||||
* (UBL) and U-Boot.
|
||||
*/
|
||||
struct mtd_partition da850_evm_nandflash_partition[] = {
|
||||
static struct mtd_partition da850_evm_nandflash_partition[] = {
|
||||
{
|
||||
.name = "u-boot env",
|
||||
.offset = 0,
|
||||
@@ -143,12 +141,23 @@ struct mtd_partition da850_evm_nandflash_partition[] = {
|
||||
},
|
||||
};
|
||||
|
||||
static struct davinci_aemif_timing da850_evm_nandflash_timing = {
|
||||
.wsetup = 24,
|
||||
.wstrobe = 21,
|
||||
.whold = 14,
|
||||
.rsetup = 19,
|
||||
.rstrobe = 50,
|
||||
.rhold = 0,
|
||||
.ta = 20,
|
||||
};
|
||||
|
||||
static struct davinci_nand_pdata da850_evm_nandflash_data = {
|
||||
.parts = da850_evm_nandflash_partition,
|
||||
.nr_parts = ARRAY_SIZE(da850_evm_nandflash_partition),
|
||||
.ecc_mode = NAND_ECC_HW,
|
||||
.ecc_bits = 4,
|
||||
.options = NAND_USE_FLASH_BBT,
|
||||
.timing = &da850_evm_nandflash_timing,
|
||||
};
|
||||
|
||||
static struct resource da850_evm_nandflash_resource[] = {
|
||||
@@ -196,6 +205,30 @@ static void __init da850_evm_init_nor(void)
|
||||
iounmap(aemif_addr);
|
||||
}
|
||||
|
||||
static const short da850_evm_nand_pins[] = {
|
||||
DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
|
||||
DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
|
||||
DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4,
|
||||
DA850_NEMA_WE, DA850_NEMA_OE,
|
||||
-1
|
||||
};
|
||||
|
||||
static const short da850_evm_nor_pins[] = {
|
||||
DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2,
|
||||
DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1,
|
||||
DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5,
|
||||
DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9,
|
||||
DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13,
|
||||
DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1,
|
||||
DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5,
|
||||
DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9,
|
||||
DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13,
|
||||
DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17,
|
||||
DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21,
|
||||
DA850_EMA_A_22, DA850_EMA_A_23,
|
||||
-1
|
||||
};
|
||||
|
||||
static u32 ui_card_detected;
|
||||
|
||||
#if defined(CONFIG_MMC_DAVINCI) || \
|
||||
@@ -205,17 +238,17 @@ static u32 ui_card_detected;
|
||||
#define HAS_MMC 0
|
||||
#endif
|
||||
|
||||
static __init void da850_evm_setup_nor_nand(void)
|
||||
static inline void da850_evm_setup_nor_nand(void)
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
if (ui_card_detected & !HAS_MMC) {
|
||||
ret = davinci_cfg_reg_list(da850_nand_pins);
|
||||
ret = davinci_cfg_reg_list(da850_evm_nand_pins);
|
||||
if (ret)
|
||||
pr_warning("da850_evm_init: nand mux setup failed: "
|
||||
"%d\n", ret);
|
||||
|
||||
ret = davinci_cfg_reg_list(da850_nor_pins);
|
||||
ret = davinci_cfg_reg_list(da850_evm_nor_pins);
|
||||
if (ret)
|
||||
pr_warning("da850_evm_init: nor mux setup failed: %d\n",
|
||||
ret);
|
||||
@@ -406,7 +439,7 @@ static int da850_lcd_hw_init(void)
|
||||
/* TPS65070 voltage regulator support */
|
||||
|
||||
/* 3.3V */
|
||||
struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
|
||||
static struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
|
||||
{
|
||||
.supply = "usb0_vdda33",
|
||||
},
|
||||
@@ -416,7 +449,7 @@ struct regulator_consumer_supply tps65070_dcdc1_consumers[] = {
|
||||
};
|
||||
|
||||
/* 3.3V or 1.8V */
|
||||
struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
|
||||
static struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
|
||||
{
|
||||
.supply = "dvdd3318_a",
|
||||
},
|
||||
@@ -429,14 +462,14 @@ struct regulator_consumer_supply tps65070_dcdc2_consumers[] = {
|
||||
};
|
||||
|
||||
/* 1.2V */
|
||||
struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
|
||||
static struct regulator_consumer_supply tps65070_dcdc3_consumers[] = {
|
||||
{
|
||||
.supply = "cvdd",
|
||||
},
|
||||
};
|
||||
|
||||
/* 1.8V LDO */
|
||||
struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
|
||||
static struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
|
||||
{
|
||||
.supply = "sata_vddr",
|
||||
},
|
||||
@@ -452,7 +485,7 @@ struct regulator_consumer_supply tps65070_ldo1_consumers[] = {
|
||||
};
|
||||
|
||||
/* 1.2V LDO */
|
||||
struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
|
||||
static struct regulator_consumer_supply tps65070_ldo2_consumers[] = {
|
||||
{
|
||||
.supply = "sata_vdd",
|
||||
},
|
||||
@@ -475,7 +508,7 @@ static struct tps6507x_reg_platform_data tps6507x_platform_data = {
|
||||
.defdcdc_default = true,
|
||||
};
|
||||
|
||||
struct regulator_init_data tps65070_regulator_data[] = {
|
||||
static struct regulator_init_data tps65070_regulator_data[] = {
|
||||
/* dcdc1 */
|
||||
{
|
||||
.constraints = {
|
||||
@@ -576,6 +609,23 @@ static const short da850_evm_lcdc_pins[] = {
|
||||
-1
|
||||
};
|
||||
|
||||
static const short da850_evm_mii_pins[] = {
|
||||
DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
|
||||
DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
|
||||
DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
|
||||
DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
|
||||
DA850_MDIO_D,
|
||||
-1
|
||||
};
|
||||
|
||||
static const short da850_evm_rmii_pins[] = {
|
||||
DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
|
||||
DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
|
||||
DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
|
||||
DA850_MDIO_D,
|
||||
-1
|
||||
};
|
||||
|
||||
static int __init da850_evm_config_emac(void)
|
||||
{
|
||||
void __iomem *cfg_chip3_base;
|
||||
@@ -593,12 +643,12 @@ static int __init da850_evm_config_emac(void)
|
||||
|
||||
if (rmii_en) {
|
||||
val |= BIT(8);
|
||||
ret = davinci_cfg_reg_list(da850_rmii_pins);
|
||||
ret = davinci_cfg_reg_list(da850_evm_rmii_pins);
|
||||
pr_info("EMAC: RMII PHY configured, MII PHY will not be"
|
||||
" functional\n");
|
||||
} else {
|
||||
val &= ~BIT(8);
|
||||
ret = davinci_cfg_reg_list(da850_cpgmac_pins);
|
||||
ret = davinci_cfg_reg_list(da850_evm_mii_pins);
|
||||
pr_info("EMAC: MII PHY configured, RMII PHY will not be"
|
||||
" functional\n");
|
||||
}
|
||||
@@ -625,8 +675,7 @@ static int __init da850_evm_config_emac(void)
|
||||
/* Enable/Disable MII MDIO clock */
|
||||
gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
|
||||
|
||||
soc_info->emac_pdata->phy_mask = DA850_EVM_PHY_MASK;
|
||||
soc_info->emac_pdata->mdio_max_freq = DA850_EVM_MDIO_FREQUENCY;
|
||||
soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID;
|
||||
|
||||
ret = da8xx_register_emac();
|
||||
if (ret)
|
||||
@@ -787,7 +836,7 @@ static __init void da850_evm_init(void)
|
||||
if (ret)
|
||||
pr_warning("da850_evm_init: rtc setup failed: %d\n", ret);
|
||||
|
||||
ret = da850_register_cpufreq();
|
||||
ret = da850_register_cpufreq("pll0_sysclk3");
|
||||
if (ret)
|
||||
pr_warning("da850_evm_init: cpufreq registration failed: %d\n",
|
||||
ret);
|
||||
@@ -806,6 +855,9 @@ static __init void da850_evm_init(void)
|
||||
#ifdef CONFIG_SERIAL_8250_CONSOLE
|
||||
static int __init da850_evm_console_init(void)
|
||||
{
|
||||
if (!machine_is_davinci_da850_evm())
|
||||
return 0;
|
||||
|
||||
return add_preferred_console("ttyS", 2, "115200");
|
||||
}
|
||||
console_initcall(da850_evm_console_init);
|
||||
@@ -816,7 +868,7 @@ static void __init da850_evm_map_io(void)
|
||||
da850_init();
|
||||
}
|
||||
|
||||
MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138 EVM")
|
||||
MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
|
||||
.boot_params = (DA8XX_DDR_BASE + 0x100),
|
||||
.map_io = da850_evm_map_io,
|
||||
.init_irq = cp_intc_init,
|
||||
|
||||
@@ -54,9 +54,7 @@ static inline int have_tvp7002(void)
|
||||
return 0;
|
||||
}
|
||||
|
||||
#define DM365_EVM_PHY_MASK (0x2)
|
||||
#define DM365_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
|
||||
|
||||
#define DM365_EVM_PHY_ID "0:01"
|
||||
/*
|
||||
* A MAX-II CPLD is used for various board control functions.
|
||||
*/
|
||||
@@ -175,7 +173,9 @@ static struct at24_platform_data eeprom_info = {
|
||||
.context = (void *)0x7f00,
|
||||
};
|
||||
|
||||
static struct snd_platform_data dm365_evm_snd_data;
|
||||
static struct snd_platform_data dm365_evm_snd_data = {
|
||||
.asp_chan_q = EVENTQ_3,
|
||||
};
|
||||
|
||||
static struct i2c_board_info i2c_info[] = {
|
||||
{
|
||||
@@ -533,8 +533,7 @@ fail:
|
||||
|
||||
/* ... and ENET ... */
|
||||
dm365evm_emac_configure();
|
||||
soc_info->emac_pdata->phy_mask = DM365_EVM_PHY_MASK;
|
||||
soc_info->emac_pdata->mdio_max_freq = DM365_EVM_MDIO_FREQUENCY;
|
||||
soc_info->emac_pdata->phy_id = DM365_EVM_PHY_ID;
|
||||
resets &= ~BIT(3);
|
||||
|
||||
/* ... and AIC33 */
|
||||
|
||||
@@ -37,10 +37,9 @@
|
||||
#include <mach/nand.h>
|
||||
#include <mach/mmc.h>
|
||||
#include <mach/usb.h>
|
||||
#include <mach/aemif.h>
|
||||
|
||||
#define DM644X_EVM_PHY_MASK (0x2)
|
||||
#define DM644X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
|
||||
|
||||
#define DM644X_EVM_PHY_ID "0:01"
|
||||
#define LXT971_PHY_ID (0x001378e2)
|
||||
#define LXT971_PHY_MASK (0xfffffff0)
|
||||
|
||||
@@ -137,11 +136,22 @@ static struct mtd_partition davinci_evm_nandflash_partition[] = {
|
||||
*/
|
||||
};
|
||||
|
||||
static struct davinci_aemif_timing davinci_evm_nandflash_timing = {
|
||||
.wsetup = 20,
|
||||
.wstrobe = 40,
|
||||
.whold = 20,
|
||||
.rsetup = 10,
|
||||
.rstrobe = 40,
|
||||
.rhold = 10,
|
||||
.ta = 40,
|
||||
};
|
||||
|
||||
static struct davinci_nand_pdata davinci_evm_nandflash_data = {
|
||||
.parts = davinci_evm_nandflash_partition,
|
||||
.nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
|
||||
.ecc_mode = NAND_ECC_HW,
|
||||
.options = NAND_USE_FLASH_BBT,
|
||||
.timing = &davinci_evm_nandflash_timing,
|
||||
};
|
||||
|
||||
static struct resource davinci_evm_nandflash_resource[] = {
|
||||
@@ -695,9 +705,7 @@ static __init void davinci_evm_init(void)
|
||||
davinci_serial_init(&uart_config);
|
||||
dm644x_init_asp(&dm644x_evm_snd_data);
|
||||
|
||||
soc_info->emac_pdata->phy_mask = DM644X_EVM_PHY_MASK;
|
||||
soc_info->emac_pdata->mdio_max_freq = DM644X_EVM_MDIO_FREQUENCY;
|
||||
|
||||
soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID;
|
||||
/* Register the fixup for PHY on DaVinci */
|
||||
phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
|
||||
davinci_phy_fixup);
|
||||
|
||||
@@ -42,6 +42,7 @@
|
||||
#include <mach/nand.h>
|
||||
#include <mach/clock.h>
|
||||
#include <mach/cdce949.h>
|
||||
#include <mach/aemif.h>
|
||||
|
||||
#include "clock.h"
|
||||
|
||||
@@ -71,6 +72,16 @@ static struct mtd_partition davinci_nand_partitions[] = {
|
||||
}
|
||||
};
|
||||
|
||||
static struct davinci_aemif_timing dm6467tevm_nandflash_timing = {
|
||||
.wsetup = 29,
|
||||
.wstrobe = 24,
|
||||
.whold = 14,
|
||||
.rsetup = 19,
|
||||
.rstrobe = 33,
|
||||
.rhold = 0,
|
||||
.ta = 29,
|
||||
};
|
||||
|
||||
static struct davinci_nand_pdata davinci_nand_data = {
|
||||
.mask_cle = 0x80000,
|
||||
.mask_ale = 0x40000,
|
||||
@@ -718,9 +729,7 @@ static struct davinci_uart_config uart_config __initdata = {
|
||||
.enabled_uarts = (1 << 0),
|
||||
};
|
||||
|
||||
#define DM646X_EVM_PHY_MASK (0x2)
|
||||
#define DM646X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
|
||||
|
||||
#define DM646X_EVM_PHY_ID "0:01"
|
||||
/*
|
||||
* The following EDMA channels/slots are not being used by drivers (for
|
||||
* example: Timer, GPIO, UART events etc) on dm646x, hence they are being
|
||||
@@ -763,6 +772,9 @@ static __init void evm_init(void)
|
||||
dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
|
||||
dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
|
||||
|
||||
if (machine_is_davinci_dm6467tevm())
|
||||
davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
|
||||
|
||||
platform_device_register(&davinci_nand_device);
|
||||
|
||||
dm646x_init_edma(dm646x_edma_rsv);
|
||||
@@ -770,8 +782,7 @@ static __init void evm_init(void)
|
||||
if (HAS_ATA)
|
||||
davinci_init_ide();
|
||||
|
||||
soc_info->emac_pdata->phy_mask = DM646X_EVM_PHY_MASK;
|
||||
soc_info->emac_pdata->mdio_max_freq = DM646X_EVM_MDIO_FREQUENCY;
|
||||
soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
|
||||
}
|
||||
|
||||
#define DM646X_EVM_REF_FREQ 27000000
|
||||
|
||||
@@ -0,0 +1,424 @@
|
||||
/*
|
||||
* Critical Link MityOMAP-L138 SoM
|
||||
*
|
||||
* Copyright (C) 2010 Critical Link LLC - http://www.criticallink.com
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public License
|
||||
* version 2. This program is licensed "as is" without any warranty of
|
||||
* any kind, whether express or implied.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/console.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/i2c/at24.h>
|
||||
#include <linux/etherdevice.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <mach/common.h>
|
||||
#include <mach/cp_intc.h>
|
||||
#include <mach/da8xx.h>
|
||||
#include <mach/nand.h>
|
||||
#include <mach/mux.h>
|
||||
|
||||
#define MITYOMAPL138_PHY_ID "0:03"
|
||||
|
||||
#define FACTORY_CONFIG_MAGIC 0x012C0138
|
||||
#define FACTORY_CONFIG_VERSION 0x00010001
|
||||
|
||||
/* Data Held in On-Board I2C device */
|
||||
struct factory_config {
|
||||
u32 magic;
|
||||
u32 version;
|
||||
u8 mac[6];
|
||||
u32 fpga_type;
|
||||
u32 spare;
|
||||
u32 serialnumber;
|
||||
char partnum[32];
|
||||
};
|
||||
|
||||
static struct factory_config factory_config;
|
||||
|
||||
static void read_factory_config(struct memory_accessor *a, void *context)
|
||||
{
|
||||
int ret;
|
||||
struct davinci_soc_info *soc_info = &davinci_soc_info;
|
||||
|
||||
ret = a->read(a, (char *)&factory_config, 0, sizeof(factory_config));
|
||||
if (ret != sizeof(struct factory_config)) {
|
||||
pr_warning("MityOMAPL138: Read Factory Config Failed: %d\n",
|
||||
ret);
|
||||
return;
|
||||
}
|
||||
|
||||
if (factory_config.magic != FACTORY_CONFIG_MAGIC) {
|
||||
pr_warning("MityOMAPL138: Factory Config Magic Wrong (%X)\n",
|
||||
factory_config.magic);
|
||||
return;
|
||||
}
|
||||
|
||||
if (factory_config.version != FACTORY_CONFIG_VERSION) {
|
||||
pr_warning("MityOMAPL138: Factory Config Version Wrong (%X)\n",
|
||||
factory_config.version);
|
||||
return;
|
||||
}
|
||||
|
||||
pr_info("MityOMAPL138: Found MAC = %pM\n", factory_config.mac);
|
||||
pr_info("MityOMAPL138: Part Number = %s\n", factory_config.partnum);
|
||||
if (is_valid_ether_addr(factory_config.mac))
|
||||
memcpy(soc_info->emac_pdata->mac_addr,
|
||||
factory_config.mac, ETH_ALEN);
|
||||
else
|
||||
pr_warning("MityOMAPL138: Invalid MAC found "
|
||||
"in factory config block\n");
|
||||
}
|
||||
|
||||
static struct at24_platform_data mityomapl138_fd_chip = {
|
||||
.byte_len = 256,
|
||||
.page_size = 8,
|
||||
.flags = AT24_FLAG_READONLY | AT24_FLAG_IRUGO,
|
||||
.setup = read_factory_config,
|
||||
.context = NULL,
|
||||
};
|
||||
|
||||
static struct davinci_i2c_platform_data mityomap_i2c_0_pdata = {
|
||||
.bus_freq = 100, /* kHz */
|
||||
.bus_delay = 0, /* usec */
|
||||
};
|
||||
|
||||
/* TPS65023 voltage regulator support */
|
||||
/* 1.2V Core */
|
||||
static struct regulator_consumer_supply tps65023_dcdc1_consumers[] = {
|
||||
{
|
||||
.supply = "cvdd",
|
||||
},
|
||||
};
|
||||
|
||||
/* 1.8V */
|
||||
static struct regulator_consumer_supply tps65023_dcdc2_consumers[] = {
|
||||
{
|
||||
.supply = "usb0_vdda18",
|
||||
},
|
||||
{
|
||||
.supply = "usb1_vdda18",
|
||||
},
|
||||
{
|
||||
.supply = "ddr_dvdd18",
|
||||
},
|
||||
{
|
||||
.supply = "sata_vddr",
|
||||
},
|
||||
};
|
||||
|
||||
/* 1.2V */
|
||||
static struct regulator_consumer_supply tps65023_dcdc3_consumers[] = {
|
||||
{
|
||||
.supply = "sata_vdd",
|
||||
},
|
||||
{
|
||||
.supply = "usb_cvdd",
|
||||
},
|
||||
{
|
||||
.supply = "pll0_vdda",
|
||||
},
|
||||
{
|
||||
.supply = "pll1_vdda",
|
||||
},
|
||||
};
|
||||
|
||||
/* 1.8V Aux LDO, not used */
|
||||
static struct regulator_consumer_supply tps65023_ldo1_consumers[] = {
|
||||
{
|
||||
.supply = "1.8v_aux",
|
||||
},
|
||||
};
|
||||
|
||||
/* FPGA VCC Aux (2.5 or 3.3) LDO */
|
||||
static struct regulator_consumer_supply tps65023_ldo2_consumers[] = {
|
||||
{
|
||||
.supply = "vccaux",
|
||||
},
|
||||
};
|
||||
|
||||
static struct regulator_init_data tps65023_regulator_data[] = {
|
||||
/* dcdc1 */
|
||||
{
|
||||
.constraints = {
|
||||
.min_uV = 1150000,
|
||||
.max_uV = 1350000,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
|
||||
REGULATOR_CHANGE_STATUS,
|
||||
.boot_on = 1,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc1_consumers),
|
||||
.consumer_supplies = tps65023_dcdc1_consumers,
|
||||
},
|
||||
/* dcdc2 */
|
||||
{
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
.boot_on = 1,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc2_consumers),
|
||||
.consumer_supplies = tps65023_dcdc2_consumers,
|
||||
},
|
||||
/* dcdc3 */
|
||||
{
|
||||
.constraints = {
|
||||
.min_uV = 1200000,
|
||||
.max_uV = 1200000,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
.boot_on = 1,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(tps65023_dcdc3_consumers),
|
||||
.consumer_supplies = tps65023_dcdc3_consumers,
|
||||
},
|
||||
/* ldo1 */
|
||||
{
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
.boot_on = 1,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(tps65023_ldo1_consumers),
|
||||
.consumer_supplies = tps65023_ldo1_consumers,
|
||||
},
|
||||
/* ldo2 */
|
||||
{
|
||||
.constraints = {
|
||||
.min_uV = 2500000,
|
||||
.max_uV = 3300000,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
|
||||
REGULATOR_CHANGE_STATUS,
|
||||
.boot_on = 1,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(tps65023_ldo2_consumers),
|
||||
.consumer_supplies = tps65023_ldo2_consumers,
|
||||
},
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata mityomap_tps65023_info[] = {
|
||||
{
|
||||
I2C_BOARD_INFO("tps65023", 0x48),
|
||||
.platform_data = &tps65023_regulator_data[0],
|
||||
},
|
||||
{
|
||||
I2C_BOARD_INFO("24c02", 0x50),
|
||||
.platform_data = &mityomapl138_fd_chip,
|
||||
},
|
||||
};
|
||||
|
||||
static int __init pmic_tps65023_init(void)
|
||||
{
|
||||
return i2c_register_board_info(1, mityomap_tps65023_info,
|
||||
ARRAY_SIZE(mityomap_tps65023_info));
|
||||
}
|
||||
|
||||
/*
|
||||
* MityDSP-L138 includes a 256 MByte large-page NAND flash
|
||||
* (128K blocks).
|
||||
*/
|
||||
static struct mtd_partition mityomapl138_nandflash_partition[] = {
|
||||
{
|
||||
.name = "rootfs",
|
||||
.offset = 0,
|
||||
.size = SZ_128M,
|
||||
.mask_flags = 0, /* MTD_WRITEABLE, */
|
||||
},
|
||||
{
|
||||
.name = "homefs",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
.mask_flags = 0,
|
||||
},
|
||||
};
|
||||
|
||||
static struct davinci_nand_pdata mityomapl138_nandflash_data = {
|
||||
.parts = mityomapl138_nandflash_partition,
|
||||
.nr_parts = ARRAY_SIZE(mityomapl138_nandflash_partition),
|
||||
.ecc_mode = NAND_ECC_HW,
|
||||
.options = NAND_USE_FLASH_BBT | NAND_BUSWIDTH_16,
|
||||
.ecc_bits = 1, /* 4 bit mode is not supported with 16 bit NAND */
|
||||
};
|
||||
|
||||
static struct resource mityomapl138_nandflash_resource[] = {
|
||||
{
|
||||
.start = DA8XX_AEMIF_CS3_BASE,
|
||||
.end = DA8XX_AEMIF_CS3_BASE + SZ_512K + 2 * SZ_1K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = DA8XX_AEMIF_CTL_BASE,
|
||||
.end = DA8XX_AEMIF_CTL_BASE + SZ_32K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device mityomapl138_nandflash_device = {
|
||||
.name = "davinci_nand",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &mityomapl138_nandflash_data,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(mityomapl138_nandflash_resource),
|
||||
.resource = mityomapl138_nandflash_resource,
|
||||
};
|
||||
|
||||
static struct platform_device *mityomapl138_devices[] __initdata = {
|
||||
&mityomapl138_nandflash_device,
|
||||
};
|
||||
|
||||
static void __init mityomapl138_setup_nand(void)
|
||||
{
|
||||
platform_add_devices(mityomapl138_devices,
|
||||
ARRAY_SIZE(mityomapl138_devices));
|
||||
}
|
||||
|
||||
static struct davinci_uart_config mityomapl138_uart_config __initdata = {
|
||||
.enabled_uarts = 0x7,
|
||||
};
|
||||
|
||||
static const short mityomap_mii_pins[] = {
|
||||
DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
|
||||
DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
|
||||
DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
|
||||
DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
|
||||
DA850_MDIO_D,
|
||||
-1
|
||||
};
|
||||
|
||||
static const short mityomap_rmii_pins[] = {
|
||||
DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
|
||||
DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
|
||||
DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
|
||||
DA850_MDIO_D,
|
||||
-1
|
||||
};
|
||||
|
||||
static void __init mityomapl138_config_emac(void)
|
||||
{
|
||||
void __iomem *cfg_chip3_base;
|
||||
int ret;
|
||||
u32 val;
|
||||
struct davinci_soc_info *soc_info = &davinci_soc_info;
|
||||
|
||||
soc_info->emac_pdata->rmii_en = 0; /* hardcoded for now */
|
||||
|
||||
cfg_chip3_base = DA8XX_SYSCFG0_VIRT(DA8XX_CFGCHIP3_REG);
|
||||
val = __raw_readl(cfg_chip3_base);
|
||||
|
||||
if (soc_info->emac_pdata->rmii_en) {
|
||||
val |= BIT(8);
|
||||
ret = davinci_cfg_reg_list(mityomap_rmii_pins);
|
||||
pr_info("RMII PHY configured\n");
|
||||
} else {
|
||||
val &= ~BIT(8);
|
||||
ret = davinci_cfg_reg_list(mityomap_mii_pins);
|
||||
pr_info("MII PHY configured\n");
|
||||
}
|
||||
|
||||
if (ret) {
|
||||
pr_warning("mii/rmii mux setup failed: %d\n", ret);
|
||||
return;
|
||||
}
|
||||
|
||||
/* configure the CFGCHIP3 register for RMII or MII */
|
||||
__raw_writel(val, cfg_chip3_base);
|
||||
|
||||
soc_info->emac_pdata->phy_id = MITYOMAPL138_PHY_ID;
|
||||
|
||||
ret = da8xx_register_emac();
|
||||
if (ret)
|
||||
pr_warning("emac registration failed: %d\n", ret);
|
||||
}
|
||||
|
||||
static struct davinci_pm_config da850_pm_pdata = {
|
||||
.sleepcount = 128,
|
||||
};
|
||||
|
||||
static struct platform_device da850_pm_device = {
|
||||
.name = "pm-davinci",
|
||||
.dev = {
|
||||
.platform_data = &da850_pm_pdata,
|
||||
},
|
||||
.id = -1,
|
||||
};
|
||||
|
||||
static void __init mityomapl138_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
/* for now, no special EDMA channels are reserved */
|
||||
ret = da850_register_edma(NULL);
|
||||
if (ret)
|
||||
pr_warning("edma registration failed: %d\n", ret);
|
||||
|
||||
ret = da8xx_register_watchdog();
|
||||
if (ret)
|
||||
pr_warning("watchdog registration failed: %d\n", ret);
|
||||
|
||||
davinci_serial_init(&mityomapl138_uart_config);
|
||||
|
||||
ret = da8xx_register_i2c(0, &mityomap_i2c_0_pdata);
|
||||
if (ret)
|
||||
pr_warning("i2c0 registration failed: %d\n", ret);
|
||||
|
||||
ret = pmic_tps65023_init();
|
||||
if (ret)
|
||||
pr_warning("TPS65023 PMIC init failed: %d\n", ret);
|
||||
|
||||
mityomapl138_setup_nand();
|
||||
|
||||
mityomapl138_config_emac();
|
||||
|
||||
ret = da8xx_register_rtc();
|
||||
if (ret)
|
||||
pr_warning("rtc setup failed: %d\n", ret);
|
||||
|
||||
ret = da850_register_cpufreq("pll0_sysclk3");
|
||||
if (ret)
|
||||
pr_warning("cpufreq registration failed: %d\n", ret);
|
||||
|
||||
ret = da8xx_register_cpuidle();
|
||||
if (ret)
|
||||
pr_warning("cpuidle registration failed: %d\n", ret);
|
||||
|
||||
ret = da850_register_pm(&da850_pm_device);
|
||||
if (ret)
|
||||
pr_warning("da850_evm_init: suspend registration failed: %d\n",
|
||||
ret);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SERIAL_8250_CONSOLE
|
||||
static int __init mityomapl138_console_init(void)
|
||||
{
|
||||
if (!machine_is_mityomapl138())
|
||||
return 0;
|
||||
|
||||
return add_preferred_console("ttyS", 1, "115200");
|
||||
}
|
||||
console_initcall(mityomapl138_console_init);
|
||||
#endif
|
||||
|
||||
static void __init mityomapl138_map_io(void)
|
||||
{
|
||||
da850_init();
|
||||
}
|
||||
|
||||
MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808")
|
||||
.phys_io = IO_PHYS,
|
||||
.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
|
||||
.boot_params = (DA8XX_DDR_BASE + 0x100),
|
||||
.map_io = mityomapl138_map_io,
|
||||
.init_irq = cp_intc_init,
|
||||
.timer = &davinci_timer,
|
||||
.init_machine = mityomapl138_init,
|
||||
MACHINE_END
|
||||
@@ -39,9 +39,7 @@
|
||||
#include <mach/mmc.h>
|
||||
#include <mach/usb.h>
|
||||
|
||||
#define NEUROS_OSD2_PHY_MASK 0x2
|
||||
#define NEUROS_OSD2_MDIO_FREQUENCY 2200000 /* PHY bus frequency */
|
||||
|
||||
#define NEUROS_OSD2_PHY_ID "0:01"
|
||||
#define LXT971_PHY_ID 0x001378e2
|
||||
#define LXT971_PHY_MASK 0xfffffff0
|
||||
|
||||
@@ -252,8 +250,7 @@ static __init void davinci_ntosd2_init(void)
|
||||
davinci_serial_init(&uart_config);
|
||||
dm644x_init_asp(&dm644x_ntosd2_snd_data);
|
||||
|
||||
soc_info->emac_pdata->phy_mask = NEUROS_OSD2_PHY_MASK;
|
||||
soc_info->emac_pdata->mdio_max_freq = NEUROS_OSD2_MDIO_FREQUENCY;
|
||||
soc_info->emac_pdata->phy_id = NEUROS_OSD2_PHY_ID;
|
||||
|
||||
davinci_setup_usb(1000, 8);
|
||||
/*
|
||||
|
||||
@@ -0,0 +1,64 @@
|
||||
/*
|
||||
* Hawkboard.org based on TI's OMAP-L138 Platform
|
||||
*
|
||||
* Initial code: Syed Mohammed Khasim
|
||||
*
|
||||
* Copyright (C) 2009 Texas Instruments Incorporated - http://www.ti.com
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public License
|
||||
* version 2. This program is licensed "as is" without any warranty of
|
||||
* any kind, whether express or implied.
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/console.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
||||
#include <mach/cp_intc.h>
|
||||
#include <mach/da8xx.h>
|
||||
|
||||
static struct davinci_uart_config omapl138_hawk_uart_config __initdata = {
|
||||
.enabled_uarts = 0x7,
|
||||
};
|
||||
|
||||
static __init void omapl138_hawk_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
davinci_serial_init(&omapl138_hawk_uart_config);
|
||||
|
||||
ret = da8xx_register_watchdog();
|
||||
if (ret)
|
||||
pr_warning("omapl138_hawk_init: "
|
||||
"watchdog registration failed: %d\n",
|
||||
ret);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SERIAL_8250_CONSOLE
|
||||
static int __init omapl138_hawk_console_init(void)
|
||||
{
|
||||
if (!machine_is_omapl138_hawkboard())
|
||||
return 0;
|
||||
|
||||
return add_preferred_console("ttyS", 2, "115200");
|
||||
}
|
||||
console_initcall(omapl138_hawk_console_init);
|
||||
#endif
|
||||
|
||||
static void __init omapl138_hawk_map_io(void)
|
||||
{
|
||||
da850_init();
|
||||
}
|
||||
|
||||
MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard")
|
||||
.phys_io = IO_PHYS,
|
||||
.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
|
||||
.boot_params = (DA8XX_DDR_BASE + 0x100),
|
||||
.map_io = omapl138_hawk_map_io,
|
||||
.init_irq = cp_intc_init,
|
||||
.timer = &davinci_timer,
|
||||
.init_machine = omapl138_hawk_init,
|
||||
MACHINE_END
|
||||
@@ -42,9 +42,7 @@
|
||||
#include <mach/mux.h>
|
||||
#include <mach/usb.h>
|
||||
|
||||
#define SFFSDR_PHY_MASK (0x2)
|
||||
#define SFFSDR_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
|
||||
|
||||
#define SFFSDR_PHY_ID "0:01"
|
||||
static struct mtd_partition davinci_sffsdr_nandflash_partition[] = {
|
||||
/* U-Boot Environment: Block 0
|
||||
* UBL: Block 1
|
||||
@@ -143,8 +141,7 @@ static __init void davinci_sffsdr_init(void)
|
||||
ARRAY_SIZE(davinci_sffsdr_devices));
|
||||
sffsdr_init_i2c();
|
||||
davinci_serial_init(&uart_config);
|
||||
soc_info->emac_pdata->phy_mask = SFFSDR_PHY_MASK;
|
||||
soc_info->emac_pdata->mdio_max_freq = SFFSDR_MDIO_FREQUENCY;
|
||||
soc_info->emac_pdata->phy_id = SFFSDR_PHY_ID;
|
||||
davinci_setup_usb(0, 0); /* We support only peripheral mode. */
|
||||
|
||||
/* mux VLYNQ pins */
|
||||
|
||||
@@ -23,6 +23,9 @@
|
||||
#include <linux/ratelimit.h>
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/input/matrix_keypad.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
||||
@@ -141,10 +144,63 @@ static struct davinci_uart_config serial_config __initconst = {
|
||||
.enabled_uarts = BIT(1),
|
||||
};
|
||||
|
||||
static const uint32_t keymap[] = {
|
||||
KEY(0, 0, KEY_NUMERIC_1),
|
||||
KEY(0, 1, KEY_NUMERIC_2),
|
||||
KEY(0, 2, KEY_NUMERIC_3),
|
||||
KEY(0, 3, KEY_FN_F1),
|
||||
KEY(0, 4, KEY_MENU),
|
||||
|
||||
KEY(1, 0, KEY_NUMERIC_4),
|
||||
KEY(1, 1, KEY_NUMERIC_5),
|
||||
KEY(1, 2, KEY_NUMERIC_6),
|
||||
KEY(1, 3, KEY_UP),
|
||||
KEY(1, 4, KEY_FN_F2),
|
||||
|
||||
KEY(2, 0, KEY_NUMERIC_7),
|
||||
KEY(2, 1, KEY_NUMERIC_8),
|
||||
KEY(2, 2, KEY_NUMERIC_9),
|
||||
KEY(2, 3, KEY_LEFT),
|
||||
KEY(2, 4, KEY_ENTER),
|
||||
|
||||
KEY(3, 0, KEY_NUMERIC_STAR),
|
||||
KEY(3, 1, KEY_NUMERIC_0),
|
||||
KEY(3, 2, KEY_NUMERIC_POUND),
|
||||
KEY(3, 3, KEY_DOWN),
|
||||
KEY(3, 4, KEY_RIGHT),
|
||||
|
||||
KEY(4, 0, KEY_FN_F3),
|
||||
KEY(4, 1, KEY_FN_F4),
|
||||
KEY(4, 2, KEY_MUTE),
|
||||
KEY(4, 3, KEY_HOME),
|
||||
KEY(4, 4, KEY_BACK),
|
||||
|
||||
KEY(5, 0, KEY_VOLUMEDOWN),
|
||||
KEY(5, 1, KEY_VOLUMEUP),
|
||||
KEY(5, 2, KEY_F1),
|
||||
KEY(5, 3, KEY_F2),
|
||||
KEY(5, 4, KEY_F3),
|
||||
};
|
||||
|
||||
static const struct matrix_keymap_data keymap_data = {
|
||||
.keymap = keymap,
|
||||
.keymap_size = ARRAY_SIZE(keymap),
|
||||
};
|
||||
|
||||
static struct matrix_keypad_platform_data keypad_config = {
|
||||
.keymap_data = &keymap_data,
|
||||
.num_row_gpios = 6,
|
||||
.num_col_gpios = 5,
|
||||
.debounce_ms = 0, /* minimum */
|
||||
.active_low = 0, /* pull up realization */
|
||||
.no_autorepeat = 0,
|
||||
};
|
||||
|
||||
static struct tnetv107x_device_info evm_device_info __initconst = {
|
||||
.serial_config = &serial_config,
|
||||
.mmc_config[1] = &mmc_config, /* controller 1 */
|
||||
.nand_config[0] = &nand_config, /* chip select 0 */
|
||||
.keypad_config = &keypad_config,
|
||||
};
|
||||
|
||||
static __init void tnetv107x_evm_board_init(void)
|
||||
|
||||
@@ -236,7 +236,7 @@ static int __init clk_disable_unused(void)
|
||||
if (!davinci_psc_is_clk_active(ck->gpsc, ck->lpsc))
|
||||
continue;
|
||||
|
||||
pr_info("Clocks: disable unused %s\n", ck->name);
|
||||
pr_debug("Clocks: disable unused %s\n", ck->name);
|
||||
|
||||
davinci_psc_config(psc_domain(ck), ck->gpsc, ck->lpsc,
|
||||
(ck->flags & PSC_SWRSTDISABLE) ?
|
||||
@@ -287,6 +287,79 @@ static unsigned long clk_sysclk_recalc(struct clk *clk)
|
||||
return rate;
|
||||
}
|
||||
|
||||
int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate)
|
||||
{
|
||||
unsigned v;
|
||||
struct pll_data *pll;
|
||||
unsigned long input;
|
||||
unsigned ratio = 0;
|
||||
|
||||
/* If this is the PLL base clock, wrong function to call */
|
||||
if (clk->pll_data)
|
||||
return -EINVAL;
|
||||
|
||||
/* There must be a parent... */
|
||||
if (WARN_ON(!clk->parent))
|
||||
return -EINVAL;
|
||||
|
||||
/* ... the parent must be a PLL... */
|
||||
if (WARN_ON(!clk->parent->pll_data))
|
||||
return -EINVAL;
|
||||
|
||||
/* ... and this clock must have a divider. */
|
||||
if (WARN_ON(!clk->div_reg))
|
||||
return -EINVAL;
|
||||
|
||||
pll = clk->parent->pll_data;
|
||||
|
||||
input = clk->parent->rate;
|
||||
|
||||
/* If pre-PLL, source clock is before the multiplier and divider(s) */
|
||||
if (clk->flags & PRE_PLL)
|
||||
input = pll->input_rate;
|
||||
|
||||
if (input > rate) {
|
||||
/*
|
||||
* Can afford to provide an output little higher than requested
|
||||
* only if maximum rate supported by hardware on this sysclk
|
||||
* is known.
|
||||
*/
|
||||
if (clk->maxrate) {
|
||||
ratio = DIV_ROUND_CLOSEST(input, rate);
|
||||
if (input / ratio > clk->maxrate)
|
||||
ratio = 0;
|
||||
}
|
||||
|
||||
if (ratio == 0)
|
||||
ratio = DIV_ROUND_UP(input, rate);
|
||||
|
||||
ratio--;
|
||||
}
|
||||
|
||||
if (ratio > PLLDIV_RATIO_MASK)
|
||||
return -EINVAL;
|
||||
|
||||
do {
|
||||
v = __raw_readl(pll->base + PLLSTAT);
|
||||
} while (v & PLLSTAT_GOSTAT);
|
||||
|
||||
v = __raw_readl(pll->base + clk->div_reg);
|
||||
v &= ~PLLDIV_RATIO_MASK;
|
||||
v |= ratio | PLLDIV_EN;
|
||||
__raw_writel(v, pll->base + clk->div_reg);
|
||||
|
||||
v = __raw_readl(pll->base + PLLCMD);
|
||||
v |= PLLCMD_GOSET;
|
||||
__raw_writel(v, pll->base + PLLCMD);
|
||||
|
||||
do {
|
||||
v = __raw_readl(pll->base + PLLSTAT);
|
||||
} while (v & PLLSTAT_GOSTAT);
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(davinci_set_sysclk_rate);
|
||||
|
||||
static unsigned long clk_leafclk_recalc(struct clk *clk)
|
||||
{
|
||||
if (WARN_ON(!clk->parent))
|
||||
|
||||
@@ -70,6 +70,9 @@
|
||||
#include <linux/list.h>
|
||||
#include <asm/clkdev.h>
|
||||
|
||||
#define PLLSTAT_GOSTAT BIT(0)
|
||||
#define PLLCMD_GOSET BIT(0)
|
||||
|
||||
struct pll_data {
|
||||
u32 phys_base;
|
||||
void __iomem *base;
|
||||
@@ -86,6 +89,7 @@ struct clk {
|
||||
struct module *owner;
|
||||
const char *name;
|
||||
unsigned long rate;
|
||||
unsigned long maxrate; /* H/W supported max rate */
|
||||
u8 usecount;
|
||||
u8 lpsc;
|
||||
u8 gpsc;
|
||||
@@ -118,6 +122,7 @@ struct clk {
|
||||
int davinci_clk_init(struct clk_lookup *clocks);
|
||||
int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
|
||||
unsigned int mult, unsigned int postdiv);
|
||||
int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate);
|
||||
|
||||
extern struct platform_device davinci_wdt_device;
|
||||
extern void davinci_watchdog_reset(struct platform_device *);
|
||||
|
||||
@@ -34,6 +34,8 @@
|
||||
struct davinci_cpufreq {
|
||||
struct device *dev;
|
||||
struct clk *armclk;
|
||||
struct clk *asyncclk;
|
||||
unsigned long asyncrate;
|
||||
};
|
||||
static struct davinci_cpufreq cpufreq;
|
||||
|
||||
@@ -104,15 +106,27 @@ static int davinci_target(struct cpufreq_policy *policy,
|
||||
cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
|
||||
|
||||
/* if moving to higher frequency, up the voltage beforehand */
|
||||
if (pdata->set_voltage && freqs.new > freqs.old)
|
||||
pdata->set_voltage(idx);
|
||||
if (pdata->set_voltage && freqs.new > freqs.old) {
|
||||
ret = pdata->set_voltage(idx);
|
||||
if (ret)
|
||||
goto out;
|
||||
}
|
||||
|
||||
ret = clk_set_rate(armclk, idx);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
if (cpufreq.asyncclk) {
|
||||
ret = clk_set_rate(cpufreq.asyncclk, cpufreq.asyncrate);
|
||||
if (ret)
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* if moving to lower freq, lower the voltage after lowering freq */
|
||||
if (pdata->set_voltage && freqs.new < freqs.old)
|
||||
pdata->set_voltage(idx);
|
||||
|
||||
out:
|
||||
cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
|
||||
|
||||
return ret;
|
||||
@@ -185,6 +199,7 @@ static struct cpufreq_driver davinci_driver = {
|
||||
static int __init davinci_cpufreq_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct davinci_cpufreq_config *pdata = pdev->dev.platform_data;
|
||||
struct clk *asyncclk;
|
||||
|
||||
if (!pdata)
|
||||
return -EINVAL;
|
||||
@@ -199,6 +214,12 @@ static int __init davinci_cpufreq_probe(struct platform_device *pdev)
|
||||
return PTR_ERR(cpufreq.armclk);
|
||||
}
|
||||
|
||||
asyncclk = clk_get(cpufreq.dev, "async");
|
||||
if (!IS_ERR(asyncclk)) {
|
||||
cpufreq.asyncclk = asyncclk;
|
||||
cpufreq.asyncrate = clk_get_rate(asyncclk);
|
||||
}
|
||||
|
||||
return cpufreq_register_driver(&davinci_driver);
|
||||
}
|
||||
|
||||
@@ -206,6 +227,9 @@ static int __exit davinci_cpufreq_remove(struct platform_device *pdev)
|
||||
{
|
||||
clk_put(cpufreq.armclk);
|
||||
|
||||
if (cpufreq.asyncclk)
|
||||
clk_put(cpufreq.asyncclk);
|
||||
|
||||
return cpufreq_unregister_driver(&davinci_driver);
|
||||
}
|
||||
|
||||
|
||||
@@ -86,6 +86,8 @@ static struct clk pll0_sysclk3 = {
|
||||
.parent = &pll0_clk,
|
||||
.flags = CLK_PLL,
|
||||
.div_reg = PLLDIV3,
|
||||
.set_rate = davinci_set_sysclk_rate,
|
||||
.maxrate = 100000000,
|
||||
};
|
||||
|
||||
static struct clk pll0_sysclk4 = {
|
||||
@@ -323,12 +325,19 @@ static struct clk lcdc_clk = {
|
||||
.gpsc = 1,
|
||||
};
|
||||
|
||||
static struct clk mmcsd_clk = {
|
||||
.name = "mmcsd",
|
||||
static struct clk mmcsd0_clk = {
|
||||
.name = "mmcsd0",
|
||||
.parent = &pll0_sysclk2,
|
||||
.lpsc = DA8XX_LPSC0_MMC_SD,
|
||||
};
|
||||
|
||||
static struct clk mmcsd1_clk = {
|
||||
.name = "mmcsd1",
|
||||
.parent = &pll0_sysclk2,
|
||||
.lpsc = DA850_LPSC1_MMC_SD1,
|
||||
.gpsc = 1,
|
||||
};
|
||||
|
||||
static struct clk aemif_clk = {
|
||||
.name = "aemif",
|
||||
.parent = &pll0_sysclk3,
|
||||
@@ -375,7 +384,8 @@ static struct clk_lookup da850_clks[] = {
|
||||
CLK("davinci_emac.1", NULL, &emac_clk),
|
||||
CLK("davinci-mcasp.0", NULL, &mcasp_clk),
|
||||
CLK("da8xx_lcdc.0", NULL, &lcdc_clk),
|
||||
CLK("davinci_mmc.0", NULL, &mmcsd_clk),
|
||||
CLK("davinci_mmc.0", NULL, &mmcsd0_clk),
|
||||
CLK("davinci_mmc.1", NULL, &mmcsd1_clk),
|
||||
CLK(NULL, "aemif", &aemif_clk),
|
||||
CLK(NULL, NULL, NULL),
|
||||
};
|
||||
@@ -572,15 +582,9 @@ const short da850_cpgmac_pins[] __initdata = {
|
||||
DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
|
||||
DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
|
||||
DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
|
||||
DA850_MDIO_D,
|
||||
-1
|
||||
};
|
||||
|
||||
const short da850_rmii_pins[] __initdata = {
|
||||
DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
|
||||
DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
|
||||
DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
|
||||
DA850_MDIO_D,
|
||||
DA850_MDIO_D, DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
|
||||
DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1, DA850_RMII_RXER,
|
||||
DA850_RMII_MHZ_50_CLK,
|
||||
-1
|
||||
};
|
||||
|
||||
@@ -607,27 +611,19 @@ const short da850_mmcsd0_pins[] __initdata = {
|
||||
-1
|
||||
};
|
||||
|
||||
const short da850_nand_pins[] __initdata = {
|
||||
DA850_EMA_D_7, DA850_EMA_D_6, DA850_EMA_D_5, DA850_EMA_D_4,
|
||||
DA850_EMA_D_3, DA850_EMA_D_2, DA850_EMA_D_1, DA850_EMA_D_0,
|
||||
DA850_EMA_A_1, DA850_EMA_A_2, DA850_NEMA_CS_3, DA850_NEMA_CS_4,
|
||||
DA850_NEMA_WE, DA850_NEMA_OE,
|
||||
-1
|
||||
};
|
||||
|
||||
const short da850_nor_pins[] __initdata = {
|
||||
const short da850_emif25_pins[] __initdata = {
|
||||
DA850_EMA_BA_1, DA850_EMA_CLK, DA850_EMA_WAIT_1, DA850_NEMA_CS_2,
|
||||
DA850_NEMA_WE, DA850_NEMA_OE, DA850_EMA_D_0, DA850_EMA_D_1,
|
||||
DA850_EMA_D_2, DA850_EMA_D_3, DA850_EMA_D_4, DA850_EMA_D_5,
|
||||
DA850_EMA_D_6, DA850_EMA_D_7, DA850_EMA_D_8, DA850_EMA_D_9,
|
||||
DA850_EMA_D_10, DA850_EMA_D_11, DA850_EMA_D_12, DA850_EMA_D_13,
|
||||
DA850_EMA_D_14, DA850_EMA_D_15, DA850_EMA_A_0, DA850_EMA_A_1,
|
||||
DA850_EMA_A_2, DA850_EMA_A_3, DA850_EMA_A_4, DA850_EMA_A_5,
|
||||
DA850_EMA_A_6, DA850_EMA_A_7, DA850_EMA_A_8, DA850_EMA_A_9,
|
||||
DA850_EMA_A_10, DA850_EMA_A_11, DA850_EMA_A_12, DA850_EMA_A_13,
|
||||
DA850_EMA_A_14, DA850_EMA_A_15, DA850_EMA_A_16, DA850_EMA_A_17,
|
||||
DA850_EMA_A_18, DA850_EMA_A_19, DA850_EMA_A_20, DA850_EMA_A_21,
|
||||
DA850_EMA_A_22, DA850_EMA_A_23,
|
||||
DA850_NEMA_CS_3, DA850_NEMA_CS_4, DA850_NEMA_WE, DA850_NEMA_OE,
|
||||
DA850_EMA_D_0, DA850_EMA_D_1, DA850_EMA_D_2, DA850_EMA_D_3,
|
||||
DA850_EMA_D_4, DA850_EMA_D_5, DA850_EMA_D_6, DA850_EMA_D_7,
|
||||
DA850_EMA_D_8, DA850_EMA_D_9, DA850_EMA_D_10, DA850_EMA_D_11,
|
||||
DA850_EMA_D_12, DA850_EMA_D_13, DA850_EMA_D_14, DA850_EMA_D_15,
|
||||
DA850_EMA_A_0, DA850_EMA_A_1, DA850_EMA_A_2, DA850_EMA_A_3,
|
||||
DA850_EMA_A_4, DA850_EMA_A_5, DA850_EMA_A_6, DA850_EMA_A_7,
|
||||
DA850_EMA_A_8, DA850_EMA_A_9, DA850_EMA_A_10, DA850_EMA_A_11,
|
||||
DA850_EMA_A_12, DA850_EMA_A_13, DA850_EMA_A_14, DA850_EMA_A_15,
|
||||
DA850_EMA_A_16, DA850_EMA_A_17, DA850_EMA_A_18, DA850_EMA_A_19,
|
||||
DA850_EMA_A_20, DA850_EMA_A_21, DA850_EMA_A_22, DA850_EMA_A_23,
|
||||
-1
|
||||
};
|
||||
|
||||
@@ -851,7 +847,7 @@ static const struct da850_opp da850_opp_300 = {
|
||||
.prediv = 1,
|
||||
.mult = 25,
|
||||
.postdiv = 2,
|
||||
.cvdd_min = 1140000,
|
||||
.cvdd_min = 1200000,
|
||||
.cvdd_max = 1320000,
|
||||
};
|
||||
|
||||
@@ -860,7 +856,7 @@ static const struct da850_opp da850_opp_200 = {
|
||||
.prediv = 1,
|
||||
.mult = 25,
|
||||
.postdiv = 3,
|
||||
.cvdd_min = 1050000,
|
||||
.cvdd_min = 1100000,
|
||||
.cvdd_max = 1160000,
|
||||
};
|
||||
|
||||
@@ -869,7 +865,7 @@ static const struct da850_opp da850_opp_96 = {
|
||||
.prediv = 1,
|
||||
.mult = 20,
|
||||
.postdiv = 5,
|
||||
.cvdd_min = 950000,
|
||||
.cvdd_min = 1000000,
|
||||
.cvdd_max = 1050000,
|
||||
};
|
||||
|
||||
@@ -929,10 +925,16 @@ static struct platform_device da850_cpufreq_device = {
|
||||
.dev = {
|
||||
.platform_data = &cpufreq_info,
|
||||
},
|
||||
.id = -1,
|
||||
};
|
||||
|
||||
int __init da850_register_cpufreq(void)
|
||||
int __init da850_register_cpufreq(char *async_clk)
|
||||
{
|
||||
/* cpufreq driver can help keep an "async" clock constant */
|
||||
if (async_clk)
|
||||
clk_add_alias("async", da850_cpufreq_device.name,
|
||||
async_clk, NULL);
|
||||
|
||||
return platform_device_register(&da850_cpufreq_device);
|
||||
}
|
||||
|
||||
@@ -983,7 +985,7 @@ static int da850_set_pll0rate(struct clk *clk, unsigned long index)
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
int __init da850_register_cpufreq(void)
|
||||
int __init da850_register_cpufreq(char *async_clk)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -24,6 +24,7 @@
|
||||
#include "clock.h"
|
||||
|
||||
#define DA8XX_TPCC_BASE 0x01c00000
|
||||
#define DA850_MMCSD1_BASE 0x01e1b000
|
||||
#define DA850_TPCC1_BASE 0x01e30000
|
||||
#define DA8XX_TPTC0_BASE 0x01c08000
|
||||
#define DA8XX_TPTC1_BASE 0x01c08400
|
||||
@@ -41,7 +42,6 @@
|
||||
#define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000
|
||||
#define DA8XX_EMAC_MOD_REG_OFFSET 0x2000
|
||||
#define DA8XX_EMAC_RAM_OFFSET 0x0000
|
||||
#define DA8XX_MDIO_REG_OFFSET 0x4000
|
||||
#define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K
|
||||
|
||||
void __iomem *da8xx_syscfg0_base;
|
||||
@@ -351,7 +351,7 @@ int __init da8xx_register_watchdog(void)
|
||||
static struct resource da8xx_emac_resources[] = {
|
||||
{
|
||||
.start = DA8XX_EMAC_CPPI_PORT_BASE,
|
||||
.end = DA8XX_EMAC_CPPI_PORT_BASE + 0x5000 - 1,
|
||||
.end = DA8XX_EMAC_CPPI_PORT_BASE + SZ_16K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
@@ -380,7 +380,6 @@ struct emac_platform_data da8xx_emac_pdata = {
|
||||
.ctrl_reg_offset = DA8XX_EMAC_CTRL_REG_OFFSET,
|
||||
.ctrl_mod_reg_offset = DA8XX_EMAC_MOD_REG_OFFSET,
|
||||
.ctrl_ram_offset = DA8XX_EMAC_RAM_OFFSET,
|
||||
.mdio_reg_offset = DA8XX_MDIO_REG_OFFSET,
|
||||
.ctrl_ram_size = DA8XX_EMAC_CTRL_RAM_SIZE,
|
||||
.version = EMAC_VERSION_2,
|
||||
};
|
||||
@@ -395,9 +394,34 @@ static struct platform_device da8xx_emac_device = {
|
||||
.resource = da8xx_emac_resources,
|
||||
};
|
||||
|
||||
static struct resource da8xx_mdio_resources[] = {
|
||||
{
|
||||
.start = DA8XX_EMAC_MDIO_BASE,
|
||||
.end = DA8XX_EMAC_MDIO_BASE + SZ_4K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device da8xx_mdio_device = {
|
||||
.name = "davinci_mdio",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(da8xx_mdio_resources),
|
||||
.resource = da8xx_mdio_resources,
|
||||
};
|
||||
|
||||
int __init da8xx_register_emac(void)
|
||||
{
|
||||
return platform_device_register(&da8xx_emac_device);
|
||||
int ret;
|
||||
|
||||
ret = platform_device_register(&da8xx_mdio_device);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
ret = platform_device_register(&da8xx_emac_device);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
ret = clk_add_alias(NULL, dev_name(&da8xx_mdio_device.dev),
|
||||
NULL, &da8xx_emac_device.dev);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static struct resource da830_mcasp1_resources[] = {
|
||||
@@ -566,6 +590,44 @@ int __init da8xx_register_mmcsd0(struct davinci_mmc_config *config)
|
||||
return platform_device_register(&da8xx_mmcsd0_device);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ARCH_DAVINCI_DA850
|
||||
static struct resource da850_mmcsd1_resources[] = {
|
||||
{ /* registers */
|
||||
.start = DA850_MMCSD1_BASE,
|
||||
.end = DA850_MMCSD1_BASE + SZ_4K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{ /* interrupt */
|
||||
.start = IRQ_DA850_MMCSDINT0_1,
|
||||
.end = IRQ_DA850_MMCSDINT0_1,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{ /* DMA RX */
|
||||
.start = EDMA_CTLR_CHAN(1, 28),
|
||||
.end = EDMA_CTLR_CHAN(1, 28),
|
||||
.flags = IORESOURCE_DMA,
|
||||
},
|
||||
{ /* DMA TX */
|
||||
.start = EDMA_CTLR_CHAN(1, 29),
|
||||
.end = EDMA_CTLR_CHAN(1, 29),
|
||||
.flags = IORESOURCE_DMA,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device da850_mmcsd1_device = {
|
||||
.name = "davinci_mmc",
|
||||
.id = 1,
|
||||
.num_resources = ARRAY_SIZE(da850_mmcsd1_resources),
|
||||
.resource = da850_mmcsd1_resources,
|
||||
};
|
||||
|
||||
int __init da850_register_mmcsd1(struct davinci_mmc_config *config)
|
||||
{
|
||||
da850_mmcsd1_device.dev.platform_data = config;
|
||||
return platform_device_register(&da850_mmcsd1_device);
|
||||
}
|
||||
#endif
|
||||
|
||||
static struct resource da8xx_rtc_resources[] = {
|
||||
{
|
||||
.start = DA8XX_RTC_BASE,
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user