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Merge 3.8-rc5 into char-misc-next
This pulls in all of the 3.8-rc5 fixes into this branch so we can test easier. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
@@ -81,7 +81,8 @@ PA31 TXD4
|
||||
Required properties for pin configuration node:
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||||
- atmel,pins: 4 integers array, represents a group of pins mux and config
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||||
setting. The format is atmel,pins = <PIN_BANK PIN_BANK_NUM PERIPH CONFIG>.
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The PERIPH 0 means gpio.
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The PERIPH 0 means gpio, PERIPH 1 is periph A, PERIPH 2 is periph B...
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PIN_BANK 0 is pioA, PIN_BANK 1 is pioB...
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Bits used for CONFIG:
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PULL_UP (1 << 0): indicate this pin need a pull up.
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@@ -126,7 +127,7 @@ pinctrl@fffff400 {
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pinctrl_dbgu: dbgu-0 {
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atmel,pins =
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<1 14 0x1 0x0 /* PB14 periph A */
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1 15 0x1 0x1>; /* PB15 periph with pullup */
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1 15 0x1 0x1>; /* PB15 periph A with pullup */
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};
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};
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};
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@@ -175,9 +175,9 @@ consists of multiple segments as described below.
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align with the zone size <-|
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|-> align with the segment size
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_________________________________________________________________________
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| | | Node | Segment | Segment | |
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| Superblock | Checkpoint | Address | Info. | Summary | Main |
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| (SB) | (CP) | Table (NAT) | Table (SIT) | Area (SSA) | |
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| | | Segment | Node | Segment | |
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| Superblock | Checkpoint | Info. | Address | Summary | Main |
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| (SB) | (CP) | Table (SIT) | Table (NAT) | Area (SSA) | |
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|____________|_____2______|______N______|______N______|______N_____|__N___|
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. .
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. .
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@@ -200,14 +200,14 @@ consists of multiple segments as described below.
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: It contains file system information, bitmaps for valid NAT/SIT sets, orphan
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inode lists, and summary entries of current active segments.
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- Node Address Table (NAT)
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: It is composed of a block address table for all the node blocks stored in
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Main area.
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- Segment Information Table (SIT)
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: It contains segment information such as valid block count and bitmap for the
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validity of all the blocks.
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- Node Address Table (NAT)
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: It is composed of a block address table for all the node blocks stored in
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Main area.
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- Segment Summary Area (SSA)
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: It contains summary entries which contains the owner information of all the
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data and node blocks stored in Main area.
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@@ -236,13 +236,13 @@ For file system consistency, each CP points to which NAT and SIT copies are
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valid, as shown as below.
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+--------+----------+---------+
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| CP | NAT | SIT |
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| CP | SIT | NAT |
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+--------+----------+---------+
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. . . .
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. . . .
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. . . .
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+-------+-------+--------+--------+--------+--------+
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| CP #0 | CP #1 | NAT #0 | NAT #1 | SIT #0 | SIT #1 |
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| CP #0 | CP #1 | SIT #0 | SIT #1 | NAT #0 | NAT #1 |
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+-------+-------+--------+--------+--------+--------+
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| ^ ^
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| | |
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+1
-1
@@ -6592,7 +6592,7 @@ F: drivers/media/platform/s3c-camif/
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F: include/media/s3c_camif.h
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SERIAL DRIVERS
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M: Alan Cox <alan@linux.intel.com>
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M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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L: linux-serial@vger.kernel.org
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S: Maintained
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F: drivers/tty/serial
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@@ -1,7 +1,7 @@
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VERSION = 3
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PATCHLEVEL = 8
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SUBLEVEL = 0
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EXTRAVERSION = -rc4
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EXTRAVERSION = -rc5
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NAME = Terrified Chipmunk
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# *DOCUMENTATION*
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@@ -169,7 +169,7 @@ SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \
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-e s/arm.*/arm/ -e s/sa110/arm/ \
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-e s/s390x/s390/ -e s/parisc64/parisc/ \
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-e s/ppc.*/powerpc/ -e s/mips.*/mips/ \
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-e s/sh[234].*/sh/ )
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-e s/sh[234].*/sh/ -e s/aarch64.*/arm64/ )
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# Cross compiling and selecting different set of gcc/bin-utils
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# ---------------------------------------------------------------------------
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@@ -26,7 +26,7 @@
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memory {
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device_type = "memory";
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reg = <0x00000000 0x20000000>; /* 512 MB */
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reg = <0x00000000 0x40000000>; /* 1 GB */
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};
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soc {
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@@ -50,27 +50,25 @@
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};
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gpio0: gpio@d0018100 {
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compatible = "marvell,armadaxp-gpio";
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reg = <0xd0018100 0x40>,
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<0xd0018800 0x30>;
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compatible = "marvell,orion-gpio";
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reg = <0xd0018100 0x40>;
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ngpios = <32>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupts-cells = <2>;
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interrupts = <16>, <17>, <18>, <19>;
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interrupts = <82>, <83>, <84>, <85>;
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};
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gpio1: gpio@d0018140 {
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compatible = "marvell,armadaxp-gpio";
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reg = <0xd0018140 0x40>,
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<0xd0018840 0x30>;
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compatible = "marvell,orion-gpio";
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reg = <0xd0018140 0x40>;
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ngpios = <17>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupts-cells = <2>;
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interrupts = <20>, <21>, <22>;
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interrupts = <87>, <88>, <89>;
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};
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};
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};
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@@ -51,39 +51,36 @@
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};
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gpio0: gpio@d0018100 {
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compatible = "marvell,armadaxp-gpio";
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reg = <0xd0018100 0x40>,
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<0xd0018800 0x30>;
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compatible = "marvell,orion-gpio";
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reg = <0xd0018100 0x40>;
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ngpios = <32>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupts-cells = <2>;
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interrupts = <16>, <17>, <18>, <19>;
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interrupts = <82>, <83>, <84>, <85>;
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};
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gpio1: gpio@d0018140 {
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compatible = "marvell,armadaxp-gpio";
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reg = <0xd0018140 0x40>,
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<0xd0018840 0x30>;
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||||
compatible = "marvell,orion-gpio";
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reg = <0xd0018140 0x40>;
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ngpios = <32>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupts-cells = <2>;
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interrupts = <20>, <21>, <22>, <23>;
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interrupts = <87>, <88>, <89>, <90>;
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};
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gpio2: gpio@d0018180 {
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compatible = "marvell,armadaxp-gpio";
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reg = <0xd0018180 0x40>,
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<0xd0018870 0x30>;
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compatible = "marvell,orion-gpio";
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reg = <0xd0018180 0x40>;
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ngpios = <3>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupts-cells = <2>;
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interrupts = <24>;
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interrupts = <91>;
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};
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ethernet@d0034000 {
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@@ -66,39 +66,36 @@
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};
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gpio0: gpio@d0018100 {
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compatible = "marvell,armadaxp-gpio";
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reg = <0xd0018100 0x40>,
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<0xd0018800 0x30>;
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compatible = "marvell,orion-gpio";
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reg = <0xd0018100 0x40>;
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ngpios = <32>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupts-cells = <2>;
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interrupts = <16>, <17>, <18>, <19>;
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interrupts = <82>, <83>, <84>, <85>;
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};
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gpio1: gpio@d0018140 {
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compatible = "marvell,armadaxp-gpio";
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reg = <0xd0018140 0x40>,
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<0xd0018840 0x30>;
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compatible = "marvell,orion-gpio";
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reg = <0xd0018140 0x40>;
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ngpios = <32>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupts-cells = <2>;
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interrupts = <20>, <21>, <22>, <23>;
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interrupts = <87>, <88>, <89>, <90>;
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};
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gpio2: gpio@d0018180 {
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compatible = "marvell,armadaxp-gpio";
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reg = <0xd0018180 0x40>,
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<0xd0018870 0x30>;
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compatible = "marvell,orion-gpio";
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reg = <0xd0018180 0x40>;
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ngpios = <3>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupts-cells = <2>;
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interrupts = <24>;
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interrupts = <91>;
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};
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ethernet@d0034000 {
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@@ -336,8 +336,8 @@
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i2c@0 {
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compatible = "i2c-gpio";
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gpios = <&pioA 23 0 /* sda */
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&pioA 24 0 /* scl */
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gpios = <&pioA 25 0 /* sda */
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&pioA 26 0 /* scl */
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>;
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i2c-gpio,sda-open-drain;
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i2c-gpio,scl-open-drain;
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@@ -143,6 +143,11 @@
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atmel,pins =
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<0 3 0x1 0x0>; /* PA3 periph A */
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};
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pinctrl_usart0_sck: usart0_sck-0 {
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atmel,pins =
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<0 4 0x1 0x0>; /* PA4 periph A */
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};
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};
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usart1 {
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@@ -154,12 +159,17 @@
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pinctrl_usart1_rts: usart1_rts-0 {
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atmel,pins =
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<3 27 0x3 0x0>; /* PC27 periph C */
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<2 27 0x3 0x0>; /* PC27 periph C */
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};
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pinctrl_usart1_cts: usart1_cts-0 {
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atmel,pins =
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<3 28 0x3 0x0>; /* PC28 periph C */
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<2 28 0x3 0x0>; /* PC28 periph C */
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};
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pinctrl_usart1_sck: usart1_sck-0 {
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atmel,pins =
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<2 28 0x3 0x0>; /* PC29 periph C */
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};
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};
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@@ -172,46 +182,56 @@
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pinctrl_uart2_rts: uart2_rts-0 {
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atmel,pins =
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<0 0 0x2 0x0>; /* PB0 periph B */
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<1 0 0x2 0x0>; /* PB0 periph B */
|
||||
};
|
||||
|
||||
pinctrl_uart2_cts: uart2_cts-0 {
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||||
atmel,pins =
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||||
<0 1 0x2 0x0>; /* PB1 periph B */
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<1 1 0x2 0x0>; /* PB1 periph B */
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||||
};
|
||||
|
||||
pinctrl_usart2_sck: usart2_sck-0 {
|
||||
atmel,pins =
|
||||
<1 2 0x2 0x0>; /* PB2 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
usart3 {
|
||||
pinctrl_uart3: usart3-0 {
|
||||
atmel,pins =
|
||||
<3 23 0x2 0x1 /* PC22 periph B with pullup */
|
||||
3 23 0x2 0x0>; /* PC23 periph B */
|
||||
<2 23 0x2 0x1 /* PC22 periph B with pullup */
|
||||
2 23 0x2 0x0>; /* PC23 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart3_rts: usart3_rts-0 {
|
||||
atmel,pins =
|
||||
<3 24 0x2 0x0>; /* PC24 periph B */
|
||||
<2 24 0x2 0x0>; /* PC24 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart3_cts: usart3_cts-0 {
|
||||
atmel,pins =
|
||||
<3 25 0x2 0x0>; /* PC25 periph B */
|
||||
<2 25 0x2 0x0>; /* PC25 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart3_sck: usart3_sck-0 {
|
||||
atmel,pins =
|
||||
<2 26 0x2 0x0>; /* PC26 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
atmel,pins =
|
||||
<3 8 0x3 0x0 /* PC8 periph C */
|
||||
3 9 0x3 0x1>; /* PC9 periph C with pullup */
|
||||
<2 8 0x3 0x0 /* PC8 periph C */
|
||||
2 9 0x3 0x1>; /* PC9 periph C with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
atmel,pins =
|
||||
<3 16 0x3 0x0 /* PC16 periph C */
|
||||
3 17 0x3 0x1>; /* PC17 periph C with pullup */
|
||||
<2 16 0x3 0x0 /* PC16 periph C */
|
||||
2 17 0x3 0x1>; /* PC17 periph C with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
@@ -240,14 +260,14 @@
|
||||
|
||||
pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
|
||||
atmel,pins =
|
||||
<1 8 0x1 0x0 /* PA8 periph A */
|
||||
1 11 0x1 0x0 /* PA11 periph A */
|
||||
1 12 0x1 0x0 /* PA12 periph A */
|
||||
1 13 0x1 0x0 /* PA13 periph A */
|
||||
1 14 0x1 0x0 /* PA14 periph A */
|
||||
1 15 0x1 0x0 /* PA15 periph A */
|
||||
1 16 0x1 0x0 /* PA16 periph A */
|
||||
1 17 0x1 0x0>; /* PA17 periph A */
|
||||
<1 8 0x1 0x0 /* PB8 periph A */
|
||||
1 11 0x1 0x0 /* PB11 periph A */
|
||||
1 12 0x1 0x0 /* PB12 periph A */
|
||||
1 13 0x1 0x0 /* PB13 periph A */
|
||||
1 14 0x1 0x0 /* PB14 periph A */
|
||||
1 15 0x1 0x0 /* PB15 periph A */
|
||||
1 16 0x1 0x0 /* PB16 periph A */
|
||||
1 17 0x1 0x0>; /* PB17 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -96,8 +96,8 @@
|
||||
fifo-depth = <0x80>;
|
||||
card-detect-delay = <200>;
|
||||
samsung,dw-mshc-ciu-div = <3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2 3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2>;
|
||||
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
@@ -120,8 +120,8 @@
|
||||
fifo-depth = <0x80>;
|
||||
card-detect-delay = <200>;
|
||||
samsung,dw-mshc-ciu-div = <3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2 3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2>;
|
||||
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
@@ -141,8 +141,8 @@
|
||||
fifo-depth = <0x80>;
|
||||
card-detect-delay = <200>;
|
||||
samsung,dw-mshc-ciu-div = <3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2 3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2>;
|
||||
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
|
||||
@@ -26,10 +26,15 @@
|
||||
};
|
||||
|
||||
&uart0 { status = "okay"; };
|
||||
&sdio0 { status = "okay"; };
|
||||
&sata0 { status = "okay"; };
|
||||
&i2c0 { status = "okay"; };
|
||||
|
||||
&sdio0 {
|
||||
status = "okay";
|
||||
/* sdio0 card detect is connected to wrong pin on CuBox */
|
||||
cd-gpios = <&gpio0 12 1>;
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
@@ -42,9 +47,14 @@
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
pinctrl-0 = <&pmx_gpio_18>;
|
||||
pinctrl-0 = <&pmx_gpio_12 &pmx_gpio_18>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
pmx_gpio_12: pmx-gpio-12 {
|
||||
marvell,pins = "mpp12";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_gpio_18: pmx-gpio-18 {
|
||||
marvell,pins = "mpp18";
|
||||
marvell,function = "gpio";
|
||||
|
||||
@@ -115,8 +115,8 @@
|
||||
fifo-depth = <0x80>;
|
||||
card-detect-delay = <200>;
|
||||
samsung,dw-mshc-ciu-div = <3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2 3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2>;
|
||||
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
@@ -139,8 +139,8 @@
|
||||
fifo-depth = <0x80>;
|
||||
card-detect-delay = <200>;
|
||||
samsung,dw-mshc-ciu-div = <3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2 3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2>;
|
||||
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
|
||||
@@ -1,4 +1,5 @@
|
||||
/include/ "kirkwood.dtsi"
|
||||
/include/ "kirkwood-6281.dtsi"
|
||||
|
||||
/ {
|
||||
chosen {
|
||||
@@ -6,6 +7,21 @@
|
||||
};
|
||||
|
||||
ocp@f1000000 {
|
||||
pinctrl: pinctrl@10000 {
|
||||
pinctrl-0 = < &pmx_spi &pmx_twsi0 &pmx_uart0
|
||||
&pmx_ns2_sata0 &pmx_ns2_sata1>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
pmx_ns2_sata0: pmx-ns2-sata0 {
|
||||
marvell,pins = "mpp21";
|
||||
marvell,function = "sata0";
|
||||
};
|
||||
pmx_ns2_sata1: pmx-ns2-sata1 {
|
||||
marvell,pins = "mpp20";
|
||||
marvell,function = "sata1";
|
||||
};
|
||||
};
|
||||
|
||||
serial@12000 {
|
||||
clock-frequency = <166666667>;
|
||||
status = "okay";
|
||||
|
||||
@@ -36,6 +36,7 @@
|
||||
reg = <0x10100 0x40>;
|
||||
ngpios = <32>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <35>, <36>, <37>, <38>;
|
||||
};
|
||||
|
||||
@@ -46,6 +47,7 @@
|
||||
reg = <0x10140 0x40>;
|
||||
ngpios = <18>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <39>, <40>, <41>;
|
||||
};
|
||||
|
||||
|
||||
@@ -48,6 +48,8 @@
|
||||
|
||||
macb0: ethernet@fffc4000 {
|
||||
phy-mode = "mii";
|
||||
pinctrl-0 = <&pinctrl_macb_rmii
|
||||
&pinctrl_macb_rmii_mii_alt>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@@ -60,19 +60,21 @@
|
||||
};
|
||||
|
||||
uart0: uart@01c28000 {
|
||||
compatible = "ns8250";
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x01c28000 0x400>;
|
||||
interrupts = <1>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
clock-frequency = <24000000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: uart@01c28400 {
|
||||
compatible = "ns8250";
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x01c28400 0x400>;
|
||||
interrupts = <2>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
clock-frequency = <24000000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
@@ -45,7 +45,6 @@
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
/* A7s disabled till big.LITTLE patches are available...
|
||||
cpu2: cpu@2 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
@@ -63,7 +62,6 @@
|
||||
compatible = "arm,cortex-a7";
|
||||
reg = <0x102>;
|
||||
};
|
||||
*/
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
|
||||
@@ -19,6 +19,7 @@ CONFIG_SOC_AT91SAM9260=y
|
||||
CONFIG_SOC_AT91SAM9263=y
|
||||
CONFIG_SOC_AT91SAM9G45=y
|
||||
CONFIG_SOC_AT91SAM9X5=y
|
||||
CONFIG_SOC_AT91SAM9N12=y
|
||||
CONFIG_MACH_AT91SAM_DT=y
|
||||
CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
|
||||
CONFIG_AT91_TIMER_HZ=128
|
||||
@@ -31,7 +32,7 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
|
||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_ARM_APPENDED_DTB=y
|
||||
CONFIG_ARM_ATAG_DTB_COMPAT=y
|
||||
CONFIG_CMDLINE="mem=128M console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
|
||||
CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_AUTO_ZRELADDR=y
|
||||
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
|
||||
|
||||
@@ -100,12 +100,14 @@ ENTRY(printch)
|
||||
b 1b
|
||||
ENDPROC(printch)
|
||||
|
||||
#ifdef CONFIG_MMU
|
||||
ENTRY(debug_ll_addr)
|
||||
addruart r2, r3, ip
|
||||
str r2, [r0]
|
||||
str r3, [r1]
|
||||
mov pc, lr
|
||||
ENDPROC(debug_ll_addr)
|
||||
#endif
|
||||
|
||||
#else
|
||||
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user