Merge branch 'earlycon-dt' into for-next

This commit is contained in:
Rob Herring
2014-05-28 11:23:39 -05:00
51 changed files with 3596 additions and 1098 deletions
@@ -0,0 +1,33 @@
* NXP SC16IS7xx advanced Universal Asynchronous Receiver-Transmitter (UART)
Required properties:
- compatible: Should be one of the following:
- "nxp,sc16is740" for NXP SC16IS740,
- "nxp,sc16is741" for NXP SC16IS741,
- "nxp,sc16is750" for NXP SC16IS750,
- "nxp,sc16is752" for NXP SC16IS752,
- "nxp,sc16is760" for NXP SC16IS760,
- "nxp,sc16is762" for NXP SC16IS762.
- reg: I2C address of the SC16IS7xx device.
- interrupt-parent: The phandle for the interrupt controller that
services interrupts for this IC.
- interrupts: Should contain the UART interrupt
- clocks: Reference to the IC source clock.
Optional properties:
- gpio-controller: Marks the device node as a GPIO controller.
- #gpio-cells: Should be two. The first cell is the GPIO number and
the second cell is used to specify the GPIO polarity:
0 = active high,
1 = active low.
Example:
sc16is750: sc16is750@51 {
compatible = "nxp,sc16is750";
reg = <0x51>;
clocks = <&clk20m>;
interrupt-parent = <&gpio3>;
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
gpio-controller;
#gpio-cells = <2>;
};
+9
View File
@@ -883,6 +883,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
which are not unmapped.
earlycon= [KNL] Output early console device and options.
uart[8250],io,<addr>[,options]
uart[8250],mmio,<addr>[,options]
uart[8250],mmio32,<addr>[,options]
@@ -892,6 +893,14 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
(mmio) or 32-bit (mmio32).
The options are the same as for ttyS, above.
pl011,<addr>
Start an early, polled-mode console on a pl011 serial
port at the specified address. The pl011 serial port
must already be setup and configured. Options are not
yet supported.
smh Use ARM semihosting calls for early console.
earlyprintk= [X86,SH,BLACKFIN,ARM]
earlyprintk=vga
earlyprintk=efi
+7 -4
View File
@@ -33,18 +33,21 @@ void __init early_init_dt_add_memory_arch(u64 base, u64 size)
}
#ifdef CONFIG_SMP
extern struct of_cpu_method __cpu_method_of_table_begin[];
extern struct of_cpu_method __cpu_method_of_table_end[];
extern struct of_cpu_method __cpu_method_of_table[];
static const struct of_cpu_method __cpu_method_of_table_sentinel
__used __section(__cpu_method_of_table_end);
static int __init set_smp_ops_by_method(struct device_node *node)
{
const char *method;
struct of_cpu_method *m = __cpu_method_of_table_begin;
struct of_cpu_method *m = __cpu_method_of_table;
if (of_property_read_string(node, "enable-method", &method))
return 0;
for (; m < __cpu_method_of_table_end; m++)
for (; m->method; m++)
if (!strcmp(m->method, method)) {
smp_set_ops(m->ops);
return 1;
+1 -3
View File
@@ -289,14 +289,12 @@ int __init mx35_clocks_init(void)
return 0;
}
static int __init mx35_clocks_init_dt(struct device_node *ccm_node)
static void __init mx35_clocks_init_dt(struct device_node *ccm_node)
{
clk_data.clks = clk;
clk_data.clk_num = ARRAY_SIZE(clk);
of_clk_add_provider(ccm_node, of_clk_src_onecell_get, &clk_data);
mx35_clocks_init();
return 0;
}
CLK_OF_DECLARE(imx35, "fsl,imx35-ccm", mx35_clocks_init_dt);
+3
View File
@@ -112,6 +112,9 @@ config IOMMU_HELPER
config KERNEL_MODE_NEON
def_bool y
config FIX_EARLYCON_MEM
def_bool y
source "init/Kconfig"
source "kernel/Kconfig.freezer"
-9
View File
@@ -20,15 +20,6 @@ config STRICT_DEVMEM
If in doubt, say Y.
config EARLY_PRINTK
bool "Early printk support"
default y
help
Say Y here if you want to have an early console using the
earlyprintk=<name>[,<addr>][,<options>] kernel parameter. It
is assumed that the early console device has been initialised
by the boot loader prior to starting the Linux kernel.
config PID_IN_CONTEXTIDR
bool "Write the current PID to the CONTEXTIDR register"
help
-1
View File
@@ -18,7 +18,6 @@ arm64-obj-$(CONFIG_SMP) += smp.o smp_spin_table.o topology.o
arm64-obj-$(CONFIG_PERF_EVENTS) += perf_regs.o
arm64-obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o
arm64-obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
arm64-obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
arm64-obj-$(CONFIG_ARM64_CPU_SUSPEND) += sleep.o suspend.o
arm64-obj-$(CONFIG_JUMP_LABEL) += jump_label.o
arm64-obj-$(CONFIG_KGDB) += kgdb.o
-156
View File
@@ -1,156 +0,0 @@
/*
* Earlyprintk support.
*
* Copyright (C) 2012 ARM Ltd.
* Author: Catalin Marinas <catalin.marinas@arm.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <linux/kernel.h>
#include <linux/console.h>
#include <linux/init.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/io.h>
#include <linux/amba/serial.h>
#include <linux/serial_reg.h>
#include <asm/fixmap.h>
static void __iomem *early_base;
static void (*printch)(char ch);
/*
* PL011 single character TX.
*/
static void pl011_printch(char ch)
{
while (readl_relaxed(early_base + UART01x_FR) & UART01x_FR_TXFF)
;
writeb_relaxed(ch, early_base + UART01x_DR);
while (readl_relaxed(early_base + UART01x_FR) & UART01x_FR_BUSY)
;
}
/*
* Semihosting-based debug console
*/
static void smh_printch(char ch)
{
asm volatile("mov x1, %0\n"
"mov x0, #3\n"
"hlt 0xf000\n"
: : "r" (&ch) : "x0", "x1", "memory");
}
/*
* 8250/16550 (8-bit aligned registers) single character TX.
*/
static void uart8250_8bit_printch(char ch)
{
while (!(readb_relaxed(early_base + UART_LSR) & UART_LSR_THRE))
;
writeb_relaxed(ch, early_base + UART_TX);
}
/*
* 8250/16550 (32-bit aligned registers) single character TX.
*/
static void uart8250_32bit_printch(char ch)
{
while (!(readl_relaxed(early_base + (UART_LSR << 2)) & UART_LSR_THRE))
;
writel_relaxed(ch, early_base + (UART_TX << 2));
}
struct earlycon_match {
const char *name;
void (*printch)(char ch);
};
static const struct earlycon_match earlycon_match[] __initconst = {
{ .name = "pl011", .printch = pl011_printch, },
{ .name = "smh", .printch = smh_printch, },
{ .name = "uart8250-8bit", .printch = uart8250_8bit_printch, },
{ .name = "uart8250-32bit", .printch = uart8250_32bit_printch, },
{}
};
static void early_write(struct console *con, const char *s, unsigned n)
{
while (n-- > 0) {
if (*s == '\n')
printch('\r');
printch(*s);
s++;
}
}
static struct console early_console_dev = {
.name = "earlycon",
.write = early_write,
.flags = CON_PRINTBUFFER | CON_BOOT,
.index = -1,
};
/*
* Parse earlyprintk=... parameter in the format:
*
* <name>[,<addr>][,<options>]
*
* and register the early console. It is assumed that the UART has been
* initialised by the bootloader already.
*/
static int __init setup_early_printk(char *buf)
{
const struct earlycon_match *match = earlycon_match;
phys_addr_t paddr = 0;
if (!buf) {
pr_warning("No earlyprintk arguments passed.\n");
return 0;
}
while (match->name) {
size_t len = strlen(match->name);
if (!strncmp(buf, match->name, len)) {
buf += len;
break;
}
match++;
}
if (!match->name) {
pr_warning("Unknown earlyprintk arguments: %s\n", buf);
return 0;
}
/* I/O address */
if (!strncmp(buf, ",0x", 3)) {
char *e;
paddr = simple_strtoul(buf + 1, &e, 16);
buf = e;
}
/* no options parsing yet */
if (paddr)
early_base = (void __iomem *)set_fixmap_offset_io(FIX_EARLYCON_MEM_BASE, paddr);
printch = match->printch;
early_console = &early_console_dev;
register_console(&early_console_dev);
return 0;
}
early_param("earlyprintk", setup_early_printk);
+3
View File
@@ -261,6 +261,9 @@ config ARCH_HWEIGHT_CFLAGS
config ARCH_SUPPORTS_UPROBES
def_bool y
config FIX_EARLYCON_MEM
def_bool y
source "init/Kconfig"
source "kernel/Kconfig.freezer"
+19 -5
View File
@@ -118,10 +118,6 @@ static inline struct sk_buff *hci_uart_dequeue(struct hci_uart *hu)
int hci_uart_tx_wakeup(struct hci_uart *hu)
{
struct tty_struct *tty = hu->tty;
struct hci_dev *hdev = hu->hdev;
struct sk_buff *skb;
if (test_and_set_bit(HCI_UART_SENDING, &hu->tx_state)) {
set_bit(HCI_UART_TX_WAKEUP, &hu->tx_state);
return 0;
@@ -129,6 +125,22 @@ int hci_uart_tx_wakeup(struct hci_uart *hu)
BT_DBG("");
schedule_work(&hu->write_work);
return 0;
}
static void hci_uart_write_work(struct work_struct *work)
{
struct hci_uart *hu = container_of(work, struct hci_uart, write_work);
struct tty_struct *tty = hu->tty;
struct hci_dev *hdev = hu->hdev;
struct sk_buff *skb;
/* REVISIT: should we cope with bad skbs or ->write() returning
* and error value ?
*/
restart:
clear_bit(HCI_UART_TX_WAKEUP, &hu->tx_state);
@@ -153,7 +165,6 @@ restart:
goto restart;
clear_bit(HCI_UART_SENDING, &hu->tx_state);
return 0;
}
static void hci_uart_init_work(struct work_struct *work)
@@ -282,6 +293,7 @@ static int hci_uart_tty_open(struct tty_struct *tty)
tty->receive_room = 65536;
INIT_WORK(&hu->init_ready, hci_uart_init_work);
INIT_WORK(&hu->write_work, hci_uart_write_work);
spin_lock_init(&hu->rx_lock);
@@ -319,6 +331,8 @@ static void hci_uart_tty_close(struct tty_struct *tty)
if (hdev)
hci_uart_close(hdev);
cancel_work_sync(&hu->write_work);
if (test_and_clear_bit(HCI_UART_PROTO_SET, &hu->flags)) {
if (hdev) {
if (test_bit(HCI_UART_REGISTERED, &hu->flags))
+1
View File
@@ -68,6 +68,7 @@ struct hci_uart {
unsigned long hdev_flags;
struct work_struct init_ready;
struct work_struct write_work;
struct hci_uart_proto *proto;
void *priv;
+1 -2
View File
@@ -24,8 +24,7 @@ static DEFINE_SPINLOCK(clk_lock);
* Gate clocks
*/
static void __init rk2928_gate_clk_init(struct device_node *node,
void *data)
static void __init rk2928_gate_clk_init(struct device_node *node)
{
struct clk_onecell_data *clk_data;
const char *clk_parent;
+2 -3
View File
@@ -1278,8 +1278,7 @@ static void __init of_sunxi_table_clock_setup(const struct of_device_id *clk_mat
const struct of_device_id *match;
void (*setup_function)(struct device_node *, const void *) = function;
for_each_matching_node(np, clk_match) {
match = of_match_node(clk_match, np);
for_each_matching_node_and_match(np, clk_match, &match) {
data = match->data;
setup_function(np, data);
}
@@ -1310,7 +1309,7 @@ static void __init sunxi_clock_protect(void)
}
}
static void __init sunxi_init_clocks(void)
static void __init sunxi_init_clocks(struct device_node *np)
{
/* Register factor clocks */
of_sunxi_table_clock_setup(clk_factors_match, sunxi_factors_clk_setup);
+1 -1
View File
@@ -221,7 +221,7 @@ static void __init of_ti_gate_clk_setup(struct device_node *node)
{
_of_ti_gate_clk_setup(node, &omap_gate_clk_ops, NULL);
}
CLK_OF_DECLARE(ti_gate_clk, "ti,gate-clock", of_ti_gate_clk_setup)
CLK_OF_DECLARE(ti_gate_clk, "ti,gate-clock", of_ti_gate_clk_setup);
static void __init of_ti_wait_gate_clk_setup(struct device_node *node)
{
+1 -1
View File
@@ -27,7 +27,7 @@ void __init clocksource_of_init(void)
{
struct device_node *np;
const struct of_device_id *match;
clocksource_of_init_fn init_func;
of_init_fn_1 init_func;
unsigned clocksources = 0;
for_each_matching_node_and_match(np, __clksrc_of_table, &match) {
+2 -2
View File
@@ -96,7 +96,7 @@ static struct irq_domain_ops icoll_irq_domain_ops = {
.xlate = irq_domain_xlate_onecell,
};
static void __init icoll_of_init(struct device_node *np,
static int __init icoll_of_init(struct device_node *np,
struct device_node *interrupt_parent)
{
icoll_base = of_iomap(np, 0);
@@ -110,6 +110,6 @@ static void __init icoll_of_init(struct device_node *np,
icoll_domain = irq_domain_add_linear(np, ICOLL_NUM_IRQS,
&icoll_irq_domain_ops, NULL);
WARN_ON(!icoll_domain);
return icoll_domain ? 0 : -ENODEV;
}
IRQCHIP_DECLARE(mxs, "fsl,icoll", icoll_of_init);
+2 -4
View File
@@ -1323,8 +1323,7 @@ static struct s3c24xx_irq_of_ctrl s3c2410_ctrl[] = {
};
int __init s3c2410_init_intc_of(struct device_node *np,
struct device_node *interrupt_parent,
struct s3c24xx_irq_of_ctrl *ctrl, int num_ctrl)
struct device_node *interrupt_parent)
{
return s3c_init_intc_of(np, interrupt_parent,
s3c2410_ctrl, ARRAY_SIZE(s3c2410_ctrl));
@@ -1346,8 +1345,7 @@ static struct s3c24xx_irq_of_ctrl s3c2416_ctrl[] = {
};
int __init s3c2416_init_intc_of(struct device_node *np,
struct device_node *interrupt_parent,
struct s3c24xx_irq_of_ctrl *ctrl, int num_ctrl)
struct device_node *interrupt_parent)
{
return s3c_init_intc_of(np, interrupt_parent,
s3c2416_ctrl, ARRAY_SIZE(s3c2416_ctrl));
+3 -3
View File
@@ -19,11 +19,11 @@
* special section.
*/
static const struct of_device_id
irqchip_of_match_end __used __section(__irqchip_of_end);
irqchip_of_match_end __used __section(__irqchip_of_table_end);
extern struct of_device_id __irqchip_begin[];
extern struct of_device_id __irqchip_of_table[];
void __init irqchip_init(void)
{
of_irq_init(__irqchip_begin);
of_irq_init(__irqchip_of_table);
}
+3 -4
View File
@@ -11,6 +11,8 @@
#ifndef _IRQCHIP_H
#define _IRQCHIP_H
#include <linux/of.h>
/*
* This macro must be used by the different irqchip drivers to declare
* the association between their DT compatible string and their
@@ -21,9 +23,6 @@
* @compstr: compatible string of the irqchip driver
* @fn: initialization function
*/
#define IRQCHIP_DECLARE(name,compstr,fn) \
static const struct of_device_id irqchip_of_match_##name \
__used __section(__irqchip_of_table) \
= { .compatible = compstr, .data = fn }
#define IRQCHIP_DECLARE(name, compat, fn) OF_DECLARE_2(irqchip, name, compat, fn)
#endif
+2
View File
@@ -1,5 +1,6 @@
obj-y = base.o device.o platform.o
obj-$(CONFIG_OF_FLATTREE) += fdt.o
obj-$(CONFIG_OF_EARLY_FLATTREE) += fdt_address.o
obj-$(CONFIG_OF_PROMTREE) += pdt.o
obj-$(CONFIG_OF_ADDRESS) += address.o
obj-$(CONFIG_OF_IRQ) += irq.o
@@ -12,3 +13,4 @@ obj-$(CONFIG_OF_MTD) += of_mtd.o
obj-$(CONFIG_OF_RESERVED_MEM) += of_reserved_mem.o
CFLAGS_fdt.o = -I$(src)/../../scripts/dtc/libfdt
CFLAGS_fdt_address.o = -I$(src)/../../scripts/dtc/libfdt

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