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Merge tag 'for-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI changes from Bjorn Helgaas:
"Host bridge hotplug:
- Add MMCONFIG support for hot-added host bridges (Jiang Liu)
Device hotplug:
- Move fixups from __init to __devinit (Sebastian Andrzej Siewior)
- Call FINAL fixups for hot-added devices, too (Myron Stowe)
- Factor out generic code for P2P bridge hot-add (Yinghai Lu)
- Remove all functions in a slot, not just those with _EJx (Amos
Kong)
Dynamic resource management:
- Track bus number allocation (struct resource tree per domain)
(Yinghai Lu)
- Make P2P bridge 1K I/O windows work with resource reassignment
(Bjorn Helgaas, Yinghai Lu)
- Disable decoding while updating 64-bit BARs (Bjorn Helgaas)
Power management:
- Add PCIe runtime D3cold support (Huang Ying)
Virtualization:
- Add VFIO infrastructure (ACS, DMA source ID quirks) (Alex
Williamson)
- Add quirks for devices with broken INTx masking (Jan Kiszka)
Miscellaneous:
- Fix some PCI Express capability version issues (Myron Stowe)
- Factor out some arch code with a weak, generic, pcibios_setup()
(Myron Stowe)"
* tag 'for-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (122 commits)
PCI: hotplug: ensure a consistent return value in error case
PCI: fix undefined reference to 'pci_fixup_final_inited'
PCI: build resource code for M68K architecture
PCI: pciehp: remove unused pciehp_get_max_lnk_width(), pciehp_get_cur_lnk_width()
PCI: reorder __pci_assign_resource() (no change)
PCI: fix truncation of resource size to 32 bits
PCI: acpiphp: merge acpiphp_debug and debug
PCI: acpiphp: remove unused res_lock
sparc/PCI: replace pci_cfg_fake_ranges() with pci_read_bridge_bases()
PCI: call final fixups hot-added devices
PCI: move final fixups from __init to __devinit
x86/PCI: move final fixups from __init to __devinit
MIPS/PCI: move final fixups from __init to __devinit
PCI: support sizing P2P bridge I/O windows with 1K granularity
PCI: reimplement P2P bridge 1K I/O windows (Intel P64H2)
PCI: disable MEM decoding while updating 64-bit MEM BARs
PCI: leave MEM and IO decoding disabled during 64-bit BAR sizing, too
PCI: never discard enable/suspend/resume_early/resume fixups
PCI: release temporary reference in __nv_msi_ht_cap_quirk()
PCI: restructure 'pci_do_fixups()'
...
This commit is contained in:
+1
-1
@@ -5210,7 +5210,7 @@ PCI SUBSYSTEM
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M: Bjorn Helgaas <bhelgaas@google.com>
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L: linux-pci@vger.kernel.org
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Q: http://patchwork.ozlabs.org/project/linux-pci/list/
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/linux.git
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git
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S: Supported
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F: Documentation/PCI/
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F: drivers/pci/
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+4
-13
@@ -59,15 +59,13 @@ struct pci_controller *pci_isa_hose;
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* Quirks.
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*/
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static void __init
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quirk_isa_bridge(struct pci_dev *dev)
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static void __devinit quirk_isa_bridge(struct pci_dev *dev)
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{
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dev->class = PCI_CLASS_BRIDGE_ISA << 8;
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82378, quirk_isa_bridge);
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static void __init
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quirk_cypress(struct pci_dev *dev)
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static void __devinit quirk_cypress(struct pci_dev *dev)
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{
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/* The Notorious Cy82C693 chip. */
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@@ -106,8 +104,7 @@ quirk_cypress(struct pci_dev *dev)
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, quirk_cypress);
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/* Called for each device after PCI setup is done. */
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static void __init
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pcibios_fixup_final(struct pci_dev *dev)
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static void __devinit pcibios_fixup_final(struct pci_dev *dev)
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{
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unsigned int class = dev->class >> 8;
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@@ -198,12 +195,6 @@ pcibios_init(void)
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subsys_initcall(pcibios_init);
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char * __devinit
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pcibios_setup(char *str)
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{
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return str;
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}
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#ifdef ALPHA_RESTORE_SRM_SETUP
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static struct pdev_srm_saved_conf *srm_saved_configs;
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@@ -359,7 +350,7 @@ common_init_pci(void)
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hose, &resources);
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hose->bus = bus;
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hose->need_domain_info = need_domain_info;
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next_busno = bus->subordinate + 1;
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next_busno = bus->busn_res.end + 1;
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/* Don't allow 8-bit bus number overflow inside the hose -
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reserve some space for bridges. */
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if (next_busno > 224) {
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@@ -253,7 +253,7 @@ static void __devinit pci_fixup_cy82c693(struct pci_dev *dev)
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}
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, pci_fixup_cy82c693);
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static void __init pci_fixup_it8152(struct pci_dev *dev)
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static void __devinit pci_fixup_it8152(struct pci_dev *dev)
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{
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int i;
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/* fixup for ITE 8152 devices */
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@@ -461,7 +461,7 @@ static void __init pcibios_init_hw(struct hw_pci *hw, struct list_head *head)
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if (!sys->bus)
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panic("PCI: unable to scan bus!");
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busnr = sys->bus->subordinate + 1;
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busnr = sys->bus->busn_res.end + 1;
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list_add(&sys->node, head);
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} else {
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@@ -6,11 +6,6 @@ void __devinit pcibios_fixup_bus(struct pci_bus *b)
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{
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}
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char * __devinit pcibios_setup(char *str)
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{
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return NULL;
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}
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void pcibios_set_master(struct pci_dev *dev)
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{
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u8 lat;
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@@ -268,7 +268,7 @@ static void __init pci_fixup_umc_ide(struct pci_dev *d)
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d->resource[i].flags |= PCI_BASE_ADDRESS_SPACE_IO;
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}
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static void __init pci_fixup_ide_bases(struct pci_dev *d)
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static void __devinit pci_fixup_ide_bases(struct pci_dev *d)
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{
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int i;
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@@ -287,7 +287,7 @@ static void __init pci_fixup_ide_bases(struct pci_dev *d)
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}
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}
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static void __init pci_fixup_ide_trash(struct pci_dev *d)
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static void __devinit pci_fixup_ide_trash(struct pci_dev *d)
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{
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int i;
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+3
-10
@@ -351,6 +351,8 @@ pci_acpi_scan_root(struct acpi_pci_root *root)
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#endif
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INIT_LIST_HEAD(&info.resources);
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/* insert busn resource at first */
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pci_add_resource(&info.resources, &root->secondary);
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acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_window,
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&windows);
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if (windows) {
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@@ -384,7 +386,7 @@ pci_acpi_scan_root(struct acpi_pci_root *root)
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return NULL;
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}
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pbus->subordinate = pci_scan_child_bus(pbus);
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pci_scan_child_bus(pbus);
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return pbus;
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out3:
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@@ -496,15 +498,6 @@ pcibios_align_resource (void *data, const struct resource *res,
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return res->start;
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}
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/*
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* PCI BIOS setup, always defaults to SAL interface
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*/
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char * __init
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pcibios_setup (char *str)
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{
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return str;
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}
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int
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pci_mmap_page_range (struct pci_dev *dev, struct vm_area_struct *vma,
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enum pci_mmap_state mmap_state, int write_combine)
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@@ -192,11 +192,6 @@ void pcibios_set_master(struct pci_dev *dev)
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/* No special bus mastering setup handling */
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}
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char __devinit *pcibios_setup(char *str)
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{
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return str;
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}
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/*
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* Reads the interrupt pin to determine if interrupt is use by card.
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* If the interrupt is used, then gets the interrupt line from the
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@@ -1504,10 +1499,10 @@ static void __devinit pcibios_scan_phb(struct pci_controller *hose)
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pci_free_resource_list(&resources);
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return;
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}
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bus->secondary = hose->first_busno;
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bus->busn_res.start = hose->first_busno;
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hose->bus = bus;
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hose->last_busno = bus->subordinate;
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hose->last_busno = bus->busn_res.end;
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}
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static int __init pcibios_init(void)
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+3
-3
@@ -102,7 +102,7 @@ static void __devinit pcibios_scanbus(struct pci_controller *hose)
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need_domain_info = need_domain_info || hose->index;
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hose->need_domain_info = need_domain_info;
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if (bus) {
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next_busno = bus->subordinate + 1;
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next_busno = bus->busn_res.end + 1;
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/* Don't allow 8-bit bus number overflow inside the hose -
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reserve some space for bridges. */
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if (next_busno > 224) {
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@@ -348,9 +348,9 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
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vma->vm_end - vma->vm_start, vma->vm_page_prot);
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}
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char * (*pcibios_plat_setup)(char *str) __devinitdata;
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char * (*pcibios_plat_setup)(char *str) __initdata;
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char *__devinit pcibios_setup(char *str)
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char *__init pcibios_setup(char *str)
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{
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if (pcibios_plat_setup)
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return pcibios_plat_setup(str);
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@@ -395,17 +395,6 @@ void __init pcibios_init(void)
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pci_scan_bus(3, &titan_pci_ops, NULL);
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}
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/*
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* for parsing "pci=" kernel boot arguments.
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*/
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char *pcibios_setup(char *str)
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{
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printk(KERN_INFO "rr: pcibios_setup\n");
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/* Nothing to do for now. */
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return str;
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}
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unsigned __init int pcibios_assign_all_busses(void)
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{
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/* We want to use the PCI bus detection done by PMON */
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@@ -256,7 +256,7 @@ static irqreturn_t i8259_interrupt(int irq, void *dev_id)
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return IRQ_HANDLED;
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}
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static int __init
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static int __devinit
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txx9_i8259_irq_setup(int irq)
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{
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int err;
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@@ -398,9 +398,9 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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return txx9_board_vec->pci_map_irq(dev, slot, pin);
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}
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char * (*txx9_board_pcibios_setup)(char *str) __devinitdata;
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char * (*txx9_board_pcibios_setup)(char *str) __initdata;
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char *__devinit txx9_pcibios_setup(char *str)
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char *__init txx9_pcibios_setup(char *str)
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{
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if (txx9_board_pcibios_setup && !txx9_board_pcibios_setup(str))
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return NULL;
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@@ -139,11 +139,6 @@ void pcibios_fixup_bus(struct pci_bus *bus)
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}
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char *pcibios_setup(char *str)
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{
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return str;
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}
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/*
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* Called by pci_set_master() - a driver interface.
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*
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@@ -30,6 +30,7 @@ struct pci_controller {
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int first_busno;
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int last_busno;
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int self_busno;
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struct resource busn;
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void __iomem *io_base_virt;
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#ifdef CONFIG_PPC64
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@@ -200,11 +200,6 @@ int pcibios_add_platform_entries(struct pci_dev *pdev)
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return device_create_file(&pdev->dev, &dev_attr_devspec);
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}
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char __devinit *pcibios_setup(char *str)
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{
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return str;
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}
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/*
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* Reads the interrupt pin to determine if interrupt is use by card.
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* If the interrupt is used, then gets the interrupt line from the
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@@ -1635,6 +1630,11 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
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/* Wire up PHB bus resources */
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pcibios_setup_phb_resources(hose, &resources);
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hose->busn.start = hose->first_busno;
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hose->busn.end = hose->last_busno;
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hose->busn.flags = IORESOURCE_BUS;
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pci_add_resource(&resources, &hose->busn);
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/* Create an empty bus for the toplevel */
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bus = pci_create_root_bus(hose->parent, hose->first_busno,
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hose->ops, hose, &resources);
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@@ -1651,13 +1651,14 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
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if (node && ppc_md.pci_probe_mode)
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mode = ppc_md.pci_probe_mode(bus);
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pr_debug(" probe mode: %d\n", mode);
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if (mode == PCI_PROBE_DEVTREE) {
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bus->subordinate = hose->last_busno;
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if (mode == PCI_PROBE_DEVTREE)
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of_scan_bus(node, bus);
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}
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if (mode == PCI_PROBE_NORMAL)
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hose->last_busno = bus->subordinate = pci_scan_child_bus(bus);
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if (mode == PCI_PROBE_NORMAL) {
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pci_bus_update_busn_res_end(bus, 255);
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hose->last_busno = pci_scan_child_bus(bus);
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pci_bus_update_busn_res_end(bus, hose->last_busno);
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}
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/* Platform gets a chance to do some global fixups before
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* we proceed to resource allocation
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@@ -236,7 +236,7 @@ long sys_pciconfig_iobase(long which, unsigned long in_bus,
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for (ln = pci_root_buses.next; ln != &pci_root_buses; ln = ln->next) {
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bus = pci_bus_b(ln);
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if (in_bus >= bus->number && in_bus <= bus->subordinate)
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if (in_bus >= bus->number && in_bus <= bus->busn_res.end)
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break;
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bus = NULL;
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}
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@@ -239,7 +239,7 @@ void __devinit of_scan_pci_bridge(struct pci_dev *dev)
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}
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bus->primary = dev->bus->number;
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bus->subordinate = busrange[1];
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pci_bus_insert_busn_res(bus, busrange[0], busrange[1]);
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bus->bridge_ctl = 0;
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/* parse ranges property */
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@@ -102,7 +102,7 @@ static void tqm85xx_show_cpuinfo(struct seq_file *m)
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seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
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}
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static void __init tqm85xx_ti1520_fixup(struct pci_dev *pdev)
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static void __devinit tqm85xx_ti1520_fixup(struct pci_dev *pdev)
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{
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unsigned int val;
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@@ -164,7 +164,7 @@ static void gef_ppc9a_show_cpuinfo(struct seq_file *m)
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gef_ppc9a_get_vme_is_syscon() ? "yes" : "no");
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}
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static void __init gef_ppc9a_nec_fixup(struct pci_dev *pdev)
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static void __devinit gef_ppc9a_nec_fixup(struct pci_dev *pdev)
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{
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unsigned int val;
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@@ -152,7 +152,7 @@ static void gef_sbc310_show_cpuinfo(struct seq_file *m)
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}
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static void __init gef_sbc310_nec_fixup(struct pci_dev *pdev)
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static void __devinit gef_sbc310_nec_fixup(struct pci_dev *pdev)
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{
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unsigned int val;
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@@ -141,7 +141,7 @@ static void gef_sbc610_show_cpuinfo(struct seq_file *m)
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seq_printf(m, "SVR\t\t: 0x%x\n", svid);
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}
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static void __init gef_sbc610_nec_fixup(struct pci_dev *pdev)
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static void __devinit gef_sbc610_nec_fixup(struct pci_dev *pdev)
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{
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unsigned int val;
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@@ -589,7 +589,7 @@ static int __devinit pnv_ioda_configure_pe(struct pnv_phb *phb,
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dcomp = OPAL_IGNORE_RID_DEVICE_NUMBER;
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fcomp = OPAL_IGNORE_RID_FUNCTION_NUMBER;
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parent = pe->pbus->self;
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count = pe->pbus->subordinate - pe->pbus->secondary + 1;
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count = pe->pbus->busn_res.end - pe->pbus->busn_res.start + 1;
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switch(count) {
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case 1: bcomp = OpalPciBusAll; break;
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case 2: bcomp = OpalPciBus7Bits; break;
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@@ -816,11 +816,11 @@ static void __devinit pnv_ioda_setup_bus_PE(struct pci_dev *dev,
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pe->pdev = NULL;
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pe->tce32_seg = -1;
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pe->mve_number = -1;
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pe->rid = bus->secondary << 8;
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pe->rid = bus->busn_res.start << 8;
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pe->dma_weight = 0;
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pe_info(pe, "Secondary busses %d..%d associated with PE\n",
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bus->secondary, bus->subordinate);
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pe_info(pe, "Secondary busses %pR associated with PE\n",
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&bus->busn_res);
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if (pnv_ioda_configure_pe(phb, pe)) {
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/* XXX What do we do here ? */
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||||
|
||||
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