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gma500: Add support for Cedarview
Again this is similar but has some differences so we have a set of plug in support. This does make the driver bigger than is needed in some respects but the tradeoff for maintainability is huge. Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Alan Cox
Dave Airlie
@@ -0,0 +1,351 @@
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/**************************************************************************
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* Copyright (c) 2011, Intel Corporation.
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* All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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*
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**************************************************************************/
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#include <linux/backlight.h>
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#include <drm/drmP.h>
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#include <drm/drm.h>
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#include "psb_drm.h"
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#include "psb_drv.h"
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#include "psb_reg.h"
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#include "psb_intel_reg.h"
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#include "intel_bios.h"
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#include "cdv_device.h"
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#define VGA_SR_INDEX 0x3c4
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#define VGA_SR_DATA 0x3c5
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/* FIXME: should check if we are the active VGA device ?? */
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static void cdv_disable_vga(struct drm_device *dev)
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{
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u8 sr1;
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u32 vga_reg;
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vga_reg = VGACNTRL;
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outb(1, VGA_SR_INDEX);
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sr1 = inb(VGA_SR_DATA);
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outb(sr1 | 1<<5, VGA_SR_DATA);
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udelay(300);
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REG_WRITE(vga_reg, VGA_DISP_DISABLE);
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REG_READ(vga_reg);
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}
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static int cdv_output_init(struct drm_device *dev)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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cdv_disable_vga(dev);
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cdv_intel_crt_init(dev, &dev_priv->mode_dev);
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cdv_intel_lvds_init(dev, &dev_priv->mode_dev);
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/* These bits indicate HDMI not SDVO on CDV, but we don't yet support
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the HDMI interface */
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if (REG_READ(SDVOB) & SDVO_DETECTED)
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cdv_hdmi_init(dev, &dev_priv->mode_dev, SDVOB);
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if (REG_READ(SDVOC) & SDVO_DETECTED)
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cdv_hdmi_init(dev, &dev_priv->mode_dev, SDVOC);
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return 0;
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}
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#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
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/*
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* Poulsbo Backlight Interfaces
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*/
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#define BLC_PWM_PRECISION_FACTOR 100 /* 10000000 */
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#define BLC_PWM_FREQ_CALC_CONSTANT 32
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#define MHz 1000000
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#define PSB_BLC_PWM_PRECISION_FACTOR 10
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#define PSB_BLC_MAX_PWM_REG_FREQ 0xFFFE
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#define PSB_BLC_MIN_PWM_REG_FREQ 0x2
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#define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
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#define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
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static int cdv_brightness;
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static struct backlight_device *cdv_backlight_device;
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static int cdv_get_brightness(struct backlight_device *bd)
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{
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/* return locally cached var instead of HW read (due to DPST etc.) */
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/* FIXME: ideally return actual value in case firmware fiddled with
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it */
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return cdv_brightness;
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}
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static int cdv_backlight_setup(struct drm_device *dev)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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unsigned long core_clock;
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/* u32 bl_max_freq; */
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/* unsigned long value; */
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u16 bl_max_freq;
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uint32_t value;
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uint32_t blc_pwm_precision_factor;
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/* get bl_max_freq and pol from dev_priv*/
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if (!dev_priv->lvds_bl) {
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dev_err(dev->dev, "Has no valid LVDS backlight info\n");
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return -ENOENT;
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}
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bl_max_freq = dev_priv->lvds_bl->freq;
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blc_pwm_precision_factor = PSB_BLC_PWM_PRECISION_FACTOR;
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core_clock = dev_priv->core_freq;
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value = (core_clock * MHz) / BLC_PWM_FREQ_CALC_CONSTANT;
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value *= blc_pwm_precision_factor;
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value /= bl_max_freq;
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value /= blc_pwm_precision_factor;
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if (value > (unsigned long long)PSB_BLC_MAX_PWM_REG_FREQ ||
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value < (unsigned long long)PSB_BLC_MIN_PWM_REG_FREQ)
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return -ERANGE;
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else {
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/* FIXME */
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}
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return 0;
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}
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static int cdv_set_brightness(struct backlight_device *bd)
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{
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int level = bd->props.brightness;
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/* Percentage 1-100% being valid */
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if (level < 1)
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level = 1;
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/*cdv_intel_lvds_set_brightness(dev, level); FIXME */
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cdv_brightness = level;
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return 0;
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}
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static const struct backlight_ops cdv_ops = {
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.get_brightness = cdv_get_brightness,
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.update_status = cdv_set_brightness,
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};
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static int cdv_backlight_init(struct drm_device *dev)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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int ret;
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struct backlight_properties props;
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memset(&props, 0, sizeof(struct backlight_properties));
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props.max_brightness = 100;
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props.type = BACKLIGHT_PLATFORM;
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cdv_backlight_device = backlight_device_register("psb-bl",
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NULL, (void *)dev, &cdv_ops, &props);
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if (IS_ERR(cdv_backlight_device))
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return PTR_ERR(cdv_backlight_device);
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ret = cdv_backlight_setup(dev);
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if (ret < 0) {
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backlight_device_unregister(cdv_backlight_device);
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cdv_backlight_device = NULL;
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return ret;
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}
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cdv_backlight_device->props.brightness = 100;
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cdv_backlight_device->props.max_brightness = 100;
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backlight_update_status(cdv_backlight_device);
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dev_priv->backlight_device = cdv_backlight_device;
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return 0;
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}
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#endif
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/*
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* Provide the Cedarview specific chip logic and low level methods
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* for power management
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*
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* FIXME: we need to implement the apm/ospm base management bits
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* for this and the MID devices.
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*/
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static inline u32 CDV_MSG_READ32(uint port, uint offset)
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{
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int mcr = (0x10<<24) | (port << 16) | (offset << 8);
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uint32_t ret_val = 0;
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struct pci_dev *pci_root = pci_get_bus_and_slot(0, 0);
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pci_write_config_dword(pci_root, 0xD0, mcr);
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pci_read_config_dword(pci_root, 0xD4, &ret_val);
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pci_dev_put(pci_root);
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return ret_val;
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}
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static inline void CDV_MSG_WRITE32(uint port, uint offset, u32 value)
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{
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int mcr = (0x11<<24) | (port << 16) | (offset << 8) | 0xF0;
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struct pci_dev *pci_root = pci_get_bus_and_slot(0, 0);
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pci_write_config_dword(pci_root, 0xD4, value);
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pci_write_config_dword(pci_root, 0xD0, mcr);
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pci_dev_put(pci_root);
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}
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#define PSB_APM_CMD 0x0
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#define PSB_APM_STS 0x04
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#define PSB_PM_SSC 0x20
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#define PSB_PM_SSS 0x30
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#define PSB_PWRGT_GFX_MASK 0x3
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#define CDV_PWRGT_DISPLAY_CNTR 0x000fc00c
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#define CDV_PWRGT_DISPLAY_STS 0x000fc00c
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static void cdv_init_pm(struct drm_device *dev)
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{
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struct drm_psb_private *dev_priv = dev->dev_private;
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u32 pwr_cnt;
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int i;
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dev_priv->apm_base = CDV_MSG_READ32(PSB_PUNIT_PORT,
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PSB_APMBA) & 0xFFFF;
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dev_priv->ospm_base = CDV_MSG_READ32(PSB_PUNIT_PORT,
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PSB_OSPMBA) & 0xFFFF;
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/* Force power on for now */
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pwr_cnt = inl(dev_priv->apm_base + PSB_APM_CMD);
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pwr_cnt &= ~PSB_PWRGT_GFX_MASK;
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outl(pwr_cnt, dev_priv->apm_base + PSB_APM_CMD);
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for (i = 0; i < 5; i++) {
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u32 pwr_sts = inl(dev_priv->apm_base + PSB_APM_STS);
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if ((pwr_sts & PSB_PWRGT_GFX_MASK) == 0)
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break;
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udelay(10);
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}
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pwr_cnt = inl(dev_priv->ospm_base + PSB_PM_SSC);
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pwr_cnt &= ~CDV_PWRGT_DISPLAY_CNTR;
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outl(pwr_cnt, dev_priv->ospm_base + PSB_PM_SSC);
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for (i = 0; i < 5; i++) {
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u32 pwr_sts = inl(dev_priv->ospm_base + PSB_PM_SSS);
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if ((pwr_sts & CDV_PWRGT_DISPLAY_STS) == 0)
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break;
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udelay(10);
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}
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}
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/**
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* cdv_save_display_registers - save registers lost on suspend
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* @dev: our DRM device
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*
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* Save the state we need in order to be able to restore the interface
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* upon resume from suspend
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*
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* FIXME: review
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*/
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static int cdv_save_display_registers(struct drm_device *dev)
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{
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return 0;
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}
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/**
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* cdv_restore_display_registers - restore lost register state
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* @dev: our DRM device
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*
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* Restore register state that was lost during suspend and resume.
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*
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* FIXME: review
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*/
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static int cdv_restore_display_registers(struct drm_device *dev)
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{
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return 0;
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}
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static int cdv_power_down(struct drm_device *dev)
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{
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return 0;
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}
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static int cdv_power_up(struct drm_device *dev)
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{
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return 0;
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}
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/* FIXME ? - shared with Poulsbo */
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static void cdv_get_core_freq(struct drm_device *dev)
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{
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uint32_t clock;
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struct pci_dev *pci_root = pci_get_bus_and_slot(0, 0);
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struct drm_psb_private *dev_priv = dev->dev_private;
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pci_write_config_dword(pci_root, 0xD0, 0xD0050300);
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pci_read_config_dword(pci_root, 0xD4, &clock);
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pci_dev_put(pci_root);
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switch (clock & 0x07) {
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case 0:
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dev_priv->core_freq = 100;
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break;
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case 1:
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dev_priv->core_freq = 133;
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break;
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case 2:
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dev_priv->core_freq = 150;
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break;
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case 3:
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dev_priv->core_freq = 178;
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break;
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case 4:
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dev_priv->core_freq = 200;
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break;
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case 5:
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case 6:
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case 7:
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dev_priv->core_freq = 266;
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default:
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dev_priv->core_freq = 0;
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}
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}
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static int cdv_chip_setup(struct drm_device *dev)
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{
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cdv_get_core_freq(dev);
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gma_intel_opregion_init(dev);
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psb_intel_init_bios(dev);
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return 0;
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}
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/* CDV is much like Poulsbo but has MID like SGX offsets and PM */
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const struct psb_ops cdv_chip_ops = {
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.name = "Cedartrail",
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.accel_2d = 0,
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.pipes = 2,
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.sgx_offset = MRST_SGX_OFFSET,
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.chip_setup = cdv_chip_setup,
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.crtc_helper = &cdv_intel_helper_funcs,
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.crtc_funcs = &cdv_intel_crtc_funcs,
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.output_init = cdv_output_init,
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#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
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.backlight_init = cdv_backlight_init,
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#endif
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.init_pm = cdv_init_pm,
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.save_regs = cdv_save_display_registers,
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.restore_regs = cdv_restore_display_registers,
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.power_down = cdv_power_down,
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.power_up = cdv_power_up,
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};
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@@ -0,0 +1,36 @@
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/*
|
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* Copyright © 2011 Intel Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms and conditions of the GNU General Public License,
|
||||
* version 2, as published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along with
|
||||
* this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
|
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*/
|
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extern const struct drm_crtc_helper_funcs cdv_intel_helper_funcs;
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extern const struct drm_crtc_funcs cdv_intel_crtc_funcs;
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extern void cdv_intel_crt_init(struct drm_device *dev,
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struct psb_intel_mode_device *mode_dev);
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extern void cdv_intel_lvds_init(struct drm_device *dev,
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struct psb_intel_mode_device *mode_dev);
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extern void cdv_hdmi_init(struct drm_device *dev, struct psb_intel_mode_device *mode_dev,
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int reg);
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extern struct drm_display_mode *cdv_intel_crtc_mode_get(struct drm_device *dev,
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struct drm_crtc *crtc);
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extern inline void cdv_intel_wait_for_vblank(struct drm_device *dev)
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{
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/* Wait for 20ms, i.e. one cycle at 50hz. */
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/* FIXME: msleep ?? */
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mdelay(20);
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}
|
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|
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|
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@@ -0,0 +1,326 @@
|
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/*
|
||||
* Copyright © 2006-2007 Intel Corporation
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* Eric Anholt <eric@anholt.net>
|
||||
*/
|
||||
|
||||
#include <linux/i2c.h>
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#include <drm/drmP.h>
|
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|
||||
#include "intel_bios.h"
|
||||
#include "psb_drv.h"
|
||||
#include "psb_intel_drv.h"
|
||||
#include "psb_intel_reg.h"
|
||||
#include "power.h"
|
||||
#include <linux/pm_runtime.h>
|
||||
|
||||
|
||||
static void cdv_intel_crt_dpms(struct drm_encoder *encoder, int mode)
|
||||
{
|
||||
struct drm_device *dev = encoder->dev;
|
||||
u32 temp, reg;
|
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reg = ADPA;
|
||||
|
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temp = REG_READ(reg);
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temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
|
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temp &= ~ADPA_DAC_ENABLE;
|
||||
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switch (mode) {
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case DRM_MODE_DPMS_ON:
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temp |= ADPA_DAC_ENABLE;
|
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break;
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case DRM_MODE_DPMS_STANDBY:
|
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temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
|
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break;
|
||||
case DRM_MODE_DPMS_SUSPEND:
|
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temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
|
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break;
|
||||
case DRM_MODE_DPMS_OFF:
|
||||
temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
|
||||
break;
|
||||
}
|
||||
|
||||
REG_WRITE(reg, temp);
|
||||
}
|
||||
|
||||
static int cdv_intel_crt_mode_valid(struct drm_connector *connector,
|
||||
struct drm_display_mode *mode)
|
||||
{
|
||||
int max_clock = 0;
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return MODE_NO_DBLESCAN;
|
||||
|
||||
/* The lowest clock for CDV is 20000KHz */
|
||||
if (mode->clock < 20000)
|
||||
return MODE_CLOCK_LOW;
|
||||
|
||||
/* The max clock for CDV is 355 instead of 400 */
|
||||
max_clock = 355000;
|
||||
if (mode->clock > max_clock)
|
||||
return MODE_CLOCK_HIGH;
|
||||
|
||||
if (mode->hdisplay > 1680 || mode->vdisplay > 1050)
|
||||
return MODE_PANEL;
|
||||
|
||||
return MODE_OK;
|
||||
}
|
||||
|
||||
static bool cdv_intel_crt_mode_fixup(struct drm_encoder *encoder,
|
||||
struct drm_display_mode *mode,
|
||||
struct drm_display_mode *adjusted_mode)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
||||
static void cdv_intel_crt_mode_set(struct drm_encoder *encoder,
|
||||
struct drm_display_mode *mode,
|
||||
struct drm_display_mode *adjusted_mode)
|
||||
{
|
||||
|
||||
struct drm_device *dev = encoder->dev;
|
||||
struct drm_crtc *crtc = encoder->crtc;
|
||||
struct psb_intel_crtc *psb_intel_crtc =
|
||||
to_psb_intel_crtc(crtc);
|
||||
int dpll_md_reg;
|
||||
u32 adpa, dpll_md;
|
||||
u32 adpa_reg;
|
||||
|
||||
if (psb_intel_crtc->pipe == 0)
|
||||
dpll_md_reg = DPLL_A_MD;
|
||||
else
|
||||
dpll_md_reg = DPLL_B_MD;
|
||||
|
||||
adpa_reg = ADPA;
|
||||
|
||||
/*
|
||||
* Disable separate mode multiplier used when cloning SDVO to CRT
|
||||
* XXX this needs to be adjusted when we really are cloning
|
||||
*/
|
||||
{
|
||||
dpll_md = REG_READ(dpll_md_reg);
|
||||
REG_WRITE(dpll_md_reg,
|
||||
dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
|
||||
}
|
||||
|
||||
adpa = 0;
|
||||
if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
|
||||
adpa |= ADPA_HSYNC_ACTIVE_HIGH;
|
||||
if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
|
||||
adpa |= ADPA_VSYNC_ACTIVE_HIGH;
|
||||
|
||||
if (psb_intel_crtc->pipe == 0)
|
||||
adpa |= ADPA_PIPE_A_SELECT;
|
||||
else
|
||||
adpa |= ADPA_PIPE_B_SELECT;
|
||||
|
||||
REG_WRITE(adpa_reg, adpa);
|
||||
}
|
||||
|
||||
|
||||
/**
|
||||
* Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
|
||||
*
|
||||
* \return true if CRT is connected.
|
||||
* \return false if CRT is disconnected.
|
||||
*/
|
||||
static bool cdv_intel_crt_detect_hotplug(struct drm_connector *connector,
|
||||
bool force)
|
||||
{
|
||||
struct drm_device *dev = connector->dev;
|
||||
u32 hotplug_en;
|
||||
int i, tries = 0, ret = false;
|
||||
u32 adpa_orig;
|
||||
|
||||
/* disable the DAC when doing the hotplug detection */
|
||||
|
||||
adpa_orig = REG_READ(ADPA);
|
||||
|
||||
REG_WRITE(ADPA, adpa_orig & ~(ADPA_DAC_ENABLE));
|
||||
|
||||
/*
|
||||
* On a CDV thep, CRT detect sequence need to be done twice
|
||||
* to get a reliable result.
|
||||
*/
|
||||
tries = 2;
|
||||
|
||||
hotplug_en = REG_READ(PORT_HOTPLUG_EN);
|
||||
hotplug_en &= ~(CRT_HOTPLUG_DETECT_MASK);
|
||||
hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
|
||||
|
||||
hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
|
||||
hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
|
||||
|
||||
for (i = 0; i < tries ; i++) {
|
||||
unsigned long timeout;
|
||||
/* turn on the FORCE_DETECT */
|
||||
REG_WRITE(PORT_HOTPLUG_EN, hotplug_en);
|
||||
timeout = jiffies + msecs_to_jiffies(1000);
|
||||
/* wait for FORCE_DETECT to go off */
|
||||
do {
|
||||
if (!(REG_READ(PORT_HOTPLUG_EN) &
|
||||
CRT_HOTPLUG_FORCE_DETECT))
|
||||
break;
|
||||
msleep(1);
|
||||
} while (time_after(timeout, jiffies));
|
||||
}
|
||||
|
||||
if ((REG_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) !=
|
||||
CRT_HOTPLUG_MONITOR_NONE)
|
||||
ret = true;
|
||||
|
||||
/* Restore the saved ADPA */
|
||||
REG_WRITE(ADPA, adpa_orig);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static enum drm_connector_status cdv_intel_crt_detect(
|
||||
struct drm_connector *connector, bool force)
|
||||
{
|
||||
if (cdv_intel_crt_detect_hotplug(connector, force))
|
||||
return connector_status_connected;
|
||||
else
|
||||
return connector_status_disconnected;
|
||||
}
|
||||
|
||||
static void cdv_intel_crt_destroy(struct drm_connector *connector)
|
||||
{
|
||||
struct psb_intel_output *intel_output = to_psb_intel_output(connector);
|
||||
|
||||
psb_intel_i2c_destroy(intel_output->ddc_bus);
|
||||
drm_sysfs_connector_remove(connector);
|
||||
drm_connector_cleanup(connector);
|
||||
kfree(connector);
|
||||
}
|
||||
|
||||
static int cdv_intel_crt_get_modes(struct drm_connector *connector)
|
||||
{
|
||||
struct psb_intel_output *intel_output =
|
||||
to_psb_intel_output(connector);
|
||||
return psb_intel_ddc_get_modes(intel_output);
|
||||
}
|
||||
|
||||
static int cdv_intel_crt_set_property(struct drm_connector *connector,
|
||||
struct drm_property *property,
|
||||
uint64_t value)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Routines for controlling stuff on the analog port
|
||||
*/
|
||||
|
||||
static const struct drm_encoder_helper_funcs cdv_intel_crt_helper_funcs = {
|
||||
.dpms = cdv_intel_crt_dpms,
|
||||
.mode_fixup = cdv_intel_crt_mode_fixup,
|
||||
.prepare = psb_intel_encoder_prepare,
|
||||
.commit = psb_intel_encoder_commit,
|
||||
.mode_set = cdv_intel_crt_mode_set,
|
||||
};
|
||||
|
||||
static const struct drm_connector_funcs cdv_intel_crt_connector_funcs = {
|
||||
.dpms = drm_helper_connector_dpms,
|
||||
.detect = cdv_intel_crt_detect,
|
||||
.fill_modes = drm_helper_probe_single_connector_modes,
|
||||
.destroy = cdv_intel_crt_destroy,
|
||||
.set_property = cdv_intel_crt_set_property,
|
||||
};
|
||||
|
||||
static const struct drm_connector_helper_funcs
|
||||
cdv_intel_crt_connector_helper_funcs = {
|
||||
.mode_valid = cdv_intel_crt_mode_valid,
|
||||
.get_modes = cdv_intel_crt_get_modes,
|
||||
.best_encoder = psb_intel_best_encoder,
|
||||
};
|
||||
|
||||
static void cdv_intel_crt_enc_destroy(struct drm_encoder *encoder)
|
||||
{
|
||||
drm_encoder_cleanup(encoder);
|
||||
}
|
||||
|
||||
static const struct drm_encoder_funcs cdv_intel_crt_enc_funcs = {
|
||||
.destroy = cdv_intel_crt_enc_destroy,
|
||||
};
|
||||
|
||||
void cdv_intel_crt_init(struct drm_device *dev,
|
||||
struct psb_intel_mode_device *mode_dev)
|
||||
{
|
||||
|
||||
struct psb_intel_output *psb_intel_output;
|
||||
struct drm_connector *connector;
|
||||
struct drm_encoder *encoder;
|
||||
|
||||
u32 i2c_reg;
|
||||
|
||||
psb_intel_output = kzalloc(sizeof(struct psb_intel_output), GFP_KERNEL);
|
||||
if (!psb_intel_output)
|
||||
return;
|
||||
|
||||
psb_intel_output->mode_dev = mode_dev;
|
||||
connector = &psb_intel_output->base;
|
||||
drm_connector_init(dev, connector,
|
||||
&cdv_intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
|
||||
|
||||
encoder = &psb_intel_output->enc;
|
||||
drm_encoder_init(dev, encoder,
|
||||
&cdv_intel_crt_enc_funcs, DRM_MODE_ENCODER_DAC);
|
||||
|
||||
drm_mode_connector_attach_encoder(&psb_intel_output->base,
|
||||
&psb_intel_output->enc);
|
||||
|
||||
/* Set up the DDC bus. */
|
||||
i2c_reg = GPIOA;
|
||||
/* Remove the following code for CDV */
|
||||
/*
|
||||
if (dev_priv->crt_ddc_bus != 0)
|
||||
i2c_reg = dev_priv->crt_ddc_bus;
|
||||
}*/
|
||||
psb_intel_output->ddc_bus = psb_intel_i2c_create(dev,
|
||||
i2c_reg, "CRTDDC_A");
|
||||
if (!psb_intel_output->ddc_bus) {
|
||||
dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
|
||||
"failed.\n");
|
||||
goto failed_ddc;
|
||||
}
|
||||
|
||||
psb_intel_output->type = INTEL_OUTPUT_ANALOG;
|
||||
/*
|
||||
psb_intel_output->clone_mask = (1 << INTEL_ANALOG_CLONE_BIT);
|
||||
psb_intel_output->crtc_mask = (1 << 0) | (1 << 1);
|
||||
*/
|
||||
connector->interlace_allowed = 0;
|
||||
connector->doublescan_allowed = 0;
|
||||
|
||||
drm_encoder_helper_add(encoder, &cdv_intel_crt_helper_funcs);
|
||||
drm_connector_helper_add(connector,
|
||||
&cdv_intel_crt_connector_helper_funcs);
|
||||
|
||||
drm_sysfs_connector_add(connector);
|
||||
|
||||
return;
|
||||
failed_ddc:
|
||||
drm_encoder_cleanup(&psb_intel_output->enc);
|
||||
drm_connector_cleanup(&psb_intel_output->base);
|
||||
kfree(psb_intel_output);
|
||||
return;
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,376 @@
|
||||
/*
|
||||
* Copyright © 2006-2011 Intel Corporation
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a
|
||||
* copy of this software and associated documentation files (the "Software"),
|
||||
* to deal in the Software without restriction, including without limitation
|
||||
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
||||
* and/or sell copies of the Software, and to permit persons to whom the
|
||||
* Software is furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice (including the next
|
||||
* paragraph) shall be included in all copies or substantial portions of the
|
||||
* Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
||||
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
||||
* DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* Authors:
|
||||
* jim liu <jim.liu@intel.com>
|
||||
*
|
||||
* FIXME:
|
||||
* We should probably make this generic and share it with Medfield
|
||||
*/
|
||||
|
||||
#include <drm/drmP.h>
|
||||
#include <drm/drm.h>
|
||||
#include <drm/drm_crtc.h>
|
||||
#include <drm/drm_edid.h>
|
||||
#include "psb_intel_drv.h"
|
||||
#include "psb_drv.h"
|
||||
#include "psb_intel_reg.h"
|
||||
#include <linux/pm_runtime.h>
|
||||
|
||||
/* hdmi control bits */
|
||||
#define HDMI_NULL_PACKETS_DURING_VSYNC (1 << 9)
|
||||
#define HDMI_BORDER_ENABLE (1 << 7)
|
||||
#define HDMI_AUDIO_ENABLE (1 << 6)
|
||||
#define HDMI_VSYNC_ACTIVE_HIGH (1 << 4)
|
||||
#define HDMI_HSYNC_ACTIVE_HIGH (1 << 3)
|
||||
/* hdmi-b control bits */
|
||||
#define HDMIB_PIPE_B_SELECT (1 << 30)
|
||||
|
||||
|
||||
struct mid_intel_hdmi_priv {
|
||||
u32 hdmi_reg;
|
||||
u32 save_HDMIB;
|
||||
bool has_hdmi_sink;
|
||||
bool has_hdmi_audio;
|
||||
/* Should set this when detect hotplug */
|
||||
bool hdmi_device_connected;
|
||||
struct mdfld_hdmi_i2c *i2c_bus;
|
||||
struct i2c_adapter *hdmi_i2c_adapter; /* for control functions */
|
||||
struct drm_device *dev;
|
||||
};
|
||||
|
||||
static void cdv_hdmi_mode_set(struct drm_encoder *encoder,
|
||||
struct drm_display_mode *mode,
|
||||
struct drm_display_mode *adjusted_mode)
|
||||
{
|
||||
struct drm_device *dev = encoder->dev;
|
||||
struct psb_intel_output *output = enc_to_psb_intel_output(encoder);
|
||||
struct mid_intel_hdmi_priv *hdmi_priv = output->dev_priv;
|
||||
u32 hdmib;
|
||||
struct drm_crtc *crtc = encoder->crtc;
|
||||
struct psb_intel_crtc *intel_crtc = to_psb_intel_crtc(crtc);
|
||||
|
||||
hdmib = (2 << 10);
|
||||
|
||||
if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
|
||||
hdmib |= HDMI_VSYNC_ACTIVE_HIGH;
|
||||
if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
|
||||
hdmib |= HDMI_HSYNC_ACTIVE_HIGH;
|
||||
|
||||
if (intel_crtc->pipe == 1)
|
||||
hdmib |= HDMIB_PIPE_B_SELECT;
|
||||
|
||||
if (hdmi_priv->has_hdmi_audio) {
|
||||
hdmib |= HDMI_AUDIO_ENABLE;
|
||||
hdmib |= HDMI_NULL_PACKETS_DURING_VSYNC;
|
||||
}
|
||||
|
||||
REG_WRITE(hdmi_priv->hdmi_reg, hdmib);
|
||||
REG_READ(hdmi_priv->hdmi_reg);
|
||||
}
|
||||
|
||||
static bool cdv_hdmi_mode_fixup(struct drm_encoder *encoder,
|
||||
struct drm_display_mode *mode,
|
||||
struct drm_display_mode *adjusted_mode)
|
||||
{
|
||||
return true;
|
||||
}
|
||||
|
||||
static void cdv_hdmi_dpms(struct drm_encoder *encoder, int mode)
|
||||
{
|
||||
struct drm_device *dev = encoder->dev;
|
||||
struct psb_intel_output *output = enc_to_psb_intel_output(encoder);
|
||||
struct mid_intel_hdmi_priv *hdmi_priv = output->dev_priv;
|
||||
u32 hdmib;
|
||||
|
||||
hdmib = REG_READ(hdmi_priv->hdmi_reg);
|
||||
|
||||
if (mode != DRM_MODE_DPMS_ON)
|
||||
REG_WRITE(hdmi_priv->hdmi_reg, hdmib & ~HDMIB_PORT_EN);
|
||||
else
|
||||
REG_WRITE(hdmi_priv->hdmi_reg, hdmib | HDMIB_PORT_EN);
|
||||
REG_READ(hdmi_priv->hdmi_reg);
|
||||
}
|
||||
|
||||
static void cdv_hdmi_save(struct drm_connector *connector)
|
||||
{
|
||||
struct drm_device *dev = connector->dev;
|
||||
struct psb_intel_output *output = to_psb_intel_output(connector);
|
||||
struct mid_intel_hdmi_priv *hdmi_priv = output->dev_priv;
|
||||
|
||||
hdmi_priv->save_HDMIB = REG_READ(hdmi_priv->hdmi_reg);
|
||||
}
|
||||
|
||||
static void cdv_hdmi_restore(struct drm_connector *connector)
|
||||
{
|
||||
struct drm_device *dev = connector->dev;
|
||||
struct psb_intel_output *output = to_psb_intel_output(connector);
|
||||
struct mid_intel_hdmi_priv *hdmi_priv = output->dev_priv;
|
||||
|
||||
REG_WRITE(hdmi_priv->hdmi_reg, hdmi_priv->save_HDMIB);
|
||||
REG_READ(hdmi_priv->hdmi_reg);
|
||||
}
|
||||
|
||||
static enum drm_connector_status cdv_hdmi_detect(
|
||||
struct drm_connector *connector, bool force)
|
||||
{
|
||||
struct psb_intel_output *psb_intel_output =
|
||||
to_psb_intel_output(connector);
|
||||
struct mid_intel_hdmi_priv *hdmi_priv = psb_intel_output->dev_priv;
|
||||
struct edid *edid = NULL;
|
||||
enum drm_connector_status status = connector_status_disconnected;
|
||||
|
||||
edid = drm_get_edid(&psb_intel_output->base,
|
||||
psb_intel_output->hdmi_i2c_adapter);
|
||||
|
||||
hdmi_priv->has_hdmi_sink = false;
|
||||
hdmi_priv->has_hdmi_audio = false;
|
||||
if (edid) {
|
||||
if (edid->input & DRM_EDID_INPUT_DIGITAL) {
|
||||
status = connector_status_connected;
|
||||
hdmi_priv->has_hdmi_sink =
|
||||
drm_detect_hdmi_monitor(edid);
|
||||
hdmi_priv->has_hdmi_audio =
|
||||
drm_detect_monitor_audio(edid);
|
||||
}
|
||||
|
||||
psb_intel_output->base.display_info.raw_edid = NULL;
|
||||
kfree(edid);
|
||||
}
|
||||
return status;
|
||||
}
|
||||
|
||||
static int cdv_hdmi_set_property(struct drm_connector *connector,
|
||||
struct drm_property *property,
|
||||
uint64_t value)
|
||||
{
|
||||
struct drm_encoder *encoder = connector->encoder;
|
||||
|
||||
if (!strcmp(property->name, "scaling mode") && encoder) {
|
||||
struct psb_intel_crtc *crtc = to_psb_intel_crtc(encoder->crtc);
|
||||
bool centre;
|
||||
uint64_t curValue;
|
||||
|
||||
if (!crtc)
|
||||
return -1;
|
||||
|
||||
switch (value) {
|
||||
case DRM_MODE_SCALE_FULLSCREEN:
|
||||
break;
|
||||
case DRM_MODE_SCALE_NO_SCALE:
|
||||
break;
|
||||
case DRM_MODE_SCALE_ASPECT:
|
||||
break;
|
||||
default:
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (drm_connector_property_get_value(connector,
|
||||
property, &curValue))
|
||||
return -1;
|
||||
|
||||
if (curValue == value)
|
||||
return 0;
|
||||
|
||||
if (drm_connector_property_set_value(connector,
|
||||
property, value))
|
||||
return -1;
|
||||
|
||||
centre = (curValue == DRM_MODE_SCALE_NO_SCALE) ||
|
||||
(value == DRM_MODE_SCALE_NO_SCALE);
|
||||
|
||||
if (crtc->saved_mode.hdisplay != 0 &&
|
||||
crtc->saved_mode.vdisplay != 0) {
|
||||
if (centre) {
|
||||
if (!drm_crtc_helper_set_mode(encoder->crtc, &crtc->saved_mode,
|
||||
encoder->crtc->x, encoder->crtc->y, encoder->crtc->fb))
|
||||
return -1;
|
||||
} else {
|
||||
struct drm_encoder_helper_funcs *helpers
|
||||
= encoder->helper_private;
|
||||
helpers->mode_set(encoder, &crtc->saved_mode,
|
||||
&crtc->saved_adjusted_mode);
|
||||
}
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Return the list of HDMI DDC modes if available.
|
||||
*/
|
||||
static int cdv_hdmi_get_modes(struct drm_connector *connector)
|
||||
{
|
||||
struct psb_intel_output *psb_intel_output =
|
||||
to_psb_intel_output(connector);
|
||||
struct edid *edid = NULL;
|
||||
int ret = 0;
|
||||
|
||||
edid = drm_get_edid(&psb_intel_output->base,
|
||||
psb_intel_output->hdmi_i2c_adapter);
|
||||
if (edid) {
|
||||
drm_mode_connector_update_edid_property(&psb_intel_output->
|
||||
base, edid);
|
||||
ret = drm_add_edid_modes(&psb_intel_output->base, edid);
|
||||
kfree(edid);
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int cdv_hdmi_mode_valid(struct drm_connector *connector,
|
||||
struct drm_display_mode *mode)
|
||||
{
|
||||
|
||||
if (mode->clock > 165000)
|
||||
return MODE_CLOCK_HIGH;
|
||||
if (mode->clock < 20000)
|
||||
return MODE_CLOCK_HIGH;
|
||||
|
||||
/* just in case */
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return MODE_NO_DBLESCAN;
|
||||
|
||||
/* just in case */
|
||||
if (mode->flags & DRM_MODE_FLAG_INTERLACE)
|
||||
return MODE_NO_INTERLACE;
|
||||
|
||||
/*
|
||||
* FIXME: for now we limit the size to 1680x1050 on CDV, otherwise it
|
||||
* will go beyond the stolen memory size allocated to the framebuffer
|
||||
*/
|
||||
if (mode->hdisplay > 1680)
|
||||
return MODE_PANEL;
|
||||
if (mode->vdisplay > 1050)
|
||||
return MODE_PANEL;
|
||||
return MODE_OK;
|
||||
}
|
||||
|
||||
static void cdv_hdmi_destroy(struct drm_connector *connector)
|
||||
{
|
||||
struct psb_intel_output *psb_intel_output =
|
||||
to_psb_intel_output(connector);
|
||||
|
||||
if (psb_intel_output->ddc_bus)
|
||||
psb_intel_i2c_destroy(psb_intel_output->ddc_bus);
|
||||
drm_sysfs_connector_remove(connector);
|
||||
drm_connector_cleanup(connector);
|
||||
kfree(connector);
|
||||
}
|
||||
|
||||
static const struct drm_encoder_helper_funcs cdv_hdmi_helper_funcs = {
|
||||
.dpms = cdv_hdmi_dpms,
|
||||
.mode_fixup = cdv_hdmi_mode_fixup,
|
||||
.prepare = psb_intel_encoder_prepare,
|
||||
.mode_set = cdv_hdmi_mode_set,
|
||||
.commit = psb_intel_encoder_commit,
|
||||
};
|
||||
|
||||
static const struct drm_connector_helper_funcs
|
||||
cdv_hdmi_connector_helper_funcs = {
|
||||
.get_modes = cdv_hdmi_get_modes,
|
||||
.mode_valid = cdv_hdmi_mode_valid,
|
||||
.best_encoder = psb_intel_best_encoder,
|
||||
};
|
||||
|
||||
static const struct drm_connector_funcs cdv_hdmi_connector_funcs = {
|
||||
.dpms = drm_helper_connector_dpms,
|
||||
.save = cdv_hdmi_save,
|
||||
.restore = cdv_hdmi_restore,
|
||||
.detect = cdv_hdmi_detect,
|
||||
.fill_modes = drm_helper_probe_single_connector_modes,
|
||||
.set_property = cdv_hdmi_set_property,
|
||||
.destroy = cdv_hdmi_destroy,
|
||||
};
|
||||
|
||||
void cdv_hdmi_init(struct drm_device *dev,
|
||||
struct psb_intel_mode_device *mode_dev, int reg)
|
||||
{
|
||||
struct psb_intel_output *psb_intel_output;
|
||||
struct drm_connector *connector;
|
||||
struct drm_encoder *encoder;
|
||||
struct mid_intel_hdmi_priv *hdmi_priv;
|
||||
int ddc_bus;
|
||||
|
||||
psb_intel_output = kzalloc(sizeof(struct psb_intel_output) +
|
||||
sizeof(struct mid_intel_hdmi_priv), GFP_KERNEL);
|
||||
if (!psb_intel_output)
|
||||
return;
|
||||
|
||||
hdmi_priv = (struct mid_intel_hdmi_priv *)(psb_intel_output + 1);
|
||||
psb_intel_output->mode_dev = mode_dev;
|
||||
connector = &psb_intel_output->base;
|
||||
encoder = &psb_intel_output->enc;
|
||||
drm_connector_init(dev, &psb_intel_output->base,
|
||||
&cdv_hdmi_connector_funcs,
|
||||
DRM_MODE_CONNECTOR_DVID);
|
||||
|
||||
drm_encoder_init(dev, &psb_intel_output->enc, &psb_intel_lvds_enc_funcs,
|
||||
DRM_MODE_ENCODER_TMDS);
|
||||
|
||||
drm_mode_connector_attach_encoder(&psb_intel_output->base,
|
||||
&psb_intel_output->enc);
|
||||
psb_intel_output->type = INTEL_OUTPUT_HDMI;
|
||||
hdmi_priv->hdmi_reg = reg;
|
||||
hdmi_priv->has_hdmi_sink = false;
|
||||
psb_intel_output->dev_priv = hdmi_priv;
|
||||
|
||||
drm_encoder_helper_add(encoder, &cdv_hdmi_helper_funcs);
|
||||
drm_connector_helper_add(connector,
|
||||
&cdv_hdmi_connector_helper_funcs);
|
||||
connector->display_info.subpixel_order = SubPixelHorizontalRGB;
|
||||
connector->interlace_allowed = false;
|
||||
connector->doublescan_allowed = false;
|
||||
|
||||
drm_connector_attach_property(connector,
|
||||
dev->mode_config.scaling_mode_property, DRM_MODE_SCALE_FULLSCREEN);
|
||||
|
||||
switch (reg) {
|
||||
case SDVOB:
|
||||
ddc_bus = GPIOE;
|
||||
break;
|
||||
case SDVOC:
|
||||
ddc_bus = GPIOD;
|
||||
break;
|
||||
default:
|
||||
DRM_ERROR("unknown reg 0x%x for HDMI\n", reg);
|
||||
goto failed_ddc;
|
||||
break;
|
||||
}
|
||||
|
||||
psb_intel_output->ddc_bus = psb_intel_i2c_create(dev,
|
||||
ddc_bus, (reg == SDVOB) ? "HDMIB" : "HDMIC");
|
||||
|
||||
if (!psb_intel_output->ddc_bus) {
|
||||
dev_err(dev->dev, "No ddc adapter available!\n");
|
||||
goto failed_ddc;
|
||||
}
|
||||
psb_intel_output->hdmi_i2c_adapter =
|
||||
&(psb_intel_output->ddc_bus->adapter);
|
||||
hdmi_priv->dev = dev;
|
||||
drm_sysfs_connector_add(connector);
|
||||
return;
|
||||
|
||||
failed_ddc:
|
||||
drm_encoder_cleanup(&psb_intel_output->enc);
|
||||
drm_connector_cleanup(&psb_intel_output->base);
|
||||
kfree(psb_intel_output);
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user