[MTD] maps: Clean up trailing white spaces

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
Thomas Gleixner
2005-11-07 11:15:40 +00:00
committed by Thomas Gleixner
parent 1f948b43f7
commit 69f34c98c1
61 changed files with 470 additions and 470 deletions
+12 -12
View File
@@ -1,5 +1,5 @@
# drivers/mtd/maps/Kconfig
# $Id: Kconfig,v 1.60 2005/11/07 08:33:35 gleixner Exp $
# $Id: Kconfig,v 1.61 2005/11/07 11:14:26 gleixner Exp $
menu "Mapping drivers for chip access"
depends on MTD!=n
@@ -64,9 +64,9 @@ config MTD_SUN_UFLASH
tristate "Sun Microsystems userflash support"
depends on (SPARC32 || SPARC64) && MTD_CFI
help
This provides a 'mapping' driver which supports the way in
which user-programmable flash chips are connected on various
Sun Microsystems boardsets. This driver will require CFI support
This provides a 'mapping' driver which supports the way in
which user-programmable flash chips are connected on various
Sun Microsystems boardsets. This driver will require CFI support
in the kernel, so if you did not enable CFI previously, do that now.
config MTD_PNC2000
@@ -89,7 +89,7 @@ config MTD_NETSC520
depends on X86 && MTD_CFI && MTD_PARTITIONS
help
This enables access routines for the flash chips on the AMD NetSc520
demonstration board. If you have one of these boards and would like
demonstration board. If you have one of these boards and would like
to use the flash chips on it, say 'Y'.
config MTD_TS5500
@@ -212,7 +212,7 @@ config MTD_NETtel
Support for flash chips on NETtel/SecureEdge/SnapGear boards.
config MTD_ALCHEMY
tristate ' AMD Alchemy Pb1xxx/Db1xxx/RDK MTD support'
tristate ' AMD Alchemy Pb1xxx/Db1xxx/RDK MTD support'
depends on SOC_AU1X00
help
Flash memory access on AMD Alchemy Pb/Db/RDK Reference Boards
@@ -377,8 +377,8 @@ config MTD_CSTM_MIPS_IXX_START
default "0x8000000"
help
This is the physical memory location that the MTD driver will
use for the flash chips on your particular target board.
Refer to the memory map which should hopefully be in the
use for the flash chips on your particular target board.
Refer to the memory map which should hopefully be in the
documentation for your board.
config MTD_CSTM_MIPS_IXX_LEN
@@ -386,7 +386,7 @@ config MTD_CSTM_MIPS_IXX_LEN
depends on MTD_CSTM_MIPS_IXX
default "0x4000000"
help
This is the total length that the MTD driver will use for the
This is the total length that the MTD driver will use for the
flash chips on your particular board. Refer to the memory
map which should hopefully be in the documentation for your
board.
@@ -452,14 +452,14 @@ config MTD_IQ80310
depends on MTD_CFI && ARCH_IQ80310
help
This enables access routines for the flash chips on the Intel XScale
IQ80310 evaluation board. If you have one of these boards and would
IQ80310 evaluation board. If you have one of these boards and would
like to use the flash chips on it, say 'Y'.
config MTD_IXP4XX
tristate "CFI Flash device mapped on Intel IXP4xx based systems"
depends on MTD_CFI && MTD_COMPLEX_MAPPINGS && ARCH_IXP4XX
help
This enables MTD access to flash devices on platforms based
This enables MTD access to flash devices on platforms based
on Intel's IXP4xx family of network processors such as the
IXDP425 and Coyote. If you have an IXP4xx based board and
would like to use the flash chips on it, say 'Y'.
@@ -468,7 +468,7 @@ config MTD_IXP2000
tristate "CFI Flash device mapped on Intel IXP2000 based systems"
depends on MTD_CFI && MTD_COMPLEX_MAPPINGS && ARCH_IXP2000
help
This enables MTD access to flash devices on platforms based
This enables MTD access to flash devices on platforms based
on Intel's IXP2000 family of network processors such as the
IXDP425 and Coyote. If you have an IXP2000 based board and
would like to use the flash chips on it, say 'Y'.
+2 -2
View File
@@ -1,7 +1,7 @@
#
# linux/drivers/maps/Makefile
#
# $Id: Makefile.common,v 1.33 2005/11/07 08:33:35 gleixner Exp $
# $Id: Makefile.common,v 1.34 2005/11/07 11:14:26 gleixner Exp $
ifeq ($(CONFIG_MTD_COMPLEX_MAPPINGS),y)
obj-$(CONFIG_MTD) += map_funcs.o
@@ -26,7 +26,7 @@ obj-$(CONFIG_MTD_MAINSTONE) += mainstone-flash.o
obj-$(CONFIG_MTD_MBX860) += mbx860.o
obj-$(CONFIG_MTD_CEIVA) += ceiva.o
obj-$(CONFIG_MTD_OCTAGON) += octagon-5066.o
obj-$(CONFIG_MTD_PHYSMAP) += physmap.o
obj-$(CONFIG_MTD_PHYSMAP) += physmap.o
obj-$(CONFIG_MTD_PNC2000) += pnc2000.o
obj-$(CONFIG_MTD_PCMCIA) += pcmciamtd.o
obj-$(CONFIG_MTD_RPXLITE) += rpxlite.o
+6 -6
View File
@@ -1,10 +1,10 @@
/*
* Flash memory access on AMD Alchemy evaluation boards
*
* $Id: alchemy-flash.c,v 1.1 2005/02/27 21:50:21 ppopov Exp $
*
* $Id: alchemy-flash.c,v 1.2 2005/11/07 11:14:26 gleixner Exp $
*
* (C) 2003, 2004 Pete Popov <ppopov@embeddedalley.com>
*
*
*/
#include <linux/config.h>
@@ -22,7 +22,7 @@
#ifdef DEBUG_RW
#define DBG(x...) printk(x)
#else
#define DBG(x...)
#define DBG(x...)
#endif
#ifdef CONFIG_MIPS_PB1000
@@ -136,7 +136,7 @@ int __init alchemy_mtd_init(void)
int nb_parts = 0;
unsigned long window_addr;
unsigned long window_size;
/* Default flash buswidth */
alchemy_map.bankwidth = BOARD_FLASH_WIDTH;
@@ -161,7 +161,7 @@ int __init alchemy_mtd_init(void)
* Now let's probe for the actual flash. Do it here since
* specific machine settings might have been set above.
*/
printk(KERN_NOTICE BOARD_MAP_NAME ": probing %d-bit flash bus\n",
printk(KERN_NOTICE BOARD_MAP_NAME ": probing %d-bit flash bus\n",
alchemy_map.bankwidth*8);
alchemy_map.virt = ioremap(window_addr, window_size);
mymtd = do_map_probe("cfi_probe", &alchemy_map);
+8 -8
View File
@@ -2,7 +2,7 @@
* amd76xrom.c
*
* Normal mappings of chips in physical memory
* $Id: amd76xrom.c,v 1.20 2005/03/18 14:04:35 gleixner Exp $
* $Id: amd76xrom.c,v 1.21 2005/11/07 11:14:26 gleixner Exp $
*/
#include <linux/module.h>
@@ -70,7 +70,7 @@ static void amd76xrom_cleanup(struct amd76xrom_window *window)
list_del(&map->list);
kfree(map);
}
if (window->rsrc.parent)
if (window->rsrc.parent)
release_resource(&window->rsrc);
if (window->virt) {
@@ -107,7 +107,7 @@ static int __devinit amd76xrom_init_one (struct pci_dev *pdev,
window->phys = 0xffff0000; /* 64KiB */
}
window->size = 0xffffffffUL - window->phys + 1UL;
/*
* Try to reserve the window mem region. If this fails then
* it is likely due to a fragment of the window being
@@ -138,7 +138,7 @@ static int __devinit amd76xrom_init_one (struct pci_dev *pdev,
/* Enable writes through the rom window */
pci_read_config_byte(pdev, 0x40, &byte);
pci_write_config_byte(pdev, 0x40, byte | 1);
/* FIXME handle registers 0x80 - 0x8C the bios region locks */
/* For write accesses caches are useless */
@@ -186,7 +186,7 @@ static int __devinit amd76xrom_init_one (struct pci_dev *pdev,
MOD_NAME, map->map.phys);
/* There is no generic VPP support */
for(map->map.bankwidth = 32; map->map.bankwidth;
for(map->map.bankwidth = 32; map->map.bankwidth;
map->map.bankwidth >>= 1)
{
char **probe_type;
@@ -239,7 +239,7 @@ static int __devinit amd76xrom_init_one (struct pci_dev *pdev,
for(i = 0; i < cfi->numchips; i++) {
cfi->chips[i].start += offset;
}
/* Now that the mtd devices is complete claim and export it */
map->mtd->owner = THIS_MODULE;
if (add_mtd_device(map->mtd)) {
@@ -279,9 +279,9 @@ static void __devexit amd76xrom_remove_one (struct pci_dev *pdev)
}
static struct pci_device_id amd76xrom_pci_tbl[] = {
{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7410,
{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7410,
PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7440,
{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7440,
PCI_ANY_ID, PCI_ANY_ID, },
{ PCI_VENDOR_ID_AMD, 0x7468 }, /* amd8111 support */
{ 0, }
+3 -3
View File
@@ -1,7 +1,7 @@
/*
* $Id: arctic-mtd.c,v 1.13 2004/11/04 13:24:14 gleixner Exp $
*
* drivers/mtd/maps/arctic-mtd.c MTD mappings and partition tables for
* $Id: arctic-mtd.c,v 1.14 2005/11/07 11:14:26 gleixner Exp $
*
* drivers/mtd/maps/arctic-mtd.c MTD mappings and partition tables for
* IBM 405LP Arctic boards.
*
* This program is free software; you can redistribute it and/or modify
+9 -9
View File
@@ -1,8 +1,8 @@
/*
* NV-RAM memory access on autcpu12
* NV-RAM memory access on autcpu12
* (C) 2002 Thomas Gleixner (gleixner@autronix.de)
*
* $Id: autcpu12-nvram.c,v 1.8 2004/11/04 13:24:14 gleixner Exp $
* $Id: autcpu12-nvram.c,v 1.9 2005/11/07 11:14:26 gleixner Exp $
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -55,10 +55,10 @@ static int __init init_autcpu12_sram (void)
}
simple_map_init(&autcpu_sram_map);
/*
* Check for 32K/128K
* read ofs 0
* read ofs 0x10000
/*
* Check for 32K/128K
* read ofs 0
* read ofs 0x10000
* Write complement to ofs 0x100000
* Read and check result on ofs 0x0
* Restore contents
@@ -66,7 +66,7 @@ static int __init init_autcpu12_sram (void)
save0 = map_read32(&autcpu12_sram_map,0);
save1 = map_read32(&autcpu12_sram_map,0x10000);
map_write32(&autcpu12_sram_map,~save0,0x10000);
/* if we find this pattern on 0x0, we have 32K size
/* if we find this pattern on 0x0, we have 32K size
* restore contents and exit
*/
if ( map_read32(&autcpu12_sram_map,0) != save0) {
@@ -89,7 +89,7 @@ map:
sram_mtd->owner = THIS_MODULE;
sram_mtd->erasesize = 16;
if (add_mtd_device(sram_mtd)) {
printk("NV-RAM device addition failed\n");
err = -ENOMEM;
@@ -97,7 +97,7 @@ map:
}
printk("NV-RAM device size %ldKiB registered on AUTCPU12\n",autcpu12_sram_map.size/SZ_1K);
return 0;
out_probe:
+9 -9
View File
@@ -9,7 +9,7 @@
* 20-Sep-2004 BJD Initial version
* 17-Jan-2005 BJD Add whole device if no partitions found
*
* $Id: bast-flash.c,v 1.3 2005/10/10 00:13:38 bjd Exp $
* $Id: bast-flash.c,v 1.5 2005/11/07 11:14:26 gleixner Exp $
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -75,7 +75,7 @@ static void bast_flash_setrw(int to)
local_irq_save(flags);
val = __raw_readb(BAST_VA_CTRL3);
if (to)
val |= BAST_CPLD_CTRL3_ROMWEN;
else
@@ -93,7 +93,7 @@ static int bast_flash_remove(struct device *dev)
dev_set_drvdata(dev, NULL);
if (info == NULL)
if (info == NULL)
return 0;
if (info->map.virt != NULL)
@@ -111,7 +111,7 @@ static int bast_flash_remove(struct device *dev)
release_resource(info->area);
kfree(info->area);
}
kfree(info);
return 0;
@@ -138,15 +138,15 @@ static int bast_flash_probe(struct device *dev)
info->map.phys = res->start;
info->map.size = res->end - res->start + 1;
info->map.name = dev->bus_id;
info->map.name = dev->bus_id;
info->map.bankwidth = 2;
if (info->map.size > AREA_MAXSIZE)
info->map.size = AREA_MAXSIZE;
pr_debug("%s: area %08lx, size %ld\n", __FUNCTION__,
info->map.phys, info->map.size);
info->area = request_mem_region(res->start, info->map.size,
pdev->name);
if (info->area == NULL) {
@@ -163,7 +163,7 @@ static int bast_flash_probe(struct device *dev)
err = -EIO;
goto exit_error;
}
simple_map_init(&info->map);
/* enable the write to the flash area */
@@ -188,7 +188,7 @@ static int bast_flash_probe(struct device *dev)
err = parse_mtd_partitions(info->mtd, probes, &info->partitions, 0);
if (err > 0) {
err = add_mtd_partitions(info->mtd, info->partitions, err);
if (err)
if (err)
printk(KERN_ERR PFX "cannot add/parse partitions\n");
} else {
err = add_mtd_device(info->mtd);
+3 -3
View File
@@ -1,7 +1,7 @@
/*
* $Id: beech-mtd.c,v 1.10 2004/11/04 13:24:14 gleixner Exp $
*
* drivers/mtd/maps/beech-mtd.c MTD mappings and partition tables for
* $Id: beech-mtd.c,v 1.11 2005/11/07 11:14:26 gleixner Exp $
*
* drivers/mtd/maps/beech-mtd.c MTD mappings and partition tables for
* IBM 405LP Beech boards.
*
* This program is free software; you can redistribute it and/or modify
+17 -17
View File
@@ -1,7 +1,7 @@
/*
* Flash on Cirrus CDB89712
*
* $Id: cdb89712.c,v 1.10 2004/11/04 13:24:14 gleixner Exp $
* $Id: cdb89712.c,v 1.11 2005/11/07 11:14:26 gleixner Exp $
*/
#include <linux/module.h>
@@ -37,13 +37,13 @@ struct resource cdb89712_flash_resource = {
static int __init init_cdb89712_flash (void)
{
int err;
if (request_resource (&ioport_resource, &cdb89712_flash_resource)) {
printk(KERN_NOTICE "Failed to reserve Cdb89712 FLASH space\n");
err = -EBUSY;
goto out;
}
cdb89712_flash_map.virt = ioremap(FLASH_START, FLASH_SIZE);
if (!cdb89712_flash_map.virt) {
printk(KERN_NOTICE "Failed to ioremap Cdb89712 FLASH space\n");
@@ -64,13 +64,13 @@ static int __init init_cdb89712_flash (void)
}
flash_mtd->owner = THIS_MODULE;
if (add_mtd_device(flash_mtd)) {
printk("FLASH device addition failed\n");
err = -ENOMEM;
goto out_probe;
}
return 0;
out_probe:
@@ -107,13 +107,13 @@ struct resource cdb89712_sram_resource = {
static int __init init_cdb89712_sram (void)
{
int err;
if (request_resource (&ioport_resource, &cdb89712_sram_resource)) {
printk(KERN_NOTICE "Failed to reserve Cdb89712 SRAM space\n");
err = -EBUSY;
goto out;
}
cdb89712_sram_map.virt = ioremap(SRAM_START, SRAM_SIZE);
if (!cdb89712_sram_map.virt) {
printk(KERN_NOTICE "Failed to ioremap Cdb89712 SRAM space\n");
@@ -130,13 +130,13 @@ static int __init init_cdb89712_sram (void)
sram_mtd->owner = THIS_MODULE;
sram_mtd->erasesize = 16;
if (add_mtd_device(sram_mtd)) {
printk("SRAM device addition failed\n");
err = -ENOMEM;
goto out_probe;
}
return 0;
out_probe:
@@ -175,13 +175,13 @@ struct resource cdb89712_bootrom_resource = {
static int __init init_cdb89712_bootrom (void)
{
int err;
if (request_resource (&ioport_resource, &cdb89712_bootrom_resource)) {
printk(KERN_NOTICE "Failed to reserve Cdb89712 BOOTROM space\n");
err = -EBUSY;
goto out;
}
cdb89712_bootrom_map.virt = ioremap(BOOTROM_START, BOOTROM_SIZE);
if (!cdb89712_bootrom_map.virt) {
printk(KERN_NOTICE "Failed to ioremap Cdb89712 BootROM space\n");
@@ -198,13 +198,13 @@ static int __init init_cdb89712_bootrom (void)
bootrom_mtd->owner = THIS_MODULE;
bootrom_mtd->erasesize = 0x10000;
if (add_mtd_device(bootrom_mtd)) {
printk("BootROM device addition failed\n");
err = -ENOMEM;
goto out_probe;
}
return 0;
out_probe:
@@ -225,16 +225,16 @@ out:
static int __init init_cdb89712_maps(void)
{
printk(KERN_INFO "Cirrus CDB89712 MTD mappings:\n Flash 0x%x at 0x%x\n SRAM 0x%x at 0x%x\n BootROM 0x%x at 0x%x\n",
printk(KERN_INFO "Cirrus CDB89712 MTD mappings:\n Flash 0x%x at 0x%x\n SRAM 0x%x at 0x%x\n BootROM 0x%x at 0x%x\n",
FLASH_SIZE, FLASH_START, SRAM_SIZE, SRAM_START, BOOTROM_SIZE, BOOTROM_START);
init_cdb89712_flash();
init_cdb89712_sram();
init_cdb89712_bootrom();
return 0;
}
static void __exit cleanup_cdb89712_maps(void)
{
@@ -244,7 +244,7 @@ static void __exit cleanup_cdb89712_maps(void)
iounmap((void *)cdb89712_sram_map.virt);
release_resource (&cdb89712_sram_resource);
}
if (flash_mtd) {
del_mtd_device(flash_mtd);
map_destroy(flash_mtd);
+6 -6
View File
@@ -1,8 +1,8 @@
/*
* Copyright © 2001 Flaga hf. Medical Devices, Kári Davíðsson <kd@flaga.is>
*
* $Id: cfi_flagadm.c,v 1.14 2004/11/04 13:24:14 gleixner Exp $
*
* $Id: cfi_flagadm.c,v 1.15 2005/11/07 11:14:26 gleixner Exp $
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
@@ -42,7 +42,7 @@
*/
#define FLASH_PHYS_ADDR 0x40000000
#define FLASH_SIZE 0x400000
#define FLASH_SIZE 0x400000
#define FLASH_PARTITION0_ADDR 0x00000000
#define FLASH_PARTITION0_SIZE 0x00020000
@@ -79,7 +79,7 @@ struct mtd_partition flagadm_parts[] = {
.offset = FLASH_PARTITION2_ADDR,
.size = FLASH_PARTITION2_SIZE
},
{
{
.name = "Persistant storage",
.offset = FLASH_PARTITION3_ADDR,
.size = FLASH_PARTITION3_SIZE
@@ -91,10 +91,10 @@ struct mtd_partition flagadm_parts[] = {
static struct mtd_info *mymtd;
int __init init_flagadm(void)
{
{
printk(KERN_NOTICE "FlagaDM flash device: %x at %x\n",
FLASH_SIZE, FLASH_PHYS_ADDR);
flagadm_map.phys = FLASH_PHYS_ADDR;
flagadm_map.virt = ioremap(FLASH_PHYS_ADDR,
FLASH_SIZE);
+12 -12
View File
@@ -1,10 +1,10 @@
/*
* $Id: cstm_mips_ixx.c,v 1.12 2004/11/04 13:24:14 gleixner Exp $
* $Id: cstm_mips_ixx.c,v 1.14 2005/11/07 11:14:26 gleixner Exp $
*
* Mapping of a custom board with both AMD CFI and JEDEC flash in partitions.
* Config with both CFI and JEDEC device support.
*
* Basically physmap.c with the addition of partitions and
* Basically physmap.c with the addition of partitions and
* an array of mapping info to accomodate more than one flash type per board.
*
* Copyright 2000 MontaVista Software Inc.
@@ -69,7 +69,7 @@ void cstm_mips_ixx_set_vpp(struct map_info *map,int vpp)
__u16 data;
__u8 data1;
static u8 first = 1;
// Set GPIO port B pin3 to high
data = *(__u16 *)(CC_GPBCR);
data = (data & 0xff0f) | 0x0040;
@@ -85,7 +85,7 @@ void cstm_mips_ixx_set_vpp(struct map_info *map,int vpp)
} else {
if (!--vpp_count) {
__u16 data;
// Set GPIO port B pin3 to high
data = *(__u16 *)(CC_GPBCR);
data = (data & 0xff3f) | 0x0040;
@@ -109,8 +109,8 @@ struct cstm_mips_ixx_info {
};
#if defined(CONFIG_MIPS_ITE8172) || defined(CONFIG_MIPS_IVR)
#define PHYSMAP_NUMBER 1 // number of board desc structs needed, one per contiguous flash type
const struct cstm_mips_ixx_info cstm_mips_ixx_board_desc[PHYSMAP_NUMBER] =
#define PHYSMAP_NUMBER 1 // number of board desc structs needed, one per contiguous flash type
const struct cstm_mips_ixx_info cstm_mips_ixx_board_desc[PHYSMAP_NUMBER] =
{
{ // 28F128J3A in 2x16 configuration
"big flash", // name
@@ -131,10 +131,10 @@ static struct mtd_partition cstm_mips_ixx_partitions[PHYSMAP_NUMBER][MAX_PHYSMAP
},
};
#else /* defined(CONFIG_MIPS_ITE8172) || defined(CONFIG_MIPS_IVR) */
#define PHYSMAP_NUMBER 1 // number of board desc structs needed, one per contiguous flash type
const struct cstm_mips_ixx_info cstm_mips_ixx_board_desc[PHYSMAP_NUMBER] =
#define PHYSMAP_NUMBER 1 // number of board desc structs needed, one per contiguous flash type
const struct cstm_mips_ixx_info cstm_mips_ixx_board_desc[PHYSMAP_NUMBER] =
{
{
{
"MTD flash", // name
CONFIG_MTD_CSTM_MIPS_IXX_START, // window_addr
CONFIG_MTD_CSTM_MIPS_IXX_LEN, // window_size
@@ -144,7 +144,7 @@ const struct cstm_mips_ixx_info cstm_mips_ixx_board_desc[PHYSMAP_NUMBER] =
};
static struct mtd_partition cstm_mips_ixx_partitions[PHYSMAP_NUMBER][MAX_PHYSMAP_PARTITIONS] = {
{
{
{
.name = "main partition",
.size = CONFIG_MTD_CSTM_MIPS_IXX_LEN,
@@ -165,7 +165,7 @@ int __init init_cstm_mips_ixx(void)
/* Initialize mapping */
for (i=0;i<PHYSMAP_NUMBER;i++) {
printk(KERN_NOTICE "cstm_mips_ixx flash device: 0x%lx at 0x%lx\n",
printk(KERN_NOTICE "cstm_mips_ixx flash device: 0x%lx at 0x%lx\n",
cstm_mips_ixx_board_desc[i].window_size, cstm_mips_ixx_board_desc[i].window_addr);
@@ -235,7 +235,7 @@ void PCISetULongByOffset(__u32 DevNumber, __u32 FuncNumber, __u32 Offset, __u32
offset = ( unsigned long )( 0x80000000 | ( DevNumber << 11 ) + ( FuncNumber << 8 ) + Offset) ;
*(__u32 *)CC_CONFADDR = offset;
*(__u32 *)CC_CONFADDR = offset;
*(__u32 *)CC_CONFDATA = data;
}
void setup_ITE_IVR_flash()
+19 -19
View File
@@ -1,5 +1,5 @@
/*
* $Id: dbox2-flash.c,v 1.13 2004/11/04 13:24:14 gleixner Exp $
* $Id: dbox2-flash.c,v 1.14 2005/11/07 11:14:26 gleixner Exp $
*
* D-Box 2 flash driver
*/
@@ -21,38 +21,38 @@
static struct mtd_partition partition_info[]= {
{
.name = "BR bootloader",
.size = 128 * 1024,
.offset = 0,
.size = 128 * 1024,
.offset = 0,
.mask_flags = MTD_WRITEABLE
},
{
.name = "FLFS (U-Boot)",
.size = 128 * 1024,
.offset = MTDPART_OFS_APPEND,
.size = 128 * 1024,
.offset = MTDPART_OFS_APPEND,
.mask_flags = 0
},
{
.name = "Root (SquashFS)",
.size = 7040 * 1024,
.offset = MTDPART_OFS_APPEND,
.name = "Root (SquashFS)",
.size = 7040 * 1024,
.offset = MTDPART_OFS_APPEND,
.mask_flags = 0
},
{
.name = "var (JFFS2)",
.size = 896 * 1024,
.offset = MTDPART_OFS_APPEND,
.size = 896 * 1024,
.offset = MTDPART_OFS_APPEND,
.mask_flags = 0
},
{
.name = "Flash without bootloader",
.size = MTDPART_SIZ_FULL,
.offset = 128 * 1024,
.name = "Flash without bootloader",
.size = MTDPART_SIZ_FULL,
.offset = 128 * 1024,
.mask_flags = 0
},
{
.name = "Complete Flash",
.size = MTDPART_SIZ_FULL,
.offset = 0,
.name = "Complete Flash",
.size = MTDPART_SIZ_FULL,
.offset = 0,
.mask_flags = MTD_WRITEABLE
}
};
@@ -88,16 +88,16 @@ int __init init_dbox2_flash(void)
if (!mymtd) {
// Probe for single Intel 28F640
dbox2_flash_map.bankwidth = 2;
mymtd = do_map_probe("cfi_probe", &dbox2_flash_map);
}
if (mymtd) {
mymtd->owner = THIS_MODULE;
/* Create MTD devices for each partition. */
add_mtd_partitions(mymtd, partition_info, NUM_PARTITIONS);
return 0;
}
+17 -17
View File
@@ -4,8 +4,8 @@
* (C) 2000 Nicolas Pitre <nico@cam.org>
*
* This code is GPL
*
* $Id: dc21285.c,v 1.22 2004/11/01 13:39:21 rmk Exp $
*
* $Id: dc21285.c,v 1.24 2005/11/07 11:14:26 gleixner Exp $
*/
#include <linux/config.h>
#include <linux/module.h>
@@ -27,9 +27,9 @@
static struct mtd_info *dc21285_mtd;
#ifdef CONFIG_ARCH_NETWINDER
/*
/*
* This is really ugly, but it seams to be the only
* realiable way to do it, as the cpld state machine
* realiable way to do it, as the cpld state machine
* is unpredictible. So we have a 25us penalty per
* write access.
*/
@@ -150,7 +150,7 @@ static struct map_info dc21285_map = {
static struct mtd_partition *dc21285_parts;
static const char *probes[] = { "RedBoot", "cmdlinepart", NULL };
#endif
static int __init init_dc21285(void)
{
@@ -160,20 +160,20 @@ static int __init init_dc21285(void)
/* Determine bankwidth */
switch (*CSR_SA110_CNTL & (3<<14)) {
case SA110_CNTL_ROMWIDTH_8:
case SA110_CNTL_ROMWIDTH_8:
dc21285_map.bankwidth = 1;
dc21285_map.read = dc21285_read8;
dc21285_map.write = dc21285_write8;
dc21285_map.copy_to = dc21285_copy_to_8;
break;
case SA110_CNTL_ROMWIDTH_16:
dc21285_map.bankwidth = 2;
case SA110_CNTL_ROMWIDTH_16:
dc21285_map.bankwidth = 2;
dc21285_map.read = dc21285_read16;
dc21285_map.write = dc21285_write16;
dc21285_map.copy_to = dc21285_copy_to_16;
break;
case SA110_CNTL_ROMWIDTH_32:
dc21285_map.bankwidth = 4;
case SA110_CNTL_ROMWIDTH_32:
dc21285_map.bankwidth = 4;
dc21285_map.read = dc21285_read32;
dc21285_map.write = dc21285_write32;
dc21285_map.copy_to = dc21285_copy_to_32;
@@ -201,20 +201,20 @@ static int __init init_dc21285(void)
if (!dc21285_mtd) {
iounmap(dc21285_map.virt);
return -ENXIO;
}
}
dc21285_mtd->owner = THIS_MODULE;
#ifdef CONFIG_MTD_PARTITIONS
nrparts = parse_mtd_partitions(dc21285_mtd, probes, &dc21285_parts, 0);
if (nrparts > 0)
add_mtd_partitions(dc21285_mtd, dc21285_parts, nrparts);
else
#endif
else
#endif
add_mtd_device(dc21285_mtd);
if(machine_is_ebsa285()) {
/*
/*
* Flash timing is determined with bits 19-16 of the
* CSR_SA110_CNTL. The value is the number of wait cycles, or
* 0 for 16 cycles (the default). Cycles are 20 ns.
@@ -227,7 +227,7 @@ static int __init init_dc21285(void)
/* tristate time */
*CSR_SA110_CNTL = ((*CSR_SA110_CNTL & ~0x0f000000) | (7 << 24));
}
return 0;
}
+16 -16
View File
@@ -14,7 +14,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
*
* $Id: dilnetpc.c,v 1.17 2004/11/28 09:40:39 dwmw2 Exp $
* $Id: dilnetpc.c,v 1.20 2005/11/07 11:14:26 gleixner Exp $
*
* The DIL/Net PC is a tiny embedded PC board made by SSV Embedded Systems
* featuring the AMD Elan SC410 processor. There are two variants of this
@@ -272,13 +272,13 @@ static struct map_info dnpc_map = {
static struct mtd_partition partition_info[]=
{
{
.name = "ADNP boot",
.offset = 0,
{
.name = "ADNP boot",
.offset = 0,
.size = 0xf0000,
},
{
.name = "ADNP system BIOS",
{
.name = "ADNP system BIOS",
.offset = MTDPART_OFS_NXTBLK,
.size = 0x10000,
#ifdef DNPC_BIOS_BLOCKS_WRITEPROTECTED
@@ -291,7 +291,7 @@ static struct mtd_partition partition_info[]=
.size = 0x2f0000,
},
{
.name = "ADNP system BIOS entry",
.name = "ADNP system BIOS entry",
.offset = MTDPART_OFS_NXTBLK,
.size = MTDPART_SIZ_FULL,
#ifdef DNPC_BIOS_BLOCKS_WRITEPROTECTED
@@ -325,9 +325,9 @@ static struct mtd_info *merged_mtd;
static struct mtd_partition higlvl_partition_info[]=
{
{
.name = "ADNP boot block",
.offset = 0,
{
.name = "ADNP boot block",
.offset = 0,
.size = CONFIG_MTD_DILNETPC_BOOTSIZE,
},
{
@@ -335,8 +335,8 @@ static struct mtd_partition higlvl_partition_info[]=
.offset = MTDPART_OFS_NXTBLK,
.size = ADNP_WINDOW_SIZE-CONFIG_MTD_DILNETPC_BOOTSIZE-0x20000,
},
{
.name = "ADNP system BIOS + BIOS Entry",
{
.name = "ADNP system BIOS + BIOS Entry",
.offset = MTDPART_OFS_NXTBLK,
.size = MTDPART_SIZ_FULL,
#ifdef DNPC_BIOS_BLOCKS_WRITEPROTECTED
@@ -371,7 +371,7 @@ static int __init init_dnpc(void)
/*
** determine hardware (DNP/ADNP/invalid)
*/
*/
if((is_dnp = dnp_adnp_probe()) < 0)
return -ENXIO;
@@ -397,13 +397,13 @@ static int __init init_dnpc(void)
++dnpc_map.name;
for(i = 0; i < NUM_PARTITIONS; i++)
++partition_info[i].name;
higlvl_partition_info[1].size = DNP_WINDOW_SIZE -
higlvl_partition_info[1].size = DNP_WINDOW_SIZE -
CONFIG_MTD_DILNETPC_BOOTSIZE - 0x20000;
for(i = 0; i < NUM_HIGHLVL_PARTITIONS; i++)
++higlvl_partition_info[i].name;
}
printk(KERN_NOTICE "DIL/Net %s flash: 0x%lx at 0x%lx\n",
printk(KERN_NOTICE "DIL/Net %s flash: 0x%lx at 0x%lx\n",
is_dnp ? "DNPC" : "ADNP", dnpc_map.size, dnpc_map.phys);
dnpc_map.virt = ioremap_nocache(dnpc_map.phys, dnpc_map.size);
@@ -436,7 +436,7 @@ static int __init init_dnpc(void)
iounmap(dnpc_map.virt);
return -ENXIO;
}
mymtd->owner = THIS_MODULE;
/*
+4 -4
View File
@@ -1,10 +1,10 @@
/*
* drivers/mtd/maps/svme182.c
*
*
* Flash map driver for the Dy4 SVME182 board
*
* $Id: dmv182.c,v 1.5 2004/11/04 13:24:14 gleixner Exp $
*
* $Id: dmv182.c,v 1.6 2005/11/07 11:14:26 gleixner Exp $
*
* Copyright 2003-2004, TimeSys Corporation
*
@@ -104,7 +104,7 @@ static int __init init_svme182(void)
partitions = svme182_partitions;
svme182_map.virt = ioremap(FLASH_BASE_ADDR, svme182_map.size);
if (svme182_map.virt == 0) {
printk("Failed to ioremap FLASH memory area.\n");
return -EIO;
+3 -3
View File
@@ -1,6 +1,6 @@
/*
* $Id: ebony.c,v 1.15 2004/12/09 18:39:54 holindho Exp $
*
* $Id: ebony.c,v 1.16 2005/11/07 11:14:26 gleixner Exp $
*
* Mapping for Ebony user flash
*
* Matt Porter <mporter@kernel.crashing.org>
@@ -85,7 +85,7 @@ int __init init_ebony(void)
small_flash_base = EBONY_SMALL_FLASH_LOW2;
else
small_flash_base = EBONY_SMALL_FLASH_LOW1;
if (EBONY_BOOT_SMALL_FLASH(fpga0_reg) &&
!EBONY_ONBRD_FLASH_EN(fpga0_reg))
large_flash_base = EBONY_LARGE_FLASH_LOW;
+5 -5
View File
@@ -1,10 +1,10 @@
/*
* $Id: edb7312.c,v 1.13 2004/11/04 13:24:14 gleixner Exp $
* $Id: edb7312.c,v 1.14 2005/11/07 11:14:27 gleixner Exp $
*
* Handle mapping of the NOR flash on Cogent EDB7312 boards
*
* Copyright 2002 SYSGO Real-Time Solutions GmbH
*
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
@@ -46,7 +46,7 @@ struct map_info edb7312nor_map = {
#ifdef CONFIG_MTD_PARTITIONS
/*
* MTD partitioning stuff
* MTD partitioning stuff
*/
static struct mtd_partition static_partitions[3] =
{
@@ -80,7 +80,7 @@ int __init init_edb7312nor(void)
const char **type;
const char *part_type = 0;
printk(KERN_NOTICE MSG_PREFIX "0x%08x at 0x%08x\n",
printk(KERN_NOTICE MSG_PREFIX "0x%08x at 0x%08x\n",
WINDOW_SIZE, WINDOW_ADDR);
edb7312nor_map.virt = ioremap(WINDOW_ADDR, WINDOW_SIZE);
@@ -88,7 +88,7 @@ int __init init_edb7312nor(void)
printk(MSG_PREFIX "failed to ioremap\n");
return -EIO;
}
simple_map_init(&edb7312nor_map);
mymtd = 0;
+6 -6
View File
@@ -5,7 +5,7 @@
* Copyright (C) 2001 Altera Corporation
* Copyright (C) 2001 Red Hat, Inc.
*
* $Id: epxa10db-flash.c,v 1.13 2004/11/04 13:24:14 gleixner Exp $
* $Id: epxa10db-flash.c,v 1.15 2005/11/07 11:14:27 gleixner Exp $
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -62,7 +62,7 @@ static const char *probes[] = { "RedBoot", "afs", NULL };
static int __init epxa_mtd_init(void)
{
int i;
printk(KERN_NOTICE "%s flash device: 0x%x at 0x%x\n", BOARD_NAME, FLASH_SIZE, FLASH_START);
epxa_map.virt = ioremap(FLASH_START, FLASH_SIZE);
@@ -126,8 +126,8 @@ static void __exit epxa_mtd_cleanup(void)
}
/*
* This will do for now, once we decide which bootldr we're finally
/*
* This will do for now, once we decide which bootldr we're finally
* going to use then we'll remove this function and do it properly
*
* Partions are currently (as offsets from base of flash):
@@ -140,7 +140,7 @@ static int __init epxa_default_partitions(struct mtd_info *master, struct mtd_pa
struct mtd_partition *parts;
int ret, i;
int npartitions = 0;
char *names;
char *names;
const char *name = "jffs";
printk("Using default partitions for %s\n",BOARD_NAME);
@@ -152,7 +152,7 @@ static int __init epxa_default_partitions(struct mtd_info *master, struct mtd_pa
goto out;
}
i=0;
names = (char *)&parts[npartitions];
names = (char *)&parts[npartitions];
parts[i].name = names;
names += strlen(name) + 1;
strcpy(parts[i].name, name);
+2 -2
View File
@@ -1,6 +1,6 @@
/* fortunet.c memory map
*
* $Id: fortunet.c,v 1.9 2004/11/04 13:24:14 gleixner Exp $
* $Id: fortunet.c,v 1.11 2005/11/07 11:14:27 gleixner Exp $
*/
#include <linux/module.h>
@@ -212,7 +212,7 @@ int __init init_fortunet(void)
map_regions[ix].map_info.phys = map_regions[ix].window_addr_physical,
map_regions[ix].map_info.virt =
map_regions[ix].map_info.virt =
ioremap_nocache(
map_regions[ix].window_addr_physical,
map_regions[ix].map_info.size);
+8 -8
View File
@@ -1,11 +1,11 @@
/*
* Flash memory access on Hynix GMS30C7201/HMS30C7202 based
* Flash memory access on Hynix GMS30C7201/HMS30C7202 based
* evaluation boards
*
* $Id: h720x-flash.c,v 1.11 2004/11/04 13:24:14 gleixner Exp $
*
* $Id: h720x-flash.c,v 1.12 2005/11/07 11:14:27 gleixner Exp $
*
* (C) 2002 Jungjun Kim <jungjun.kim@hynix.com>
* 2003 Thomas Gleixner <tglx@linutronix.de>
* 2003 Thomas Gleixner <tglx@linutronix.de>
*/
#include <linux/config.h>
@@ -72,7 +72,7 @@ int __init h720x_mtd_init(void)
{
char *part_type = NULL;
h720x_map.virt = ioremap(FLASH_PHYS, FLASH_SIZE);
if (!h720x_map.virt) {
@@ -91,7 +91,7 @@ int __init h720x_mtd_init(void)
h720x_map.bankwidth = 2;
mymtd = do_map_probe("cfi_probe", &h720x_map);
}
if (mymtd) {
mymtd->owner = THIS_MODULE;
@@ -124,11 +124,11 @@ static void __exit h720x_mtd_cleanup(void)
del_mtd_partitions(mymtd);
map_destroy(mymtd);
}
/* Free partition info, if commandline partition was used */
if (mtd_parts && (mtd_parts != h720x_partitions))
kfree (mtd_parts);
if (h720x_map.virt) {
iounmap((void *)h720x_map.virt);
h720x_map.virt = 0;

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