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Merge branch 'for-rmk-realview' of git://linux-arm.org/linux-2.6 into devel
This commit is contained in:
Russell King
Russell King
+1
-1
@@ -804,7 +804,7 @@ config HOTPLUG_CPU
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config LOCAL_TIMERS
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bool "Use local timer interrupts"
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depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP)
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depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || REALVIEW_EB_A9MP)
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default y
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help
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Enable support for local timers on SMP platforms, rather then the
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File diff suppressed because it is too large
Load Diff
+525
-240
File diff suppressed because it is too large
Load Diff
@@ -114,7 +114,7 @@ extern void local_timer_interrupt(void);
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/*
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* Stop a local timer interrupt.
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*/
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extern void local_timer_stop(unsigned int cpu);
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extern void local_timer_stop(void);
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/*
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* Platform provides this to acknowledge a local timer IRQ
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@@ -123,7 +123,7 @@ extern int local_timer_ack(void);
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#else
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static inline void local_timer_stop(unsigned int cpu)
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static inline void local_timer_stop(void)
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{
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}
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@@ -132,7 +132,7 @@ static inline void local_timer_stop(unsigned int cpu)
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/*
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* Setup a local timer interrupt for a CPU.
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*/
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extern void local_timer_setup(unsigned int cpu);
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extern void local_timer_setup(void);
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/*
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* show local interrupt info
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@@ -181,7 +181,7 @@ int __cpuexit __cpu_disable(void)
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/*
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* Stop the local timer for this CPU.
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*/
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local_timer_stop(cpu);
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local_timer_stop();
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/*
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* Flush user cache and TLB mappings, and then remove this CPU
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@@ -284,7 +284,7 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
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/*
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* Setup local timer for this CPU.
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*/
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local_timer_setup(cpu);
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local_timer_setup();
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calibrate_delay();
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@@ -7,6 +7,13 @@ config MACH_REALVIEW_EB
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help
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Include support for the ARM(R) RealView Emulation Baseboard platform.
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config REALVIEW_EB_A9MP
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bool "Support Multicore Cortex-A9"
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depends on MACH_REALVIEW_EB
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select CPU_V7
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help
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Enable support for the Cortex-A9MPCore tile on the Realview platform.
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config REALVIEW_EB_ARM11MP
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bool "Support ARM11MPCore tile"
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depends on MACH_REALVIEW_EB
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@@ -26,6 +33,7 @@ config REALVIEW_EB_ARM11MP_REVB
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config MACH_REALVIEW_PB11MP
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bool "Support RealView/PB11MPCore platform"
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select CPU_V6
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select ARM_GIC
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help
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Include support for the ARM(R) RealView MPCore Platform Baseboard.
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@@ -39,4 +47,24 @@ config MACH_REALVIEW_PB1176
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help
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Include support for the ARM(R) RealView ARM1176 Platform Baseboard.
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config MACH_REALVIEW_PBA8
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bool "Support RealView/PB-A8 platform"
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select CPU_V7
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select ARM_GIC
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help
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Include support for the ARM(R) RealView Cortex-A8 Platform Baseboard.
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PB-A8 is a platform with an on-board Cortex-A8 and has support for
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PCI-E and Compact Flash.
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config REALVIEW_HIGH_PHYS_OFFSET
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bool "High physical base address for the RealView platform"
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depends on !MACH_REALVIEW_PB1176
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default y
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help
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RealView boards other than PB1176 have the RAM available at
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0x70000000, 256MB of which being mirrored at 0x00000000. If
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the board supports 512MB of RAM, this option allows the
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memory to be accessed contiguously at the high physical
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offset.
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endmenu
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@@ -6,5 +6,6 @@ obj-y := core.o clock.o
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obj-$(CONFIG_MACH_REALVIEW_EB) += realview_eb.o
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obj-$(CONFIG_MACH_REALVIEW_PB11MP) += realview_pb11mp.o
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obj-$(CONFIG_MACH_REALVIEW_PB1176) += realview_pb1176.o
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obj-$(CONFIG_MACH_REALVIEW_PBA8) += realview_pba8.o
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obj-$(CONFIG_SMP) += platsmp.o headsmp.o localtimer.o
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obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
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@@ -1,4 +1,9 @@
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ifeq ($(CONFIG_REALVIEW_HIGH_PHYS_OFFSET),y)
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zreladdr-y := 0x70008000
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params_phys-y := 0x70000100
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initrd_phys-y := 0x70800000
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else
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zreladdr-y := 0x00008000
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params_phys-y := 0x00000100
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initrd_phys-y := 0x00800000
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endif
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@@ -28,12 +28,14 @@
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/io.h>
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#include <linux/smc911x.h>
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#include <asm/clkdev.h>
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#include <asm/system.h>
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#include <mach/hardware.h>
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#include <asm/irq.h>
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#include <asm/leds.h>
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#include <asm/mach-types.h>
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#include <asm/hardware/arm_timer.h>
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#include <asm/hardware/icst307.h>
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@@ -50,7 +52,7 @@
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#define REALVIEW_REFCOUNTER (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_24MHz_OFFSET)
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/* used by entry-macro.S */
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/* used by entry-macro.S and platsmp.c */
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void __iomem *gic_cpu_base_addr;
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/*
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@@ -125,6 +127,29 @@ int realview_flash_register(struct resource *res, u32 num)
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return platform_device_register(&realview_flash_device);
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}
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static struct smc911x_platdata realview_smc911x_platdata = {
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.flags = SMC911X_USE_32BIT,
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.irq_flags = IRQF_SHARED,
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.irq_polarity = 1,
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};
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static struct platform_device realview_eth_device = {
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.name = "smc911x",
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.id = 0,
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.num_resources = 2,
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};
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int realview_eth_register(const char *name, struct resource *res)
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{
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if (name)
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realview_eth_device.name = name;
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realview_eth_device.resource = res;
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if (strcmp(realview_eth_device.name, "smc911x") == 0)
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realview_eth_device.dev.platform_data = &realview_smc911x_platdata;
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return platform_device_register(&realview_eth_device);
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}
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static struct resource realview_i2c_resource = {
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.start = REALVIEW_I2C_BASE,
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.end = REALVIEW_I2C_BASE + SZ_4K - 1,
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@@ -178,9 +203,14 @@ static const struct icst307_params realview_oscvco_params = {
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static void realview_oscvco_set(struct clk *clk, struct icst307_vco vco)
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{
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void __iomem *sys_lock = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LOCK_OFFSET;
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void __iomem *sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC4_OFFSET;
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void __iomem *sys_osc;
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u32 val;
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if (machine_is_realview_pb1176())
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sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC0_OFFSET;
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else
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sys_osc = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_OSC4_OFFSET;
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val = readl(sys_osc) & ~0x7ffff;
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val |= vco.v | (vco.r << 9) | (vco.s << 16);
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@@ -274,7 +304,30 @@ static struct clcd_panel vga = {
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.width = -1,
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.height = -1,
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.tim2 = TIM2_BCD | TIM2_IPC,
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.cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
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.cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
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.bpp = 16,
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};
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static struct clcd_panel xvga = {
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.mode = {
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.name = "XVGA",
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.refresh = 60,
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.xres = 1024,
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.yres = 768,
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.pixclock = 15748,
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.left_margin = 152,
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.right_margin = 48,
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.upper_margin = 23,
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.lower_margin = 3,
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.hsync_len = 104,
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.vsync_len = 4,
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.sync = 0,
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.vmode = FB_VMODE_NONINTERLACED,
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},
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.width = -1,
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.height = -1,
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.tim2 = TIM2_BCD | TIM2_IPC,
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.cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
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.bpp = 16,
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};
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@@ -297,7 +350,7 @@ static struct clcd_panel sanyo_3_8_in = {
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.width = -1,
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.height = -1,
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.tim2 = TIM2_BCD,
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.cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
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.cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
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.bpp = 16,
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};
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@@ -320,7 +373,7 @@ static struct clcd_panel sanyo_2_5_in = {
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.width = -1,
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.height = -1,
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.tim2 = TIM2_IVS | TIM2_IHS | TIM2_IPC,
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.cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
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.cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
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.bpp = 16,
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};
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@@ -343,7 +396,7 @@ static struct clcd_panel epson_2_2_in = {
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.width = -1,
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.height = -1,
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.tim2 = TIM2_BCD | TIM2_IPC,
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.cntl = CNTL_LCDTFT | CNTL_LCDVCOMP(1),
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.cntl = CNTL_LCDTFT | CNTL_BGR | CNTL_LCDVCOMP(1),
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.bpp = 16,
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};
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@@ -356,9 +409,15 @@ static struct clcd_panel epson_2_2_in = {
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static struct clcd_panel *realview_clcd_panel(void)
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{
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void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
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struct clcd_panel *panel = &vga;
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struct clcd_panel *vga_panel;
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struct clcd_panel *panel;
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u32 val;
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if (machine_is_realview_eb())
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vga_panel = &vga;
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else
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vga_panel = &xvga;
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val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
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if (val == SYS_CLCD_ID_SANYO_3_8)
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panel = &sanyo_3_8_in;
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@@ -367,11 +426,11 @@ static struct clcd_panel *realview_clcd_panel(void)
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else if (val == SYS_CLCD_ID_EPSON_2_2)
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panel = &epson_2_2_in;
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else if (val == SYS_CLCD_ID_VGA)
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panel = &vga;
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panel = vga_panel;
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else {
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printk(KERN_ERR "CLCD: unknown LCD panel ID 0x%08x, using VGA\n",
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val);
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panel = &vga;
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panel = vga_panel;
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}
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return panel;
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@@ -406,12 +465,18 @@ static void realview_clcd_enable(struct clcd_fb *fb)
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writel(val, sys_clcd);
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}
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static unsigned long framesize = SZ_1M;
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static int realview_clcd_setup(struct clcd_fb *fb)
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{
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unsigned long framesize;
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dma_addr_t dma;
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if (machine_is_realview_eb())
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/* VGA, 16bpp */
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framesize = 640 * 480 * 2;
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else
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/* XVGA, 16bpp */
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framesize = 1024 * 768 * 2;
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fb->panel = realview_clcd_panel();
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fb->fb.screen_base = dma_alloc_writecombine(&fb->dev->dev, framesize,
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@@ -636,7 +701,7 @@ void __init realview_timer_init(unsigned int timer_irq)
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* The dummy clock device has to be registered before the main device
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* so that the latter will broadcast the clock events
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*/
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local_timer_setup(smp_processor_id());
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local_timer_setup();
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#endif
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/*
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@@ -51,8 +51,7 @@ extern struct mmc_platform_data realview_mmc1_plat_data;
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extern struct clcd_board clcd_plat_data;
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extern void __iomem *gic_cpu_base_addr;
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#ifdef CONFIG_LOCAL_TIMERS
|
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extern void __iomem *twd_base_addr;
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extern unsigned int twd_size;
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extern void __iomem *twd_base;
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#endif
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extern void __iomem *timer0_va_base;
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extern void __iomem *timer1_va_base;
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@@ -62,5 +61,6 @@ extern void __iomem *timer3_va_base;
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extern void realview_leds_event(led_event_t ledevt);
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extern void realview_timer_init(unsigned int timer_irq);
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extern int realview_flash_register(struct resource *res, u32 num);
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extern int realview_eth_register(const char *name, struct resource *res);
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|
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#endif
|
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|
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@@ -13,6 +13,8 @@
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#include <linux/smp.h>
|
||||
#include <linux/completion.h>
|
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|
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#include <asm/cacheflush.h>
|
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|
||||
extern volatile int pen_release;
|
||||
|
||||
static DECLARE_COMPLETION(cpu_killed);
|
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@@ -21,7 +23,8 @@ static inline void cpu_enter_lowpower(void)
|
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{
|
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unsigned int v;
|
||||
|
||||
asm volatile( "mcr p15, 0, %1, c7, c14, 0\n"
|
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flush_cache_all();
|
||||
asm volatile(
|
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" mcr p15, 0, %1, c7, c5, 0\n"
|
||||
" mcr p15, 0, %1, c7, c10, 4\n"
|
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/*
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|
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@@ -49,16 +49,14 @@
|
||||
#ifdef CONFIG_REALVIEW_EB_ARM11MP_REVB
|
||||
#define REALVIEW_EB11MP_SCU_BASE 0x10100000 /* SCU registers */
|
||||
#define REALVIEW_EB11MP_GIC_CPU_BASE 0x10100100 /* Generic interrupt controller CPU interface */
|
||||
#define REALVIEW_EB11MP_TWD_BASE 0x10100700
|
||||
#define REALVIEW_EB11MP_TWD_SIZE 0x00000100
|
||||
#define REALVIEW_EB11MP_TWD_BASE 0x10100600
|
||||
#define REALVIEW_EB11MP_GIC_DIST_BASE 0x10101000 /* Generic interrupt controller distributor */
|
||||
#define REALVIEW_EB11MP_L220_BASE 0x10102000 /* L220 registers */
|
||||
#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0xD8 /* Register offset for MPCore sysctl */
|
||||
#else
|
||||
#define REALVIEW_EB11MP_SCU_BASE 0x1F000000 /* SCU registers */
|
||||
#define REALVIEW_EB11MP_GIC_CPU_BASE 0x1F000100 /* Generic interrupt controller CPU interface */
|
||||
#define REALVIEW_EB11MP_TWD_BASE 0x1F000700
|
||||
#define REALVIEW_EB11MP_TWD_SIZE 0x00000100
|
||||
#define REALVIEW_EB11MP_TWD_BASE 0x1F000600
|
||||
#define REALVIEW_EB11MP_GIC_DIST_BASE 0x1F001000 /* Generic interrupt controller distributor */
|
||||
#define REALVIEW_EB11MP_L220_BASE 0x1F002000 /* L220 registers */
|
||||
#define REALVIEW_EB11MP_SYS_PLD_CTRL1 0x74 /* Register offset for MPCore sysctl */
|
||||
@@ -163,7 +161,7 @@
|
||||
#define NR_IRQS NR_IRQS_EB
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_REALVIEW_EB_ARM11MP) \
|
||||
#if defined(CONFIG_REALVIEW_EB_ARM11MP) || defined(CONFIG_REALVIEW_EB_A9MP) \
|
||||
&& (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
|
||||
#undef MAX_GIC_NR
|
||||
#define MAX_GIC_NR NR_GIC_EB11MP
|
||||
@@ -177,6 +175,7 @@
|
||||
#define REALVIEW_EB_PROC_ARM9 0x02000000
|
||||
#define REALVIEW_EB_PROC_ARM11 0x04000000
|
||||
#define REALVIEW_EB_PROC_ARM11MP 0x06000000
|
||||
#define REALVIEW_EB_PROC_A9MP 0x0C000000
|
||||
|
||||
#define check_eb_proc(proc_type) \
|
||||
((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \
|
||||
@@ -188,4 +187,13 @@
|
||||
#define core_tile_eb11mp() 0
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_REALVIEW_EB_A9MP
|
||||
#define core_tile_a9mp() check_eb_proc(REALVIEW_EB_PROC_A9MP)
|
||||
#else
|
||||
#define core_tile_a9mp() 0
|
||||
#endif
|
||||
|
||||
#define machine_is_realview_eb_mp() \
|
||||
(machine_is_realview_eb() && (core_tile_eb11mp() || core_tile_a9mp()))
|
||||
|
||||
#endif /* __ASM_ARCH_BOARD_EB_H */
|
||||
|
||||
@@ -77,8 +77,7 @@
|
||||
*/
|
||||
#define REALVIEW_TC11MP_SCU_BASE 0x1F000000 /* IRQ, Test chip */
|
||||
#define REALVIEW_TC11MP_GIC_CPU_BASE 0x1F000100 /* Test chip interrupt controller CPU interface */
|
||||
#define REALVIEW_TC11MP_TWD_BASE 0x1F000700
|
||||
#define REALVIEW_TC11MP_TWD_SIZE 0x00000100
|
||||
#define REALVIEW_TC11MP_TWD_BASE 0x1F000600
|
||||
#define REALVIEW_TC11MP_GIC_DIST_BASE 0x1F001000 /* Test chip interrupt controller distributor */
|
||||
#define REALVIEW_TC11MP_L220_BASE 0x1F002000 /* L220 registers */
|
||||
|
||||
|
||||
@@ -0,0 +1,152 @@
|
||||
/*
|
||||
* include/asm-arm/arch-realview/board-pba8.h
|
||||
*
|
||||
* Copyright (C) 2008 ARM Limited
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
|
||||
* MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_BOARD_PBA8_H
|
||||
#define __ASM_ARCH_BOARD_PBA8_H
|
||||
|
||||
#include <mach/platform.h>
|
||||
|
||||
/*
|
||||
* Peripheral addresses
|
||||
*/
|
||||
#define REALVIEW_PBA8_UART0_BASE 0x10009000 /* UART 0 */
|
||||
#define REALVIEW_PBA8_UART1_BASE 0x1000A000 /* UART 1 */
|
||||
#define REALVIEW_PBA8_UART2_BASE 0x1000B000 /* UART 2 */
|
||||
#define REALVIEW_PBA8_UART3_BASE 0x1000C000 /* UART 3 */
|
||||
#define REALVIEW_PBA8_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
|
||||
#define REALVIEW_PBA8_WATCHDOG0_BASE 0x1000F000 /* Watchdog 0 */
|
||||
#define REALVIEW_PBA8_WATCHDOG_BASE 0x10010000 /* watchdog interface */
|
||||
#define REALVIEW_PBA8_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
|
||||
#define REALVIEW_PBA8_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
|
||||
#define REALVIEW_PBA8_GPIO0_BASE 0x10013000 /* GPIO port 0 */
|
||||
#define REALVIEW_PBA8_RTC_BASE 0x10017000 /* Real Time Clock */
|
||||
#define REALVIEW_PBA8_TIMER4_5_BASE 0x10018000 /* Timer 4/5 */
|
||||
#define REALVIEW_PBA8_TIMER6_7_BASE 0x10019000 /* Timer 6/7 */
|
||||
#define REALVIEW_PBA8_SCTL_BASE 0x1001A000 /* System Controller */
|
||||
#define REALVIEW_PBA8_CLCD_BASE 0x10020000 /* CLCD */
|
||||
#define REALVIEW_PBA8_ONB_SRAM_BASE 0x10060000 /* On-board SRAM */
|
||||
#define REALVIEW_PBA8_DMC_BASE 0x100E0000 /* DMC configuration */
|
||||
#define REALVIEW_PBA8_SMC_BASE 0x100E1000 /* SMC configuration */
|
||||
#define REALVIEW_PBA8_CAN_BASE 0x100E2000 /* CAN bus */
|
||||
#define REALVIEW_PBA8_CF_BASE 0x18000000 /* Compact flash */
|
||||
#define REALVIEW_PBA8_CF_MEM_BASE 0x18003000 /* SMC for Compact flash */
|
||||
#define REALVIEW_PBA8_GIC_CPU_BASE 0x1E000000 /* Generic interrupt controller CPU interface */
|
||||
#define REALVIEW_PBA8_FLASH0_BASE 0x40000000
|
||||
#define REALVIEW_PBA8_FLASH0_SIZE SZ_64M
|
||||
#define REALVIEW_PBA8_FLASH1_BASE 0x44000000
|
||||
#define REALVIEW_PBA8_FLASH1_SIZE SZ_64M
|
||||
#define REALVIEW_PBA8_ETH_BASE 0x4E000000 /* Ethernet */
|
||||
#define REALVIEW_PBA8_USB_BASE 0x4F000000 /* USB */
|
||||
#define REALVIEW_PBA8_GIC_DIST_BASE 0x1E001000 /* Generic interrupt controller distributor */
|
||||
#define REALVIEW_PBA8_LT_BASE 0xC0000000 /* Logic Tile expansion */
|
||||
#define REALVIEW_PBA8_SDRAM6_BASE 0x70000000 /* SDRAM bank 6 256MB */
|
||||
#define REALVIEW_PBA8_SDRAM7_BASE 0x80000000 /* SDRAM bank 7 256MB */
|
||||
|
||||
#define REALVIEW_PBA8_SYS_PLD_CTRL1 0x74
|
||||
|
||||
/*
|
||||
* PBA8 PCI regions
|
||||
*/
|
||||
#define REALVIEW_PBA8_PCI_BASE 0x90040000 /* PCI-X Unit base */
|
||||
#define REALVIEW_PBA8_PCI_IO_BASE 0x90050000 /* IO Region on AHB */
|
||||
#define REALVIEW_PBA8_PCI_MEM_BASE 0xA0000000 /* MEM Region on AHB */
|
||||
|
||||
#define REALVIEW_PBA8_PCI_BASE_SIZE 0x10000 /* 16 Kb */
|
||||
#define REALVIEW_PBA8_PCI_IO_SIZE 0x1000 /* 4 Kb */
|
||||
#define REALVIEW_PBA8_PCI_MEM_SIZE 0x20000000 /* 512 MB */
|
||||
|
||||
/*
|
||||
* Irqs
|
||||
*/
|
||||
#define IRQ_PBA8_GIC_START 32
|
||||
|
||||
/* L220
|
||||
#define IRQ_PBA8_L220_EVENT (IRQ_PBA8_GIC_START + 29)
|
||||
#define IRQ_PBA8_L220_SLAVE (IRQ_PBA8_GIC_START + 30)
|
||||
#define IRQ_PBA8_L220_DECODE (IRQ_PBA8_GIC_START + 31)
|
||||
*/
|
||||
|
||||
/*
|
||||
* PB-A8 on-board gic irq sources
|
||||
*/
|
||||
#define IRQ_PBA8_WATCHDOG (IRQ_PBA8_GIC_START + 0) /* Watchdog timer */
|
||||
#define IRQ_PBA8_SOFT (IRQ_PBA8_GIC_START + 1) /* Software interrupt */
|
||||
#define IRQ_PBA8_COMMRx (IRQ_PBA8_GIC_START + 2) /* Debug Comm Rx interrupt */
|
||||
#define IRQ_PBA8_COMMTx (IRQ_PBA8_GIC_START + 3) /* Debug Comm Tx interrupt */
|
||||
#define IRQ_PBA8_TIMER0_1 (IRQ_PBA8_GIC_START + 4) /* Timer 0/1 (default timer) */
|
||||
#define IRQ_PBA8_TIMER2_3 (IRQ_PBA8_GIC_START + 5) /* Timer 2/3 */
|
||||
#define IRQ_PBA8_GPIO0 (IRQ_PBA8_GIC_START + 6) /* GPIO 0 */
|
||||
#define IRQ_PBA8_GPIO1 (IRQ_PBA8_GIC_START + 7) /* GPIO 1 */
|
||||
#define IRQ_PBA8_GPIO2 (IRQ_PBA8_GIC_START + 8) /* GPIO 2 */
|
||||
/* 9 reserved */
|
||||
#define IRQ_PBA8_RTC (IRQ_PBA8_GIC_START + 10) /* Real Time Clock */
|
||||
#define IRQ_PBA8_SSP (IRQ_PBA8_GIC_START + 11) /* Synchronous Serial Port */
|
||||
#define IRQ_PBA8_UART0 (IRQ_PBA8_GIC_START + 12) /* UART 0 on development chip */
|
||||
#define IRQ_PBA8_UART1 (IRQ_PBA8_GIC_START + 13) /* UART 1 on development chip */
|
||||
#define IRQ_PBA8_UART2 (IRQ_PBA8_GIC_START + 14) /* UART 2 on development chip */
|
||||
#define IRQ_PBA8_UART3 (IRQ_PBA8_GIC_START + 15) /* UART 3 on development chip */
|
||||
#define IRQ_PBA8_SCI (IRQ_PBA8_GIC_START + 16) /* Smart Card Interface */
|
||||
#define IRQ_PBA8_MMCI0A (IRQ_PBA8_GIC_START + 17) /* Multimedia Card 0A */
|
||||
#define IRQ_PBA8_MMCI0B (IRQ_PBA8_GIC_START + 18) /* Multimedia Card 0B */
|
||||
#define IRQ_PBA8_AACI (IRQ_PBA8_GIC_START + 19) /* Audio Codec */
|
||||
#define IRQ_PBA8_KMI0 (IRQ_PBA8_GIC_START + 20) /* Keyboard/Mouse port 0 */
|
||||
#define IRQ_PBA8_KMI1 (IRQ_PBA8_GIC_START + 21) /* Keyboard/Mouse port 1 */
|
||||
#define IRQ_PBA8_CHARLCD (IRQ_PBA8_GIC_START + 22) /* Character LCD */
|
||||
#define IRQ_PBA8_CLCD (IRQ_PBA8_GIC_START + 23) /* CLCD controller */
|
||||
#define IRQ_PBA8_DMAC (IRQ_PBA8_GIC_START + 24) /* DMA controller */
|
||||
#define IRQ_PBA8_PWRFAIL (IRQ_PBA8_GIC_START + 25) /* Power failure */
|
||||
#define IRQ_PBA8_PISMO (IRQ_PBA8_GIC_START + 26) /* PISMO interface */
|
||||
#define IRQ_PBA8_DoC (IRQ_PBA8_GIC_START + 27) /* Disk on Chip memory controller */
|
||||
#define IRQ_PBA8_ETH (IRQ_PBA8_GIC_START + 28) /* Ethernet controller */
|
||||
#define IRQ_PBA8_USB (IRQ_PBA8_GIC_START + 29) /* USB controller */
|
||||
#define IRQ_PBA8_TSPEN (IRQ_PBA8_GIC_START + 30) /* Touchscreen pen */
|
||||
#define IRQ_PBA8_TSKPAD (IRQ_PBA8_GIC_START + 31) /* Touchscreen keypad */
|
||||
|
||||
/* ... */
|
||||
#define IRQ_PBA8_PCI0 (IRQ_PBA8_GIC_START + 50)
|
||||
#define IRQ_PBA8_PCI1 (IRQ_PBA8_GIC_START + 51)
|
||||
#define IRQ_PBA8_PCI2 (IRQ_PBA8_GIC_START + 52)
|
||||
#define IRQ_PBA8_PCI3 (IRQ_PBA8_GIC_START + 53)
|
||||
|
||||
#define IRQ_PBA8_SMC -1
|
||||
#define IRQ_PBA8_SCTL -1
|
||||
|
||||
#define NR_GIC_PBA8 1
|
||||
|
||||
/*
|
||||
* Only define NR_IRQS if less than NR_IRQS_PBA8
|
||||
*/
|
||||
#define NR_IRQS_PBA8 (IRQ_PBA8_GIC_START + 64)
|
||||
|
||||
#if defined(CONFIG_MACH_REALVIEW_PBA8)
|
||||
|
||||
#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PBA8)
|
||||
#undef NR_IRQS
|
||||
#define NR_IRQS NR_IRQS_PBA8
|
||||
#endif
|
||||
|
||||
#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PBA8)
|
||||
#undef MAX_GIC_NR
|
||||
#define MAX_GIC_NR NR_GIC_PBA8
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_MACH_REALVIEW_PBA8 */
|
||||
|
||||
#endif /* __ASM_ARCH_BOARD_PBA8_H */
|
||||
@@ -8,15 +8,36 @@
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_MACH_REALVIEW_EB) || \
|
||||
defined(CONFIG_MACH_REALVIEW_PB11MP) || \
|
||||
defined(CONFIG_MACH_REALVIEW_PBA8)
|
||||
#ifndef DEBUG_LL_UART_OFFSET
|
||||
#define DEBUG_LL_UART_OFFSET 0x00009000
|
||||
#elif DEBUG_LL_UART_OFFSET != 0x00009000
|
||||
#warning "DEBUG_LL_UART_OFFSET already defined to a different value"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MACH_REALVIEW_PB1176
|
||||
#ifndef DEBUG_LL_UART_OFFSET
|
||||
#define DEBUG_LL_UART_OFFSET 0x0010c000
|
||||
#elif DEBUG_LL_UART_OFFSET != 0x0010c000
|
||||
#warning "DEBUG_LL_UART_OFFSET already defined to a different value"
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifndef DEBUG_LL_UART_OFFSET
|
||||
#error "Unknown RealView platform"
|
||||
#endif
|
||||
|
||||
.macro addruart,rx
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
moveq \rx, #0x10000000
|
||||
movne \rx, #0xf0000000 @ virtual base
|
||||
orr \rx, \rx, #0x00009000
|
||||
movne \rx, #0xfb000000 @ virtual base
|
||||
orr \rx, \rx, #DEBUG_LL_UART_OFFSET
|
||||
.endm
|
||||
|
||||
#include <asm/hardware/debug-pl01x.S>
|
||||
|
||||
@@ -25,7 +25,14 @@
|
||||
#include <asm/sizes.h>
|
||||
|
||||
/* macro to get at IO space when running virtually */
|
||||
#define IO_ADDRESS(x) (((x) & 0x0fffffff) + 0xf0000000)
|
||||
/*
|
||||
* Statically mapped addresses:
|
||||
*
|
||||
* 10xx xxxx -> fbxx xxxx
|
||||
* 1exx xxxx -> fdxx xxxx
|
||||
* 1fxx xxxx -> fexx xxxx
|
||||
*/
|
||||
#define IO_ADDRESS(x) (((x) & 0x03ffffff) + 0xfb000000)
|
||||
#define __io_address(n) __io(IO_ADDRESS(n))
|
||||
|
||||
#endif
|
||||
|
||||
@@ -25,6 +25,7 @@
|
||||
#include <mach/board-eb.h>
|
||||
#include <mach/board-pb11mp.h>
|
||||
#include <mach/board-pb1176.h>
|
||||
#include <mach/board-pba8.h>
|
||||
|
||||
#define IRQ_LOCALTIMER 29
|
||||
#define IRQ_LOCALWDOG 30
|
||||
|
||||
@@ -23,6 +23,10 @@
|
||||
/*
|
||||
* Physical DRAM offset.
|
||||
*/
|
||||
#ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
|
||||
#define PHYS_OFFSET UL(0x70000000)
|
||||
#else
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@@ -23,6 +23,7 @@
|
||||
#include <mach/board-eb.h>
|
||||
#include <mach/board-pb11mp.h>
|
||||
#include <mach/board-pb1176.h>
|
||||
#include <mach/board-pba8.h>
|
||||
|
||||
#define AMBA_UART_DR(base) (*(volatile unsigned char *)((base) + 0x00))
|
||||
#define AMBA_UART_LCRH(base) (*(volatile unsigned char *)((base) + 0x2c))
|
||||
@@ -40,6 +41,8 @@ static inline unsigned long get_uart_base(void)
|
||||
return REALVIEW_PB11MP_UART0_BASE;
|
||||
else if (machine_is_realview_pb1176())
|
||||
return REALVIEW_PB1176_UART0_BASE;
|
||||
else if (machine_is_realview_pba8())
|
||||
return REALVIEW_PBA8_UART0_BASE;
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -18,4 +18,4 @@
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
#define VMALLOC_END (PAGE_OFFSET + 0x18000000)
|
||||
#define VMALLOC_END 0xf8000000
|
||||
|
||||
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Reference in New Issue
Block a user