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Merge tag 'drm-intel-fixes-2015-08-14' into drm-intel-next-fixes
Backmerge drm-intel-fixes because a bunch of atomic patch backporting we had to do lead to horrible conflicts. Conflicts: drivers/gpu/drm/drm_crtc.c Just a bit of context conflict between -next and -fixes. drivers/gpu/drm/i915/intel_atomic.c drivers/gpu/drm/i915/intel_display.c Atomic conflicts, always pick the code from -next. Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
This commit is contained in:
Daniel Vetter
@@ -35,7 +35,7 @@ Example:
|
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device_type = "dma";
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reg = <0x0 0x1f270000 0x0 0x10000>,
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<0x0 0x1f200000 0x0 0x10000>,
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<0x0 0x1b008000 0x0 0x2000>,
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<0x0 0x1b000000 0x0 0x400000>,
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<0x0 0x1054a000 0x0 0x100>;
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interrupts = <0x0 0x82 0x4>,
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<0x0 0xb8 0x4>,
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@@ -35,3 +35,6 @@ the PCIe specification.
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NOTE: this only applies to the SMMU itself, not
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masters connected upstream of the SMMU.
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- hisilicon,broken-prefetch-cmd
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: Avoid sending CMD_PREFETCH_* commands to the SMMU.
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@@ -17,7 +17,6 @@ Required properties:
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"fsl,imx6sx-usdhc"
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Optional properties:
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- fsl,cd-controller : Indicate to use controller internal card detection
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- fsl,wp-controller : Indicate to use controller internal write protection
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- fsl,delay-line : Specify the number of delay cells for override mode.
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This is used to set the clock delay for DLL(Delay Line) on override mode
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@@ -35,7 +34,6 @@ esdhc@70004000 {
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compatible = "fsl,imx51-esdhc";
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reg = <0x70004000 0x4000>;
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interrupts = <1>;
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fsl,cd-controller;
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fsl,wp-controller;
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};
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@@ -82,6 +82,9 @@ Optional properties:
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- id: If there are multiple instance of the same type, in order to
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differentiate between each instance "id" can be used (e.g., multi-lane PCIe
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PHY). If "id" is not provided, it is set to default value of '1'.
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- syscon-pllreset: Handle to system control region that contains the
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CTRL_CORE_SMA_SW_0 register and register offset to the CTRL_CORE_SMA_SW_0
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register that contains the SATA_PLL_SOFT_RESET bit. Only valid for sata_phy.
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This is usually a subnode of ocp2scp to which it is connected.
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@@ -100,3 +103,16 @@ usb3phy@4a084400 {
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"sysclk",
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"refclk";
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};
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sata_phy: phy@4A096000 {
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compatible = "ti,phy-pipe3-sata";
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reg = <0x4A096000 0x80>, /* phy_rx */
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<0x4A096400 0x64>, /* phy_tx */
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<0x4A096800 0x40>; /* pll_ctrl */
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reg-names = "phy_rx", "phy_tx", "pll_ctrl";
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ctrl-module = <&omap_control_sata>;
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clocks = <&sys_clkin1>, <&sata_ref_clk>;
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clock-names = "sysclk", "refclk";
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syscon-pllreset = <&scm_conf 0x3fc>;
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#phy-cells = <0>;
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};
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@@ -3,11 +3,13 @@ MT8173 with MAX98090 CODEC
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Required properties:
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- compatible : "mediatek,mt8173-max98090"
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- mediatek,audio-codec: the phandle of the MAX98090 audio codec
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- mediatek,platform: the phandle of MT8173 ASoC platform
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Example:
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sound {
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compatible = "mediatek,mt8173-max98090";
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mediatek,audio-codec = <&max98090>;
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mediatek,platform = <&afe>;
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};
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@@ -3,11 +3,13 @@ MT8173 with RT5650 RT5676 CODECS
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Required properties:
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- compatible : "mediatek,mt8173-rt5650-rt5676"
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- mediatek,audio-codec: the phandles of rt5650 and rt5676 codecs
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- mediatek,platform: the phandle of MT8173 ASoC platform
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Example:
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sound {
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compatible = "mediatek,mt8173-rt5650-rt5676";
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mediatek,audio-codec = <&rt5650 &rt5676>;
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mediatek,platform = <&afe>;
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};
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@@ -3,7 +3,7 @@ Binding for Qualcomm Atheros AR7xxx/AR9xxx SPI controller
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Required properties:
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- compatible: has to be "qca,<soc-type>-spi", "qca,ar7100-spi" as fallback.
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- reg: Base address and size of the controllers memory area
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- clocks: phandle to the AHB clock.
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- clocks: phandle of the AHB clock.
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- clock-names: has to be "ahb".
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- #address-cells: <1>, as required by generic SPI binding.
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- #size-cells: <0>, also as required by generic SPI binding.
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@@ -12,9 +12,9 @@ Child nodes as per the generic SPI binding.
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Example:
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spi@1F000000 {
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spi@1f000000 {
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compatible = "qca,ar9132-spi", "qca,ar7100-spi";
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reg = <0x1F000000 0x10>;
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reg = <0x1f000000 0x10>;
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clocks = <&pll 2>;
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clock-names = "ahb";
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@@ -35,11 +35,11 @@ temp1_input Local temperature (1/1000 degree,
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temp[2-9]_input CPU temperatures (1/1000 degree,
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0.125 degree resolution)
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fan[1-4]_mode R/W, 0/1 for manual or SmartFan mode
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pwm[1-4]_enable R/W, 1/2 for manual or SmartFan mode
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Setting SmartFan mode is supported only if it has been
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previously configured by BIOS (or configuration EEPROM)
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fan[1-4]_pwm R/O in SmartFan mode, R/W in manual control mode
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pwm[1-4] R/O in SmartFan mode, R/W in manual control mode
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The driver checks sensor control registers and does not export the sensors
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that are not enabled. Anyway, a sensor that is enabled may actually be not
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@@ -119,8 +119,10 @@ ALPS Absolute Mode - Protocol Version 2
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byte 5: 0 z6 z5 z4 z3 z2 z1 z0
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Protocol Version 2 DualPoint devices send standard PS/2 mouse packets for
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the DualPoint Stick. For non interleaved dualpoint devices the pointingstick
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buttons get reported separately in the PSM, PSR and PSL bits.
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the DualPoint Stick. The M, R and L bits signal the combined status of both
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the pointingstick and touchpad buttons, except for Dell dualpoint devices
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where the pointingstick buttons get reported separately in the PSM, PSR
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and PSL bits.
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Dualpoint device -- interleaved packet format
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---------------------------------------------
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@@ -199,7 +199,8 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name):
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buf += "#include <linux/string.h>\n"
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buf += "#include <linux/configfs.h>\n"
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buf += "#include <linux/ctype.h>\n"
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buf += "#include <asm/unaligned.h>\n\n"
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buf += "#include <asm/unaligned.h>\n"
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buf += "#include <scsi/scsi_proto.h>\n\n"
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buf += "#include <target/target_core_base.h>\n"
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buf += "#include <target/target_core_fabric.h>\n"
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buf += "#include <target/target_core_fabric_configfs.h>\n"
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@@ -230,8 +231,14 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name):
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buf += " }\n"
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buf += " tpg->" + fabric_mod_port + " = " + fabric_mod_port + ";\n"
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buf += " tpg->" + fabric_mod_port + "_tpgt = tpgt;\n\n"
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buf += " ret = core_tpg_register(&" + fabric_mod_name + "_ops, wwn,\n"
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buf += " &tpg->se_tpg, SCSI_PROTOCOL_SAS);\n"
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if proto_ident == "FC":
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buf += " ret = core_tpg_register(wwn, &tpg->se_tpg, SCSI_PROTOCOL_FCP);\n"
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elif proto_ident == "SAS":
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buf += " ret = core_tpg_register(wwn, &tpg->se_tpg, SCSI_PROTOCOL_SAS);\n"
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elif proto_ident == "iSCSI":
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buf += " ret = core_tpg_register(wwn, &tpg->se_tpg, SCSI_PROTOCOL_ISCSI);\n"
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|
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buf += " if (ret < 0) {\n"
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buf += " kfree(tpg);\n"
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buf += " return NULL;\n"
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@@ -292,7 +299,7 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name):
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buf += "static const struct target_core_fabric_ops " + fabric_mod_name + "_ops = {\n"
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buf += " .module = THIS_MODULE,\n"
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buf += " .name = " + fabric_mod_name + ",\n"
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buf += " .name = \"" + fabric_mod_name + "\",\n"
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buf += " .get_fabric_name = " + fabric_mod_name + "_get_fabric_name,\n"
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buf += " .tpg_get_wwn = " + fabric_mod_name + "_get_fabric_wwn,\n"
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buf += " .tpg_get_tag = " + fabric_mod_name + "_get_tag,\n"
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@@ -322,17 +329,17 @@ def tcm_mod_build_configfs(proto_ident, fabric_mod_dir_var, fabric_mod_name):
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buf += " .fabric_make_tpg = " + fabric_mod_name + "_make_tpg,\n"
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buf += " .fabric_drop_tpg = " + fabric_mod_name + "_drop_tpg,\n"
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buf += "\n"
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buf += " .tfc_wwn_attrs = " + fabric_mod_name + "_wwn_attrs;\n"
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buf += " .tfc_wwn_attrs = " + fabric_mod_name + "_wwn_attrs,\n"
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buf += "};\n\n"
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buf += "static int __init " + fabric_mod_name + "_init(void)\n"
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buf += "{\n"
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buf += " return target_register_template(" + fabric_mod_name + "_ops);\n"
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buf += " return target_register_template(&" + fabric_mod_name + "_ops);\n"
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buf += "};\n\n"
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buf += "static void __exit " + fabric_mod_name + "_exit(void)\n"
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buf += "{\n"
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buf += " target_unregister_template(" + fabric_mod_name + "_ops);\n"
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buf += " target_unregister_template(&" + fabric_mod_name + "_ops);\n"
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buf += "};\n\n"
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buf += "MODULE_DESCRIPTION(\"" + fabric_mod_name.upper() + " series fabric driver\");\n"
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+20
-2
@@ -5605,6 +5605,7 @@ F: kernel/irq/
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IRQCHIP DRIVERS
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M: Thomas Gleixner <tglx@linutronix.de>
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M: Jason Cooper <jason@lakedaemon.net>
|
||||
M: Marc Zyngier <marc.zyngier@arm.com>
|
||||
L: linux-kernel@vger.kernel.org
|
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S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core
|
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@@ -5613,11 +5614,14 @@ F: Documentation/devicetree/bindings/interrupt-controller/
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F: drivers/irqchip/
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|
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IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY)
|
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M: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
||||
M: Jiang Liu <jiang.liu@linux.intel.com>
|
||||
M: Marc Zyngier <marc.zyngier@arm.com>
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core
|
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F: Documentation/IRQ-domain.txt
|
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F: include/linux/irqdomain.h
|
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F: kernel/irq/irqdomain.c
|
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F: kernel/irq/msi.c
|
||||
|
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ISAPNP
|
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M: Jaroslav Kysela <perex@perex.cz>
|
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@@ -5904,7 +5908,6 @@ S: Supported
|
||||
F: Documentation/s390/kvm.txt
|
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F: arch/s390/include/asm/kvm*
|
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F: arch/s390/kvm/
|
||||
F: drivers/s390/kvm/
|
||||
|
||||
KERNEL VIRTUAL MACHINE (KVM) FOR ARM
|
||||
M: Christoffer Dall <christoffer.dall@linaro.org>
|
||||
@@ -6844,6 +6847,12 @@ T: git git://linuxtv.org/anttip/media_tree.git
|
||||
S: Maintained
|
||||
F: drivers/media/usb/msi2500/
|
||||
|
||||
MSYSTEMS DISKONCHIP G3 MTD DRIVER
|
||||
M: Robert Jarzmik <robert.jarzmik@free.fr>
|
||||
L: linux-mtd@lists.infradead.org
|
||||
S: Maintained
|
||||
F: drivers/mtd/devices/docg3*
|
||||
|
||||
MT9M032 APTINA SENSOR DRIVER
|
||||
M: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
|
||||
L: linux-media@vger.kernel.org
|
||||
@@ -10901,6 +10910,15 @@ F: drivers/block/virtio_blk.c
|
||||
F: include/linux/virtio_*.h
|
||||
F: include/uapi/linux/virtio_*.h
|
||||
|
||||
VIRTIO DRIVERS FOR S390
|
||||
M: Christian Borntraeger <borntraeger@de.ibm.com>
|
||||
M: Cornelia Huck <cornelia.huck@de.ibm.com>
|
||||
L: linux-s390@vger.kernel.org
|
||||
L: virtualization@lists.linux-foundation.org
|
||||
L: kvm@vger.kernel.org
|
||||
S: Supported
|
||||
F: drivers/s390/virtio/
|
||||
|
||||
VIRTIO GPU DRIVER
|
||||
M: David Airlie <airlied@linux.ie>
|
||||
M: Gerd Hoffmann <kraxel@redhat.com>
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
VERSION = 4
|
||||
PATCHLEVEL = 2
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc3
|
||||
EXTRAVERSION = -rc6
|
||||
NAME = Hurr durr I'ma sheep
|
||||
|
||||
# *DOCUMENTATION*
|
||||
@@ -597,6 +597,11 @@ endif # $(dot-config)
|
||||
# Defaults to vmlinux, but the arch makefile usually adds further targets
|
||||
all: vmlinux
|
||||
|
||||
# The arch Makefile can set ARCH_{CPP,A,C}FLAGS to override the default
|
||||
# values of the respective KBUILD_* variables
|
||||
ARCH_CPPFLAGS :=
|
||||
ARCH_AFLAGS :=
|
||||
ARCH_CFLAGS :=
|
||||
include arch/$(SRCARCH)/Makefile
|
||||
|
||||
KBUILD_CFLAGS += $(call cc-option,-fno-delete-null-pointer-checks,)
|
||||
@@ -848,10 +853,10 @@ export mod_strip_cmd
|
||||
mod_compress_cmd = true
|
||||
ifdef CONFIG_MODULE_COMPRESS
|
||||
ifdef CONFIG_MODULE_COMPRESS_GZIP
|
||||
mod_compress_cmd = gzip -n
|
||||
mod_compress_cmd = gzip -n -f
|
||||
endif # CONFIG_MODULE_COMPRESS_GZIP
|
||||
ifdef CONFIG_MODULE_COMPRESS_XZ
|
||||
mod_compress_cmd = xz
|
||||
mod_compress_cmd = xz -f
|
||||
endif # CONFIG_MODULE_COMPRESS_XZ
|
||||
endif # CONFIG_MODULE_COMPRESS
|
||||
export mod_compress_cmd
|
||||
|
||||
+11
-2
@@ -313,11 +313,11 @@ config ARC_PAGE_SIZE_8K
|
||||
|
||||
config ARC_PAGE_SIZE_16K
|
||||
bool "16KB"
|
||||
depends on ARC_MMU_V3
|
||||
depends on ARC_MMU_V3 || ARC_MMU_V4
|
||||
|
||||
config ARC_PAGE_SIZE_4K
|
||||
bool "4KB"
|
||||
depends on ARC_MMU_V3
|
||||
depends on ARC_MMU_V3 || ARC_MMU_V4
|
||||
|
||||
endchoice
|
||||
|
||||
@@ -365,6 +365,11 @@ config ARC_HAS_LLSC
|
||||
default y
|
||||
depends on !ARC_CANT_LLSC
|
||||
|
||||
config ARC_STAR_9000923308
|
||||
bool "Workaround for llock/scond livelock"
|
||||
default y
|
||||
depends on ISA_ARCV2 && SMP && ARC_HAS_LLSC
|
||||
|
||||
config ARC_HAS_SWAPE
|
||||
bool "Insn: SWAPE (endian-swap)"
|
||||
default y
|
||||
@@ -379,6 +384,10 @@ config ARC_HAS_LL64
|
||||
dest operands with 2 possible source operands.
|
||||
default y
|
||||
|
||||
config ARC_HAS_DIV_REM
|
||||
bool "Insn: div, divu, rem, remu"
|
||||
default y
|
||||
|
||||
config ARC_HAS_RTC
|
||||
bool "Local 64-bit r/o cycle counter"
|
||||
default n
|
||||
|
||||
+9
-1
@@ -36,8 +36,16 @@ cflags-$(atleast_gcc44) += -fsection-anchors
|
||||
cflags-$(CONFIG_ARC_HAS_LLSC) += -mlock
|
||||
cflags-$(CONFIG_ARC_HAS_SWAPE) += -mswape
|
||||
|
||||
ifdef CONFIG_ISA_ARCV2
|
||||
|
||||
ifndef CONFIG_ARC_HAS_LL64
|
||||
cflags-$(CONFIG_ISA_ARCV2) += -mno-ll64
|
||||
cflags-y += -mno-ll64
|
||||
endif
|
||||
|
||||
ifndef CONFIG_ARC_HAS_DIV_REM
|
||||
cflags-y += -mno-div-rem
|
||||
endif
|
||||
|
||||
endif
|
||||
|
||||
cflags-$(CONFIG_ARC_DW2_UNWIND) += -fasynchronous-unwind-tables
|
||||
|
||||
@@ -89,11 +89,10 @@
|
||||
#define ECR_C_BIT_DTLB_LD_MISS 8
|
||||
#define ECR_C_BIT_DTLB_ST_MISS 9
|
||||
|
||||
|
||||
/* Auxiliary registers */
|
||||
#define AUX_IDENTITY 4
|
||||
#define AUX_INTR_VEC_BASE 0x25
|
||||
|
||||
#define AUX_NON_VOL 0x5e
|
||||
|
||||
/*
|
||||
* Floating Pt Registers
|
||||
@@ -240,9 +239,9 @@ struct bcr_extn_xymem {
|
||||
|
||||
struct bcr_perip {
|
||||
#ifdef CONFIG_CPU_BIG_ENDIAN
|
||||
unsigned int start:8, pad2:8, sz:8, pad:8;
|
||||
unsigned int start:8, pad2:8, sz:8, ver:8;
|
||||
#else
|
||||
unsigned int pad:8, sz:8, pad2:8, start:8;
|
||||
unsigned int ver:8, sz:8, pad2:8, start:8;
|
||||
#endif
|
||||
};
|
||||
|
||||
|
||||
@@ -23,33 +23,60 @@
|
||||
|
||||
#define atomic_set(v, i) (((v)->counter) = (i))
|
||||
|
||||
#ifdef CONFIG_ISA_ARCV2
|
||||
#define PREFETCHW " prefetchw [%1] \n"
|
||||
#else
|
||||
#define PREFETCHW
|
||||
#ifdef CONFIG_ARC_STAR_9000923308
|
||||
|
||||
#define SCOND_FAIL_RETRY_VAR_DEF \
|
||||
unsigned int delay = 1, tmp; \
|
||||
|
||||
#define SCOND_FAIL_RETRY_ASM \
|
||||
" bz 4f \n" \
|
||||
" ; --- scond fail delay --- \n" \
|
||||
" mov %[tmp], %[delay] \n" /* tmp = delay */ \
|
||||
"2: brne.d %[tmp], 0, 2b \n" /* while (tmp != 0) */ \
|
||||
" sub %[tmp], %[tmp], 1 \n" /* tmp-- */ \
|
||||
" rol %[delay], %[delay] \n" /* delay *= 2 */ \
|
||||
" b 1b \n" /* start over */ \
|
||||
"4: ; --- success --- \n" \
|
||||
|
||||
#define SCOND_FAIL_RETRY_VARS \
|
||||
,[delay] "+&r" (delay),[tmp] "=&r" (tmp) \
|
||||
|
||||
#else /* !CONFIG_ARC_STAR_9000923308 */
|
||||
|
||||
#define SCOND_FAIL_RETRY_VAR_DEF
|
||||
|
||||
#define SCOND_FAIL_RETRY_ASM \
|
||||
" bnz 1b \n" \
|
||||
|
||||
#define SCOND_FAIL_RETRY_VARS
|
||||
|
||||
#endif
|
||||
|
||||
#define ATOMIC_OP(op, c_op, asm_op) \
|
||||
static inline void atomic_##op(int i, atomic_t *v) \
|
||||
{ \
|
||||
unsigned int temp; \
|
||||
unsigned int val; \
|
||||
SCOND_FAIL_RETRY_VAR_DEF \
|
||||
\
|
||||
__asm__ __volatile__( \
|
||||
"1: \n" \
|
||||
PREFETCHW \
|
||||
" llock %0, [%1] \n" \
|
||||
" " #asm_op " %0, %0, %2 \n" \
|
||||
" scond %0, [%1] \n" \
|
||||
" bnz 1b \n" \
|
||||
: "=&r"(temp) /* Early clobber, to prevent reg reuse */ \
|
||||
: "r"(&v->counter), "ir"(i) \
|
||||
"1: llock %[val], [%[ctr]] \n" \
|
||||
" " #asm_op " %[val], %[val], %[i] \n" \
|
||||
" scond %[val], [%[ctr]] \n" \
|
||||
" \n" \
|
||||
SCOND_FAIL_RETRY_ASM \
|
||||
\
|
||||
: [val] "=&r" (val) /* Early clobber to prevent reg reuse */ \
|
||||
SCOND_FAIL_RETRY_VARS \
|
||||
: [ctr] "r" (&v->counter), /* Not "m": llock only supports reg direct addr mode */ \
|
||||
[i] "ir" (i) \
|
||||
: "cc"); \
|
||||
} \
|
||||
|
||||
#define ATOMIC_OP_RETURN(op, c_op, asm_op) \
|
||||
static inline int atomic_##op##_return(int i, atomic_t *v) \
|
||||
{ \
|
||||
unsigned int temp; \
|
||||
unsigned int val; \
|
||||
SCOND_FAIL_RETRY_VAR_DEF \
|
||||
\
|
||||
/* \
|
||||
* Explicit full memory barrier needed before/after as \
|
||||
@@ -58,19 +85,21 @@ static inline int atomic_##op##_return(int i, atomic_t *v) \
|
||||
smp_mb(); \
|
||||
\
|
||||
__asm__ __volatile__( \
|
||||
"1: \n" \
|
||||
PREFETCHW \
|
||||
" llock %0, [%1] \n" \
|
||||
" " #asm_op " %0, %0, %2 \n" \
|
||||
" scond %0, [%1] \n" \
|
||||
" bnz 1b \n" \
|
||||
: "=&r"(temp) \
|
||||
: "r"(&v->counter), "ir"(i) \
|
||||
"1: llock %[val], [%[ctr]] \n" \
|
||||
" " #asm_op " %[val], %[val], %[i] \n" \
|
||||
" scond %[val], [%[ctr]] \n" \
|
||||
" \n" \
|
||||
SCOND_FAIL_RETRY_ASM \
|
||||
\
|
||||
: [val] "=&r" (val) \
|
||||
SCOND_FAIL_RETRY_VARS \
|
||||
: [ctr] "r" (&v->counter), \
|
||||
[i] "ir" (i) \
|
||||
: "cc"); \
|
||||
\
|
||||
smp_mb(); \
|
||||
\
|
||||
return temp; \
|
||||
return val; \
|
||||
}
|
||||
|
||||
#else /* !CONFIG_ARC_HAS_LLSC */
|
||||
@@ -150,6 +179,9 @@ ATOMIC_OP(and, &=, and)
|
||||
#undef ATOMIC_OPS
|
||||
#undef ATOMIC_OP_RETURN
|
||||
#undef ATOMIC_OP
|
||||
#undef SCOND_FAIL_RETRY_VAR_DEF
|
||||
#undef SCOND_FAIL_RETRY_ASM
|
||||
#undef SCOND_FAIL_RETRY_VARS
|
||||
|
||||
/**
|
||||
* __atomic_add_unless - add unless the number is a given value
|
||||
|
||||
@@ -20,20 +20,20 @@
|
||||
struct pt_regs {
|
||||
|
||||
/* Real registers */
|
||||
long bta; /* bta_l1, bta_l2, erbta */
|
||||
unsigned long bta; /* bta_l1, bta_l2, erbta */
|
||||
|
||||
long lp_start, lp_end, lp_count;
|
||||
unsigned long lp_start, lp_end, lp_count;
|
||||
|
||||
long status32; /* status32_l1, status32_l2, erstatus */
|
||||
long ret; /* ilink1, ilink2 or eret */
|
||||
long blink;
|
||||
long fp;
|
||||
long r26; /* gp */
|
||||
unsigned long status32; /* status32_l1, status32_l2, erstatus */
|
||||
unsigned long ret; /* ilink1, ilink2 or eret */
|
||||
unsigned long blink;
|
||||
unsigned long fp;
|
||||
unsigned long r26; /* gp */
|
||||
|
||||
long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0;
|
||||
unsigned long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0;
|
||||
|
||||
long sp; /* user/kernel sp depending on where we came from */
|
||||
long orig_r0;
|
||||
unsigned long sp; /* User/Kernel depending on where we came from */
|
||||
unsigned long orig_r0;
|
||||
|
||||
/*
|
||||
* To distinguish bet excp, syscall, irq
|
||||
@@ -55,13 +55,13 @@ struct pt_regs {
|
||||
unsigned long event;
|
||||
};
|
||||
|
||||
long user_r25;
|
||||
unsigned long user_r25;
|
||||
};
|
||||
#else
|
||||
|
||||
struct pt_regs {
|
||||
|
||||
long orig_r0;
|
||||
unsigned long orig_r0;
|
||||
|
||||
union {
|
||||
struct {
|
||||
@@ -76,26 +76,26 @@ struct pt_regs {
|
||||
unsigned long event;
|
||||
};
|
||||
|
||||
long bta; /* bta_l1, bta_l2, erbta */
|
||||
unsigned long bta; /* bta_l1, bta_l2, erbta */
|
||||
|
||||
long user_r25;
|
||||
unsigned long user_r25;
|
||||
|
||||
long r26; /* gp */
|
||||
long fp;
|
||||
long sp; /* user/kernel sp depending on where we came from */
|
||||
unsigned long r26; /* gp */
|
||||
unsigned long fp;
|
||||
unsigned long sp; /* user/kernel sp depending on where we came from */
|
||||
|
||||
long r12;
|
||||
unsigned long r12;
|
||||
|
||||
/*------- Below list auto saved by h/w -----------*/
|
||||
long r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11;
|
||||
unsigned long r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11;
|
||||
|
||||
long blink;
|
||||
long lp_end, lp_start, lp_count;
|
||||
unsigned long blink;
|
||||
unsigned long lp_end, lp_start, lp_count;
|
||||
|
||||
long ei, ldi, jli;
|
||||
unsigned long ei, ldi, jli;
|
||||
|
||||
long ret;
|
||||
long status32;
|
||||
unsigned long ret;
|
||||
unsigned long status32;
|
||||
};
|
||||
|
||||
#endif
|
||||
@@ -103,10 +103,10 @@ struct pt_regs {
|
||||
/* Callee saved registers - need to be saved only when you are scheduled out */
|
||||
|
||||
struct callee_regs {
|
||||
long r25, r24, r23, r22, r21, r20, r19, r18, r17, r16, r15, r14, r13;
|
||||
unsigned long r25, r24, r23, r22, r21, r20, r19, r18, r17, r16, r15, r14, r13;
|
||||
};
|
||||
|
||||
#define instruction_pointer(regs) (unsigned long)((regs)->ret)
|
||||
#define instruction_pointer(regs) ((regs)->ret)
|
||||
#define profile_pc(regs) instruction_pointer(regs)
|
||||
|
||||
/* return 1 if user mode or 0 if kernel mode */
|
||||
@@ -142,7 +142,7 @@ struct callee_regs {
|
||||
|
||||
static inline long regs_return_value(struct pt_regs *regs)
|
||||
{
|
||||
return regs->r0;
|
||||
return (long)regs->r0;
|
||||
}
|
||||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
+523
-15
File diff suppressed because it is too large
Load Diff
@@ -26,7 +26,9 @@ typedef struct {
|
||||
*/
|
||||
typedef struct {
|
||||
volatile unsigned int counter;
|
||||
#ifndef CONFIG_ARC_HAS_LLSC
|
||||
arch_spinlock_t lock_mutex;
|
||||
#endif
|
||||
} arch_rwlock_t;
|
||||
|
||||
#define __ARCH_RW_LOCK_UNLOCKED__ 0x01000000
|
||||
|
||||
@@ -32,20 +32,20 @@
|
||||
*/
|
||||
struct user_regs_struct {
|
||||
|
||||
long pad;
|
||||
unsigned long pad;
|
||||
struct {
|
||||
long bta, lp_start, lp_end, lp_count;
|
||||
long status32, ret, blink, fp, gp;
|
||||
long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0;
|
||||
long sp;
|
||||
unsigned long bta, lp_start, lp_end, lp_count;
|
||||
unsigned long status32, ret, blink, fp, gp;
|
||||
unsigned long r12, r11, r10, r9, r8, r7, r6, r5, r4, r3, r2, r1, r0;
|
||||
unsigned long sp;
|
||||
} scratch;
|
||||
long pad2;
|
||||
unsigned long pad2;
|
||||
struct {
|
||||
long r25, r24, r23, r22, r21, r20;
|
||||
long r19, r18, r17, r16, r15, r14, r13;
|
||||
unsigned long r25, r24, r23, r22, r21, r20;
|
||||
unsigned long r19, r18, r17, r16, r15, r14, r13;
|
||||
} callee;
|
||||
long efa; /* break pt addr, for break points in delay slots */
|
||||
long stop_pc; /* give dbg stop_pc after ensuring brkpt trap */
|
||||
unsigned long efa; /* break pt addr, for break points in delay slots */
|
||||
unsigned long stop_pc; /* give dbg stop_pc after ensuring brkpt trap */
|
||||
};
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user