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Merge tag 'spi-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"A fairly quiet release for SPI, mainly driver work. A few highlights:
- Supports bits per word compatibility checking in the core.
- Allow use of the IP used in Freescale SPI controllers outside
Freescale SoCs.
- DMA support for the Atmel SPI driver.
- New drivers for the BCM2835 and Tegra114"
* tag 'spi-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (68 commits)
spi-topcliff-pch: fix to use list_for_each_entry_safe() when delete list items
spi-topcliff-pch: missing platform_driver_unregister() on error in pch_spi_init()
ARM: dts: add pinctrl property for spi node for atmel SoC
ARM: dts: add spi nodes for the atmel boards
ARM: dts: add spi nodes for atmel SoC
ARM: at91: add clocks for spi dt entries
spi/spi-atmel: add dmaengine support
spi/spi-atmel: add flag to controller data for lock operations
spi/spi-atmel: add physical base address
spi/sirf: fix MODULE_DEVICE_TABLE
MAINTAINERS: Add git repository and update my address
spi/s3c64xx: Check for errors in dmaengine prepare_transfer()
spi/s3c64xx: Fix non-dmaengine usage
spi: omap2-mcspi: fix error return code in omap2_mcspi_probe()
spi/s3c64xx: let device core setup the default pin configuration
MAINTAINERS: Update Grant's email address and maintainership
spi: omap2-mcspi: Fix transfers if DMADEVICES is not set
spi: s3c64xx: move to generic dmaengine API
spi-gpio: init CS before spi_bitbang_setup()
spi: spi-mpc512x-psc: let transmiter/receiver enabled when in xfer loop
...
This commit is contained in:
Linus Torvalds
@@ -0,0 +1,22 @@
|
||||
Broadcom BCM2835 SPI0 controller
|
||||
|
||||
The BCM2835 contains two forms of SPI master controller, one known simply as
|
||||
SPI0, and the other known as the "Universal SPI Master"; part of the
|
||||
auxilliary block. This binding applies to the SPI0 controller.
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "brcm,bcm2835-spi".
|
||||
- reg: Should contain register location and length.
|
||||
- interrupts: Should contain interrupt.
|
||||
- clocks: The clock feeding the SPI controller.
|
||||
|
||||
Example:
|
||||
|
||||
spi@20204000 {
|
||||
compatible = "brcm,bcm2835-spi";
|
||||
reg = <0x7e204000 0x1000>;
|
||||
interrupts = <2 22>;
|
||||
clocks = <&clk_spi>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
@@ -4,7 +4,7 @@ Required properties:
|
||||
- cell-index : QE SPI subblock index.
|
||||
0: QE subblock SPI1
|
||||
1: QE subblock SPI2
|
||||
- compatible : should be "fsl,spi".
|
||||
- compatible : should be "fsl,spi" or "aeroflexgaisler,spictrl".
|
||||
- mode : the SPI operation mode, it can be "cpu" or "cpu-qe".
|
||||
- reg : Offset and length of the register set for the device
|
||||
- interrupts : <a b> where a is the interrupt number and b is a
|
||||
@@ -14,6 +14,7 @@ Required properties:
|
||||
controller you have.
|
||||
- interrupt-parent : the phandle for the interrupt controller that
|
||||
services interrupts for this device.
|
||||
- clock-frequency : input clock frequency to non FSL_SOC cores
|
||||
|
||||
Optional properties:
|
||||
- gpios : specifies the gpio pins to be used for chipselects.
|
||||
|
||||
@@ -0,0 +1,26 @@
|
||||
NVIDIA Tegra114 SPI controller.
|
||||
|
||||
Required properties:
|
||||
- compatible : should be "nvidia,tegra114-spi".
|
||||
- reg: Should contain SPI registers location and length.
|
||||
- interrupts: Should contain SPI interrupts.
|
||||
- nvidia,dma-request-selector : The Tegra DMA controller's phandle and
|
||||
request selector for this SPI controller.
|
||||
- This is also require clock named "spi" as per binding document
|
||||
Documentation/devicetree/bindings/clock/clock-bindings.txt
|
||||
|
||||
Recommended properties:
|
||||
- spi-max-frequency: Definition as per
|
||||
Documentation/devicetree/bindings/spi/spi-bus.txt
|
||||
Example:
|
||||
|
||||
spi@7000d600 {
|
||||
compatible = "nvidia,tegra114-spi";
|
||||
reg = <0x7000d600 0x200>;
|
||||
interrupts = <0 82 0x04>;
|
||||
nvidia,dma-request-selector = <&apbdma 16>;
|
||||
spi-max-frequency = <25000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -31,9 +31,6 @@ Required Board Specific Properties:
|
||||
|
||||
- #address-cells: should be 1.
|
||||
- #size-cells: should be 0.
|
||||
- gpios: The gpio specifier for clock, mosi and miso interface lines (in the
|
||||
order specified). The format of the gpio specifier depends on the gpio
|
||||
controller.
|
||||
|
||||
Optional Board Specific Properties:
|
||||
|
||||
@@ -86,9 +83,8 @@ Example:
|
||||
spi_0: spi@12d20000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
gpios = <&gpa2 4 2 3 0>,
|
||||
<&gpa2 6 2 3 0>,
|
||||
<&gpa2 7 2 3 0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spi0_bus>;
|
||||
|
||||
w25q80bw@0 {
|
||||
#address-cells = <1>;
|
||||
|
||||
@@ -5,6 +5,7 @@ using them to avoid name-space collisions.
|
||||
|
||||
ad Avionic Design GmbH
|
||||
adi Analog Devices, Inc.
|
||||
aeroflexgaisler Aeroflex Gaisler AB
|
||||
ak Asahi Kasei Corp.
|
||||
amcc Applied Micro Circuits Corporation (APM, formally AMCC)
|
||||
apm Applied Micro Circuits Corporation (APM)
|
||||
|
||||
+7
-12
@@ -3515,7 +3515,7 @@ F: drivers/isdn/gigaset/
|
||||
F: include/uapi/linux/gigaset_dev.h
|
||||
|
||||
GPIO SUBSYSTEM
|
||||
M: Grant Likely <grant.likely@secretlab.ca>
|
||||
M: Grant Likely <grant.likely@linaro.org>
|
||||
M: Linus Walleij <linus.walleij@linaro.org>
|
||||
S: Maintained
|
||||
T: git git://git.secretlab.ca/git/linux-2.6.git
|
||||
@@ -4348,7 +4348,7 @@ F: drivers/irqchip/
|
||||
|
||||
IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY)
|
||||
M: Benjamin Herrenschmidt <benh@kernel.crashing.org>
|
||||
M: Grant Likely <grant.likely@secretlab.ca>
|
||||
M: Grant Likely <grant.likely@linaro.org>
|
||||
T: git git://git.secretlab.ca/git/linux-2.6.git irqdomain/next
|
||||
S: Maintained
|
||||
F: Documentation/IRQ-domain.txt
|
||||
@@ -4835,11 +4835,8 @@ F: arch/powerpc/platforms/40x/
|
||||
F: arch/powerpc/platforms/44x/
|
||||
|
||||
LINUX FOR POWERPC EMBEDDED XILINX VIRTEX
|
||||
M: Grant Likely <grant.likely@secretlab.ca>
|
||||
W: http://wiki.secretlab.ca/index.php/Linux_on_Xilinx_Virtex
|
||||
L: linuxppc-dev@lists.ozlabs.org
|
||||
T: git git://git.secretlab.ca/git/linux-2.6.git
|
||||
S: Maintained
|
||||
S: Unmaintained
|
||||
F: arch/powerpc/*/*virtex*
|
||||
F: arch/powerpc/*/*/*virtex*
|
||||
|
||||
@@ -5857,7 +5854,7 @@ F: Documentation/i2c/busses/i2c-ocores
|
||||
F: drivers/i2c/busses/i2c-ocores.c
|
||||
|
||||
OPEN FIRMWARE AND FLATTENED DEVICE TREE
|
||||
M: Grant Likely <grant.likely@secretlab.ca>
|
||||
M: Grant Likely <grant.likely@linaro.org>
|
||||
M: Rob Herring <rob.herring@calxeda.com>
|
||||
L: devicetree-discuss@lists.ozlabs.org (moderated for non-subscribers)
|
||||
W: http://fdt.secretlab.ca
|
||||
@@ -7481,11 +7478,11 @@ S: Maintained
|
||||
F: drivers/clk/spear/
|
||||
|
||||
SPI SUBSYSTEM
|
||||
M: Grant Likely <grant.likely@secretlab.ca>
|
||||
M: Mark Brown <broonie@kernel.org>
|
||||
M: Grant Likely <grant.likely@linaro.org>
|
||||
L: spi-devel-general@lists.sourceforge.net
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
|
||||
Q: http://patchwork.kernel.org/project/spi-devel-general/list/
|
||||
T: git git://git.secretlab.ca/git/linux-2.6.git
|
||||
S: Maintained
|
||||
F: Documentation/spi/
|
||||
F: drivers/spi/
|
||||
@@ -8996,9 +8993,7 @@ S: Maintained
|
||||
F: drivers/net/ethernet/xilinx/xilinx_axienet*
|
||||
|
||||
XILINX SYSTEMACE DRIVER
|
||||
M: Grant Likely <grant.likely@secretlab.ca>
|
||||
W: http://www.secretlab.ca/
|
||||
S: Maintained
|
||||
S: Unmaintained
|
||||
F: drivers/block/xsysace.c
|
||||
|
||||
XILINX UARTLITE SERIAL DRIVER
|
||||
|
||||
@@ -322,6 +322,24 @@
|
||||
};
|
||||
};
|
||||
|
||||
spi0 {
|
||||
pinctrl_spi0: spi0-0 {
|
||||
atmel,pins =
|
||||
<0 0 0x1 0x0 /* PA0 periph A SPI0_MISO pin */
|
||||
0 1 0x1 0x0 /* PA1 periph A SPI0_MOSI pin */
|
||||
0 2 0x1 0x0>; /* PA2 periph A SPI0_SPCK pin */
|
||||
};
|
||||
};
|
||||
|
||||
spi1 {
|
||||
pinctrl_spi1: spi1-0 {
|
||||
atmel,pins =
|
||||
<1 0 0x1 0x0 /* PB0 periph A SPI1_MISO pin */
|
||||
1 1 0x1 0x0 /* PB1 periph A SPI1_MOSI pin */
|
||||
1 2 0x1 0x0>; /* PB2 periph A SPI1_SPCK pin */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
@@ -471,6 +489,28 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi0: spi@fffc8000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91rm9200-spi";
|
||||
reg = <0xfffc8000 0x200>;
|
||||
interrupts = <12 4 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@fffcc000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91rm9200-spi";
|
||||
reg = <0xfffcc000 0x200>;
|
||||
interrupts = <13 4 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
adc0: adc@fffe0000 {
|
||||
compatible = "atmel,at91sam9260-adc";
|
||||
reg = <0xfffe0000 0x100>;
|
||||
|
||||
@@ -303,6 +303,24 @@
|
||||
};
|
||||
};
|
||||
|
||||
spi0 {
|
||||
pinctrl_spi0: spi0-0 {
|
||||
atmel,pins =
|
||||
<0 0 0x2 0x0 /* PA0 periph B SPI0_MISO pin */
|
||||
0 1 0x2 0x0 /* PA1 periph B SPI0_MOSI pin */
|
||||
0 2 0x2 0x0>; /* PA2 periph B SPI0_SPCK pin */
|
||||
};
|
||||
};
|
||||
|
||||
spi1 {
|
||||
pinctrl_spi1: spi1-0 {
|
||||
atmel,pins =
|
||||
<1 12 0x1 0x0 /* PB12 periph A SPI1_MISO pin */
|
||||
1 13 0x1 0x0 /* PB13 periph A SPI1_MOSI pin */
|
||||
1 14 0x1 0x0>; /* PB14 periph A SPI1_SPCK pin */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff200 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff200 0x200>;
|
||||
@@ -462,6 +480,28 @@
|
||||
reg = <0xfffffd40 0x10>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi0: spi@fffa4000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91rm9200-spi";
|
||||
reg = <0xfffa4000 0x200>;
|
||||
interrupts = <14 4 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@fffa8000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91rm9200-spi";
|
||||
reg = <0xfffa8000 0x200>;
|
||||
interrupts = <15 4 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
|
||||
@@ -79,6 +79,16 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
spi0: spi@fffa4000 {
|
||||
status = "okay";
|
||||
cs-gpios = <&pioA 5 0>, <0>, <0>, <0>;
|
||||
mtd_dataflash@0 {
|
||||
compatible = "atmel,at45", "atmel,dataflash";
|
||||
spi-max-frequency = <50000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
|
||||
@@ -96,6 +96,16 @@
|
||||
status = "okay";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx>;
|
||||
};
|
||||
|
||||
spi0: spi@fffc8000 {
|
||||
status = "okay";
|
||||
cs-gpios = <0>, <&pioC 11 0>, <0>, <0>;
|
||||
mtd_dataflash@0 {
|
||||
compatible = "atmel,at45", "atmel,dataflash";
|
||||
spi-max-frequency = <50000000>;
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
|
||||
@@ -322,6 +322,24 @@
|
||||
};
|
||||
};
|
||||
|
||||
spi0 {
|
||||
pinctrl_spi0: spi0-0 {
|
||||
atmel,pins =
|
||||
<1 0 0x1 0x0 /* PB0 periph A SPI0_MISO pin */
|
||||
1 1 0x1 0x0 /* PB1 periph A SPI0_MOSI pin */
|
||||
1 2 0x1 0x0>; /* PB2 periph A SPI0_SPCK pin */
|
||||
};
|
||||
};
|
||||
|
||||
spi1 {
|
||||
pinctrl_spi1: spi1-0 {
|
||||
atmel,pins =
|
||||
<1 14 0x1 0x0 /* PB14 periph A SPI1_MISO pin */
|
||||
1 15 0x1 0x0 /* PB15 periph A SPI1_MOSI pin */
|
||||
1 16 0x1 0x0>; /* PB16 periph A SPI1_SPCK pin */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff200 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff200 0x200>;
|
||||
@@ -531,6 +549,28 @@
|
||||
reg = <0xfffffd40 0x10>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi0: spi@fffa4000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91rm9200-spi";
|
||||
reg = <0xfffa4000 0x200>;
|
||||
interrupts = <14 4 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@fffa8000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91rm9200-spi";
|
||||
reg = <0xfffa8000 0x200>;
|
||||
interrupts = <15 4 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
|
||||
@@ -102,6 +102,16 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
spi0: spi@fffa4000{
|
||||
status = "okay";
|
||||
cs-gpios = <&pioB 3 0>, <0>, <0>, <0>;
|
||||
mtd_dataflash@0 {
|
||||
compatible = "atmel,at45", "atmel,dataflash";
|
||||
spi-max-frequency = <13000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
|
||||
@@ -261,6 +261,24 @@
|
||||
};
|
||||
};
|
||||
|
||||
spi0 {
|
||||
pinctrl_spi0: spi0-0 {
|
||||
atmel,pins =
|
||||
<0 11 0x1 0x0 /* PA11 periph A SPI0_MISO pin */
|
||||
0 12 0x1 0x0 /* PA12 periph A SPI0_MOSI pin */
|
||||
0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */
|
||||
};
|
||||
};
|
||||
|
||||
spi1 {
|
||||
pinctrl_spi1: spi1-0 {
|
||||
atmel,pins =
|
||||
<0 21 0x2 0x0 /* PA21 periph B SPI1_MISO pin */
|
||||
0 22 0x2 0x0 /* PA22 periph B SPI1_MOSI pin */
|
||||
0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
@@ -373,6 +391,28 @@
|
||||
#size-cells = <0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi0: spi@f0000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91rm9200-spi";
|
||||
reg = <0xf0000000 0x100>;
|
||||
interrupts = <13 4 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@f0004000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91rm9200-spi";
|
||||
reg = <0xf0004000 0x100>;
|
||||
interrupts = <14 4 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
|
||||
@@ -67,6 +67,16 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
spi0: spi@f0000000 {
|
||||
status = "okay";
|
||||
cs-gpios = <&pioA 14 0>, <0>, <0>, <0>;
|
||||
m25p80@0 {
|
||||
compatible = "atmel,at25df321a";
|
||||
spi-max-frequency = <50000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
|
||||
@@ -343,6 +343,24 @@
|
||||
};
|
||||
};
|
||||
|
||||
spi0 {
|
||||
pinctrl_spi0: spi0-0 {
|
||||
atmel,pins =
|
||||
<0 11 0x1 0x0 /* PA11 periph A SPI0_MISO pin */
|
||||
0 12 0x1 0x0 /* PA12 periph A SPI0_MOSI pin */
|
||||
0 13 0x1 0x0>; /* PA13 periph A SPI0_SPCK pin */
|
||||
};
|
||||
};
|
||||
|
||||
spi1 {
|
||||
pinctrl_spi1: spi1-0 {
|
||||
atmel,pins =
|
||||
<0 21 0x2 0x0 /* PA21 periph B SPI1_MISO pin */
|
||||
0 22 0x2 0x0 /* PA22 periph B SPI1_MOSI pin */
|
||||
0 23 0x2 0x0>; /* PA23 periph B SPI1_SPCK pin */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
@@ -529,6 +547,28 @@
|
||||
trigger-value = <0x6>;
|
||||
};
|
||||
};
|
||||
|
||||
spi0: spi@f0000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91rm9200-spi";
|
||||
reg = <0xf0000000 0x100>;
|
||||
interrupts = <13 4 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@f0004000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "atmel,at91rm9200-spi";
|
||||
reg = <0xf0004000 0x100>;
|
||||
interrupts = <14 4 3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
nand0: nand@40000000 {
|
||||
|
||||
@@ -84,6 +84,16 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
spi0: spi@f0000000 {
|
||||
status = "okay";
|
||||
cs-gpios = <&pioA 14 0>, <0>, <0>, <0>;
|
||||
m25p80@0 {
|
||||
compatible = "atmel,at25df321a";
|
||||
spi-max-frequency = <50000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
usb0: ohci@00600000 {
|
||||
|
||||
@@ -232,6 +232,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
|
||||
CLKDEV_CON_DEV_ID("t2_clk", "fffdc000.timer", &tc5_clk),
|
||||
CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &ohci_clk),
|
||||
CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk),
|
||||
/* fake hclk clock */
|
||||
CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
|
||||
CLKDEV_CON_ID("pioA", &pioA_clk),
|
||||
|
||||
@@ -262,6 +262,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
|
||||
CLKDEV_CON_DEV_ID("mci_clk", "fffd0000.mmc", &mmc1_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fff84000.i2c", &twi0_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fff88000.i2c", &twi1_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "fffa4000.spi", &spi0_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "fffa8000.spi", &spi1_clk),
|
||||
/* fake hclk clock */
|
||||
CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk),
|
||||
|
||||
@@ -172,6 +172,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
|
||||
CLKDEV_CON_DEV_ID("dma_clk", "ffffec00.dma-controller", &dma_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "f0000000.spi", &spi0_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "f0004000.spi", &spi1_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk),
|
||||
|
||||
@@ -237,6 +237,8 @@ static struct clk_lookup periph_clocks_lookups[] = {
|
||||
CLKDEV_CON_DEV_ID(NULL, "f8010000.i2c", &twi0_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "f8014000.i2c", &twi1_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "f8018000.i2c", &twi2_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "f0000000.spi", &spi0_clk),
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "f0004000.spi", &spi1_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioAB_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioAB_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCD_clk),
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user