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Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
Pull powerpc update from Benjamin Herrenschmidt:
"The main highlights this time around are:
- A pile of addition POWER8 bits and nits, such as updated
performance counter support (Michael Ellerman), new branch history
buffer support (Anshuman Khandual), base support for the new PCI
host bridge when not using the hypervisor (Gavin Shan) and other
random related bits and fixes from various contributors.
- Some rework of our page table format by Aneesh Kumar which fixes a
thing or two and paves the way for THP support. THP itself will
not make it this time around however.
- More Freescale updates, including Altivec support on the new e6500
cores, new PCI controller support, and a pile of new boards support
and updates.
- The usual batch of trivial cleanups & fixes"
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (156 commits)
powerpc: Fix build error for book3e
powerpc: Context switch the new EBB SPRs
powerpc: Turn on the EBB H/FSCR bits
powerpc: Replace CPU_FTR_BCTAR with CPU_FTR_ARCH_207S
powerpc: Setup BHRB instructions facility in HFSCR for POWER8
powerpc: Fix interrupt range check on debug exception
powerpc: Update tlbie/tlbiel as per ISA doc
powerpc: Print page size info during boot
powerpc: print both base and actual page size on hash failure
powerpc: Fix hpte_decode to use the correct decoding for page sizes
powerpc: Decode the pte-lp-encoding bits correctly.
powerpc: Use encode avpn where we need only avpn values
powerpc: Reduce PTE table memory wastage
powerpc: Move the pte free routines from common header
powerpc: Reduce the PTE_INDEX_SIZE
powerpc: Switch 16GB and 16MB explicit hugepages to a different page table format
powerpc: New hugepage directory format
powerpc: Don't truncate pgd_index wrongly
powerpc: Don't hard code the size of pte page
powerpc: Save DAR and DSISR in pt_regs on MCE
...
This commit is contained in:
Linus Torvalds
@@ -0,0 +1,22 @@
|
||||
===================================================================
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Power Architecture CPU Binding
|
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Copyright 2013 Freescale Semiconductor Inc.
|
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|
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Power Architecture CPUs in Freescale SOCs are represented in device trees as
|
||||
per the definition in ePAPR.
|
||||
|
||||
In addition to the ePAPR definitions, the properties defined below may be
|
||||
present on CPU nodes.
|
||||
|
||||
PROPERTIES
|
||||
|
||||
- fsl,eref-*
|
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Usage: optional
|
||||
Value type: <empty>
|
||||
Definition: The EREF (EREF: A Programmer.s Reference Manual for
|
||||
Freescale Power Architecture) defines the architecture for Freescale
|
||||
Power CPUs. The EREF defines some architecture categories not defined
|
||||
by the Power ISA. For these EREF-specific categories, the existence of
|
||||
a property named fsl,eref-[CAT], where [CAT] is the abbreviated category
|
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name with all uppercase letters converted to lowercase, indicates that
|
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the category is supported by the implementation.
|
||||
@@ -14,10 +14,6 @@ hvcs.txt
|
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- IBM "Hypervisor Virtual Console Server" Installation Guide
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mpc52xx.txt
|
||||
- Linux 2.6.x on MPC52xx family
|
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sound.txt
|
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- info on sound support under Linux/PPC
|
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zImage_layout.txt
|
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- info on the kernel images for Linux/PPC
|
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qe_firmware.txt
|
||||
- describes the layout of firmware binaries for the Freescale QUICC
|
||||
Engine and the code that parses and uploads the microcode therein.
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|
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@@ -40,6 +40,7 @@ features will have bits indicating whether there is support for:
|
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#define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x2
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#define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x4
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#define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x8
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#define PPC_DEBUG_FEATURE_DATA_BP_DAWR 0x10
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|
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2. PTRACE_SETHWDEBUG
|
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|
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|
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@@ -1,81 +0,0 @@
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Information about PowerPC Sound support
|
||||
=====================================================================
|
||||
|
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Please mail me (Cort Dougan, cort@fsmlabs.com) if you have questions,
|
||||
comments or corrections.
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|
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Last Change: 6.16.99
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|
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This just covers sound on the PReP and CHRP systems for now and later
|
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will contain information on the PowerMac's.
|
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|
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Sound on PReP has been tested and is working with the PowerStack and IBM
|
||||
Power Series onboard sound systems which are based on the cs4231(2) chip.
|
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The sound options when doing the make config are a bit different from
|
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the default, though.
|
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|
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The I/O base, irq and dma lines that you enter during the make config
|
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are ignored and are set when booting according to the machine type.
|
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This is so that one binary can be used for Motorola and IBM machines
|
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which use different values and isn't allowed by the driver, so things
|
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are hacked together in such a way as to allow this information to be
|
||||
set automatically on boot.
|
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|
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1. Motorola PowerStack PReP machines
|
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|
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Enable support for "Crystal CS4232 based (PnP) cards" and for the
|
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Microsoft Sound System. The MSS isn't used, but some of the routines
|
||||
that the CS4232 driver uses are in it.
|
||||
|
||||
Although the options you set are ignored and determined automatically
|
||||
on boot these are included for information only:
|
||||
|
||||
(830) CS4232 audio I/O base 530, 604, E80 or F40
|
||||
(10) CS4232 audio IRQ 5, 7, 9, 11, 12 or 15
|
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(6) CS4232 audio DMA 0, 1 or 3
|
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(7) CS4232 second (duplex) DMA 0, 1 or 3
|
||||
|
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This will allow simultaneous record and playback, as 2 different dma
|
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channels are used.
|
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|
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The sound will be all left channel and very low volume since the
|
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auxiliary input isn't muted by default. I had the changes necessary
|
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for this in the kernel but the sound driver maintainer didn't want
|
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to include them since it wasn't common in other machines. To fix this
|
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you need to mute it using a mixer utility of some sort (if you find one
|
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please let me know) or by patching the driver yourself and recompiling.
|
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|
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There is a problem on the PowerStack 2's (PowerStack Pro's) using a
|
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different irq/drq than the kernel expects. Unfortunately, I don't know
|
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which irq/drq it is so if anyone knows please email me.
|
||||
|
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Midi is not supported since the cs4232 driver doesn't support midi yet.
|
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|
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2. IBM PowerPersonal PReP machines
|
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|
||||
I've only tested sound on the Power Personal Series of IBM workstations
|
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so if you try it on others please let me know the result. I'm especially
|
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interested in the 43p's sound system, which I know nothing about.
|
||||
|
||||
Enable support for "Crystal CS4232 based (PnP) cards" and for the
|
||||
Microsoft Sound System. The MSS isn't used, but some of the routines
|
||||
that the CS4232 driver uses are in it.
|
||||
|
||||
Although the options you set are ignored and determined automatically
|
||||
on boot these are included for information only:
|
||||
|
||||
(530) CS4232 audio I/O base 530, 604, E80 or F40
|
||||
(5) CS4232 audio IRQ 5, 7, 9, 11, 12 or 15
|
||||
(1) CS4232 audio DMA 0, 1 or 3
|
||||
(7) CS4232 second (duplex) DMA 0, 1 or 3
|
||||
(330) CS4232 MIDI I/O base 330, 370, 3B0 or 3F0
|
||||
(9) CS4232 MIDI IRQ 5, 7, 9, 11, 12 or 15
|
||||
|
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This setup does _NOT_ allow for recording yet.
|
||||
|
||||
Midi is not supported since the cs4232 driver doesn't support midi yet.
|
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|
||||
2. IBM CHRP
|
||||
|
||||
I have only tested this on the 43P-150. Build the kernel with the cs4232
|
||||
set as a module and load the module with irq=9 dma=1 dma2=2 io=0x550
|
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@@ -1,47 +0,0 @@
|
||||
Information about the Linux/PPC kernel images
|
||||
=====================================================================
|
||||
|
||||
Please mail me (Cort Dougan, cort@fsmlabs.com) if you have questions,
|
||||
comments or corrections.
|
||||
|
||||
This document is meant to answer several questions I've had about how
|
||||
the PReP system boots and how Linux/PPC interacts with that mechanism.
|
||||
It would be nice if we could have information on how other architectures
|
||||
boot here as well. If you have anything to contribute, please
|
||||
let me know.
|
||||
|
||||
|
||||
1. PReP boot file
|
||||
|
||||
This is the file necessary to boot PReP systems from floppy or
|
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hard drive. The firmware reads the PReP partition table entry
|
||||
and will load the image accordingly.
|
||||
|
||||
To boot the zImage, copy it onto a floppy with dd if=zImage of=/dev/fd0h1440
|
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or onto a PReP hard drive partition with dd if=zImage of=/dev/sda4
|
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assuming you've created a PReP partition (type 0x41) with fdisk on
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/dev/sda4.
|
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|
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The layout of the image format is:
|
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|
||||
0x0 +------------+
|
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| | PReP partition table entry
|
||||
| |
|
||||
0x400 +------------+
|
||||
| | Bootstrap program code + data
|
||||
| |
|
||||
| |
|
||||
+------------+
|
||||
| | compressed kernel, elf header removed
|
||||
+------------+
|
||||
| | initrd (if loaded)
|
||||
+------------+
|
||||
| | Elf section table for bootstrap program
|
||||
+------------+
|
||||
|
||||
|
||||
2. MBX boot file
|
||||
|
||||
The MBX boards can load an elf image, and relocate it to the
|
||||
proper location in memory - it copies the image to the location it was
|
||||
linked at.
|
||||
@@ -93,11 +93,6 @@ config ARCH_SPARSEMEM_ENABLE
|
||||
config ARCH_SPARSEMEM_DEFAULT
|
||||
def_bool y
|
||||
|
||||
config MAX_ACTIVE_REGIONS
|
||||
int
|
||||
default "2" if SPARSEMEM
|
||||
default "1"
|
||||
|
||||
config ARCH_SELECT_MEMORY_MODEL
|
||||
def_bool y
|
||||
|
||||
|
||||
+4
-16
@@ -427,11 +427,6 @@ config NODES_SHIFT
|
||||
default "4"
|
||||
depends on NEED_MULTIPLE_NODES
|
||||
|
||||
config MAX_ACTIVE_REGIONS
|
||||
int
|
||||
default "256" if PPC64
|
||||
default "32"
|
||||
|
||||
config ARCH_SELECT_MEMORY_MODEL
|
||||
def_bool y
|
||||
depends on PPC64
|
||||
@@ -646,14 +641,14 @@ menu "Bus options"
|
||||
|
||||
config ISA
|
||||
bool "Support for ISA-bus hardware"
|
||||
depends on PPC_PREP || PPC_CHRP
|
||||
depends on PPC_CHRP
|
||||
select PPC_I8259
|
||||
help
|
||||
Find out whether you have ISA slots on your motherboard. ISA is the
|
||||
name of a bus system, i.e. the way the CPU talks to the other stuff
|
||||
inside your box. If you have an Apple machine, say N here; if you
|
||||
have an IBM RS/6000 or pSeries machine or a PReP machine, say Y. If
|
||||
you have an embedded board, consult your board documentation.
|
||||
have an IBM RS/6000 or pSeries machine, say Y. If you have an
|
||||
embedded board, consult your board documentation.
|
||||
|
||||
config ZONE_DMA
|
||||
bool
|
||||
@@ -685,7 +680,6 @@ config SBUS
|
||||
config FSL_SOC
|
||||
bool
|
||||
select HAVE_CAN_FLEXCAN if NET && CAN
|
||||
select PPC_CLOCK
|
||||
|
||||
config FSL_PCI
|
||||
bool
|
||||
@@ -744,7 +738,6 @@ config PCI
|
||||
bool "PCI support" if PPC_PCI_CHOICE
|
||||
default y if !40x && !CPM2 && !8xx && !PPC_83xx \
|
||||
&& !PPC_85xx && !PPC_86xx && !GAMECUBE_COMMON
|
||||
default PCI_PERMEDIA if !4xx && !CPM2 && !8xx
|
||||
default PCI_QSPAN if !4xx && !CPM2 && 8xx
|
||||
select ARCH_SUPPORTS_MSI
|
||||
select GENERIC_PCI_IOMAP
|
||||
@@ -774,11 +767,6 @@ config PCI_8260
|
||||
select PPC_INDIRECT_PCI
|
||||
default y
|
||||
|
||||
config 8260_PCI9
|
||||
bool "Enable workaround for MPC826x erratum PCI 9"
|
||||
depends on PCI_8260 && !8272
|
||||
default y
|
||||
|
||||
source "drivers/pci/pcie/Kconfig"
|
||||
|
||||
source "drivers/pci/Kconfig"
|
||||
@@ -968,7 +956,7 @@ config TASK_SIZE_BOOL
|
||||
|
||||
config TASK_SIZE
|
||||
hex "Size of user task space" if TASK_SIZE_BOOL
|
||||
default "0x80000000" if PPC_PREP || PPC_8xx
|
||||
default "0x80000000" if PPC_8xx
|
||||
default "0xc0000000"
|
||||
|
||||
config CONSISTENT_SIZE_BOOL
|
||||
|
||||
@@ -0,0 +1,392 @@
|
||||
/*
|
||||
* Device Tree Source for the MPC5121e based ac14xx board
|
||||
*
|
||||
* Copyright 2012 Anatolij Gustschin <agust@denx.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
|
||||
/include/ "mpc5121.dtsi"
|
||||
|
||||
/ {
|
||||
model = "ac14xx";
|
||||
compatible = "ifm,ac14xx", "fsl,mpc5121";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
aliases {
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial7;
|
||||
spi4 = &spi4;
|
||||
spi5 = &spi5;
|
||||
};
|
||||
|
||||
cpus {
|
||||
PowerPC,5121@0 {
|
||||
timebase-frequency = <40000000>; /* 40 MHz (csb/4) */
|
||||
bus-frequency = <160000000>; /* 160 MHz csb bus */
|
||||
clock-frequency = <400000000>; /* 400 MHz ppc core */
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
reg = <0x00000000 0x10000000>; /* 256MB at 0 */
|
||||
};
|
||||
|
||||
nfc@40000000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
localbus@80000020 {
|
||||
ranges = <0x0 0x0 0xfc000000 0x04000000 /* CS0: NOR flash */
|
||||
0x1 0x0 0xe0000000 0x00010000 /* CS1: FRAM */
|
||||
0x2 0x0 0xe0100000 0x00080000 /* CS2: asi1 */
|
||||
0x3 0x0 0xe0300000 0x00020000 /* CS3: comm */
|
||||
0x5 0x0 0xe0400000 0x00010000 /* CS5: safety */
|
||||
0x6 0x0 0xe0200000 0x00080000>; /* CS6: asi2 */
|
||||
|
||||
flash@0,0 {
|
||||
compatible = "cfi-flash";
|
||||
reg = <0 0x00000000 0x04000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
bank-width = <2>;
|
||||
device-width = <2>;
|
||||
|
||||
partition@0 {
|
||||
label = "dtb-kernel-production";
|
||||
reg = <0x00000000 0x00400000>;
|
||||
};
|
||||
partition@1 {
|
||||
label = "filesystem-production";
|
||||
reg = <0x00400000 0x03400000>;
|
||||
};
|
||||
|
||||
partition@2 {
|
||||
label = "recovery";
|
||||
reg = <0x03800000 0x00700000>;
|
||||
};
|
||||
|
||||
partition@3 {
|
||||
label = "uboot-code";
|
||||
reg = <0x03f00000 0x00040000>;
|
||||
};
|
||||
partition@4 {
|
||||
label = "uboot-env1";
|
||||
reg = <0x03f40000 0x00020000>;
|
||||
};
|
||||
partition@5 {
|
||||
label = "uboot-env2";
|
||||
reg = <0x03f60000 0x00020000>;
|
||||
};
|
||||
};
|
||||
|
||||
fram@1,0 {
|
||||
compatible = "ifm,ac14xx-fram", "linux,uio-pdrv-genirq";
|
||||
reg = <1 0x00000000 0x00010000>;
|
||||
};
|
||||
|
||||
asi@2,0 {
|
||||
/* masters mapping: CS, CS offset, size */
|
||||
reg = <2 0x00000000 0x00080000
|
||||
6 0x00000000 0x00080000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "ifm,ac14xx-asi-fpga";
|
||||
gpios = <
|
||||
&gpio_pic 26 0 /* prog */
|
||||
&gpio_pic 27 0 /* done */
|
||||
&gpio_pic 10 0 /* reset */
|
||||
>;
|
||||
|
||||
master@1 {
|
||||
interrupts = <20 0x2>;
|
||||
interrupt-parent = <&gpio_pic>;
|
||||
chipselect = <2 0x00009000 0x00009100>;
|
||||
label = "AS-i master 1";
|
||||
};
|
||||
|
||||
master@2 {
|
||||
interrupts = <21 0x2>;
|
||||
interrupt-parent = <&gpio_pic>;
|
||||
chipselect = <6 0x00009000 0x00009100>;
|
||||
label = "AS-i master 2";
|
||||
};
|
||||
};
|
||||
|
||||
netx@3,0 {
|
||||
compatible = "ifm,netx";
|
||||
reg = <0x3 0x00000000 0x00020000>;
|
||||
chipselect = <3 0x00101140 0x00203100>;
|
||||
interrupts = <17 0x8>;
|
||||
gpios = <&gpio_pic 15 0>;
|
||||
};
|
||||
|
||||
safety@5,0 {
|
||||
compatible = "ifm,safety";
|
||||
reg = <0x5 0x00000000 0x00010000>;
|
||||
chipselect = <5 0x00009000 0x00009100>;
|
||||
interrupts = <22 0x2>;
|
||||
interrupt-parent = <&gpio_pic>;
|
||||
gpios = <
|
||||
&gpio_pic 12 0 /* prog */
|
||||
&gpio_pic 11 0 /* done */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
soc@80000000 {
|
||||
|
||||
clock@f00 {
|
||||
compatible = "fsl,mpc5121rev2-clock", "fsl,mpc5121-clock";
|
||||
};
|
||||
|
||||
/*
|
||||
* GPIO PIC:
|
||||
* interrupts cell = <pin nr, sense>
|
||||
* sense == 8: Level, low assertion
|
||||
* sense == 2: Edge, high-to-low change
|
||||
*/
|
||||
gpio_pic: gpio@1100 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
sdhc@1500 {
|
||||
cd-gpios = <&gpio_pic 23 0>; /* card detect */
|
||||
wp-gpios = <&gpio_pic 24 0>; /* write protect */
|
||||
wp-inverted; /* WP active high */
|
||||
};
|
||||
|
||||
i2c@1700 {
|
||||
/* use Fast-mode */
|
||||
clock-frequency = <400000>;
|
||||
|
||||
at24@30 {
|
||||
compatible = "at24,24c01";
|
||||
reg = <0x30>;
|
||||
};
|
||||
|
||||
at24@31 {
|
||||
compatible = "at24,24c01";
|
||||
reg = <0x31>;
|
||||
};
|
||||
|
||||
temp@48 {
|
||||
compatible = "ad,ad7414";
|
||||
reg = <0x48>;
|
||||
};
|
||||
|
||||
at24@50 {
|
||||
compatible = "at24,24c01";
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
at24@51 {
|
||||
compatible = "at24,24c01";
|
||||
reg = <0x51>;
|
||||
};
|
||||
|
||||
at24@52 {
|
||||
compatible = "at24,24c01";
|
||||
reg = <0x52>;
|
||||
};
|
||||
|
||||
at24@53 {
|
||||
compatible = "at24,24c01";
|
||||
reg = <0x53>;
|
||||
};
|
||||
|
||||
at24@54 {
|
||||
compatible = "at24,24c01";
|
||||
reg = <0x54>;
|
||||
};
|
||||
|
||||
at24@55 {
|
||||
compatible = "at24,24c01";
|
||||
reg = <0x55>;
|
||||
};
|
||||
|
||||
at24@56 {
|
||||
compatible = "at24,24c01";
|
||||
reg = <0x56>;
|
||||
};
|
||||
|
||||
at24@57 {
|
||||
compatible = "at24,24c01";
|
||||
reg = <0x57>;
|
||||
};
|
||||
|
||||
rtc@68 {
|
||||
compatible = "stm,m41t00";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
axe_pic: axe-base@2000 {
|
||||
compatible = "fsl,mpc5121-axe-base";
|
||||
reg = <0x2000 0x100>;
|
||||
interrupts = <42 0x8>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
axe-app {
|
||||
compatible = "fsl,mpc5121-axe-app";
|
||||
interrupt-parent = <&axe_pic>;
|
||||
interrupts = <
|
||||
/* soft interrupts */
|
||||
0 0x0 1 0x0 2 0x0 3 0x0
|
||||
4 0x0 5 0x0 6 0x0 7 0x0
|
||||
/* fifo interrupts */
|
||||
8 0x0 9 0x0 10 0x0 11 0x0
|
||||
>;
|
||||
};
|
||||
|
||||
display@2100 {
|
||||
edid = [00 FF FF FF FF FF FF 00 14 94 00 00 00 00 00 00
|
||||
0A 12 01 03 80 1C 23 78 CA 88 FF 94 52 54 8E 27
|
||||
1E 4C 50 00 00 00 01 01 01 01 01 01 01 01 01 01
|
||||
01 01 01 01 01 01 FB 00 B0 14 00 DC 05 00 08 04
|
||||
21 00 1C 23 00 00 00 18 00 00 00 FD 00 38 3C 1F
|
||||
3C 01 0A 20 20 20 20 20 20 20 00 00 00 FC 00 45
|
||||
54 30 31 38 30 30 33 44 4D 55 0A 0A 00 00 00 10
|
||||
00 41 30 30 30 30 30 30 30 30 30 30 30 31 00 D5];
|
||||
};
|
||||
|
||||
can@2300 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
can@2380 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
viu@2400 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mdio@2800 {
|
||||
phy0: ethernet-phy@1f {
|
||||
compatible = "smsc,lan8700";
|
||||
reg = <0x1f>;
|
||||
};
|
||||
};
|
||||
|
||||
enet: ethernet@2800 {
|
||||
phy-handle = <&phy0>;
|
||||
};
|
||||
|
||||
usb@3000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb@4000 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* PSC3 serial port A, aka ttyPSC0 */
|
||||
serial0: psc@11300 {
|
||||
compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
|
||||
fsl,rx-fifo-size = <512>;
|
||||
fsl,tx-fifo-size = <512>;
|
||||
};
|
||||
|
||||
/* PSC4 in SPI mode */
|
||||
spi4: psc@11400 {
|
||||
compatible = "fsl,mpc5121-psc-spi", "fsl,mpc5121-psc";
|
||||
fsl,rx-fifo-size = <768>;
|
||||
fsl,tx-fifo-size = <768>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
num-cs = <1>;
|
||||
cs-gpios = <&gpio_pic 25 0>;
|
||||
|
||||
flash: m25p128@0 {
|
||||
compatible = "st,m25p128";
|
||||
spi-max-frequency = <20000000>;
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "spi-flash0";
|
||||
reg = <0x00000000 0x01000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* PSC5 in SPI mode */
|
||||
spi5: psc@11500 {
|
||||
compatible = "fsl,mpc5121-psc-spi", "fsl,mpc5121-psc";
|
||||
fsl,mode = "spi-master";
|
||||
fsl,rx-fifo-size = <128>;
|
||||
fsl,tx-fifo-size = <128>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
lcd@0 {
|
||||
compatible = "ilitek,ili922x";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <100000>;
|
||||
spi-cpol;
|
||||
spi-cpha;
|
||||
};
|
||||
};
|
||||
|
||||
/* PSC7 serial port C, aka ttyPSC2 */
|
||||
serial7: psc@11700 {
|
||||
compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
|
||||
fsl,rx-fifo-size = <512>;
|
||||
fsl,tx-fifo-size = <512>;
|
||||
};
|
||||
|
||||
matrix_keypad@0 {
|
||||
compatible = "gpio-matrix-keypad";
|
||||
debounce-delay-ms = <5>;
|
||||
col-scan-delay-us = <1>;
|
||||
gpio-activelow;
|
||||
col-gpios-binary;
|
||||
col-switch-delay-ms = <200>;
|
||||
|
||||
col-gpios = <&gpio_pic 1 0>; /* pin1 */
|
||||
|
||||
row-gpios = <&gpio_pic 2 0 /* pin2 */
|
||||
&gpio_pic 3 0 /* pin3 */
|
||||
&gpio_pic 4 0>; /* pin4 */
|
||||
|
||||
linux,keymap = <0x0000006e /* FN LEFT */
|
||||
0x01000067 /* UP */
|
||||
0x02000066 /* FN RIGHT */
|
||||
0x00010069 /* LEFT */
|
||||
0x0101006a /* DOWN */
|
||||
0x0201006c>; /* RIGHT */
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
backlight {
|
||||
label = "backlight";
|
||||
gpios = <&gpio_pic 0 0>;
|
||||
default-state = "keep";
|
||||
};
|
||||
green {
|
||||
label = "green";
|
||||
gpios = <&gpio_pic 18 0>;
|
||||
default-state = "keep";
|
||||
};
|
||||
red {
|
||||
label = "red";
|
||||
gpios = <&gpio_pic 19 0>;
|
||||
default-state = "keep";
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,50 @@
|
||||
/*
|
||||
* B4420DS Device Tree Source
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* This software is provided by Freescale Semiconductor "as is" and any
|
||||
* express or implied warranties, including, but not limited to, the implied
|
||||
* warranties of merchantability and fitness for a particular purpose are
|
||||
* disclaimed. In no event shall Freescale Semiconductor be liable for any
|
||||
* direct, indirect, incidental, special, exemplary, or consequential damages
|
||||
* (including, but not limited to, procurement of substitute goods or services;
|
||||
* loss of use, data, or profits; or business interruption) however caused and
|
||||
* on any theory of liability, whether in contract, strict liability, or tort
|
||||
* (including negligence or otherwise) arising in any way out of the use of
|
||||
* this software, even if advised of the possibility of such damage.
|
||||
*/
|
||||
|
||||
/include/ "fsl/b4420si-pre.dtsi"
|
||||
/include/ "b4qds.dts"
|
||||
|
||||
/ {
|
||||
model = "fsl,B4420QDS";
|
||||
compatible = "fsl,B4420QDS";
|
||||
|
||||
ifc: localbus@ffe124000 {
|
||||
board-control@3,0 {
|
||||
compatible = "fsl,b4420qds-fpga", "fsl,fpga-qixis";
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
/include/ "fsl/b4420si-post.dtsi"
|
||||
@@ -0,0 +1,61 @@
|
||||
/*
|
||||
* B4860DS Device Tree Source
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/include/ "fsl/b4860si-pre.dtsi"
|
||||
/include/ "b4qds.dts"
|
||||
|
||||
/ {
|
||||
model = "fsl,B4860QDS";
|
||||
compatible = "fsl,B4860QDS";
|
||||
|
||||
ifc: localbus@ffe124000 {
|
||||
board-control@3,0 {
|
||||
compatible = "fsl,b4860qds-fpga", "fsl,fpga-qixis";
|
||||
};
|
||||
};
|
||||
|
||||
rio: rapidio@ffe0c0000 {
|
||||
reg = <0xf 0xfe0c0000 0 0x11000>;
|
||||
|
||||
port1 {
|
||||
ranges = <0 0 0xc 0x20000000 0 0x10000000>;
|
||||
};
|
||||
port2 {
|
||||
ranges = <0 0 0xc 0x30000000 0 0x10000000>;
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
/include/ "fsl/b4860si-post.dtsi"
|
||||
@@ -0,0 +1,169 @@
|
||||
/*
|
||||
* B4420DS Device Tree Source
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* This software is provided by Freescale Semiconductor "as is" and any
|
||||
* express or implied warranties, including, but not limited to, the implied
|
||||
* warranties of merchantability and fitness for a particular purpose are
|
||||
* disclaimed. In no event shall Freescale Semiconductor be liable for any
|
||||
* direct, indirect, incidental, special, exemplary, or consequential damages
|
||||
* (including, but not limited to, procurement of substitute goods or services;
|
||||
* loss of use, data, or profits; or business interruption) however caused and
|
||||
* on any theory of liability, whether in contract, strict liability, or tort
|
||||
* (including negligence or otherwise) arising in any way out of the use of
|
||||
* this software, even if advised of the possibility of such damage.
|
||||
*/
|
||||
|
||||
/ {
|
||||
model = "fsl,B4QDS";
|
||||
compatible = "fsl,B4QDS";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
ifc: localbus@ffe124000 {
|
||||
reg = <0xf 0xfe124000 0 0x2000>;
|
||||
ranges = <0 0 0xf 0xe8000000 0x08000000
|
||||
2 0 0xf 0xff800000 0x00010000
|
||||
3 0 0xf 0xffdf0000 0x00008000>;
|
||||
|
||||
nor@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "cfi-flash";
|
||||
reg = <0x0 0x0 0x8000000>;
|
||||
bank-width = <2>;
|
||||
device-width = <1>;
|
||||
};
|
||||
|
||||
nand@2,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,ifc-nand";
|
||||
reg = <0x2 0x0 0x10000>;
|
||||
|
||||
partition@0 {
|
||||
/* This location must not be altered */
|
||||
/* 1MB for u-boot Bootloader Image */
|
||||
reg = <0x0 0x00100000>;
|
||||
label = "NAND U-Boot Image";
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
/* 1MB for DTB Image */
|
||||
reg = <0x00100000 0x00100000>;
|
||||
label = "NAND DTB Image";
|
||||
};
|
||||
|
||||
partition@200000 {
|
||||
/* 10MB for Linux Kernel Image */
|
||||
reg = <0x00200000 0x00A00000>;
|
||||
label = "NAND Linux Kernel Image";
|
||||
};
|
||||
|
||||
partition@c00000 {
|
||||
/* 500MB for Root file System Image */
|
||||
reg = <0x00c00000 0x1F400000>;
|
||||
label = "NAND RFS Image";
|
||||
};
|
||||
};
|
||||
|
||||
board-control@3,0 {
|
||||
compatible = "fsl,b4qds-fpga", "fsl,fpga-qixis";
|
||||
reg = <3 0 0x300>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
};
|
||||
|
||||
dcsr: dcsr@f00000000 {
|
||||
ranges = <0x00000000 0xf 0x00000000 0x01052000>;
|
||||
};
|
||||
|
||||
soc: soc@ffe000000 {
|
||||
ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
|
||||
reg = <0xf 0xfe000000 0 0x00001000>;
|
||||
spi@110000 {
|
||||
flash@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "sst,sst25wf040";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <40000000>; /* input clock */
|
||||
};
|
||||
};
|
||||
|
||||
sdhc@114000 {
|
||||
/*Disabled as there is no sdhc connector on B4420QDS board*/
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c@118000 {
|
||||
eeprom@50 {
|
||||
compatible = "at24,24c64";
|
||||
reg = <0x50>;
|
||||
};
|
||||
eeprom@51 {
|
||||
compatible = "at24,24c256";
|
||||
reg = <0x51>;
|
||||
};
|
||||
eeprom@53 {
|
||||
compatible = "at24,24c256";
|
||||
reg = <0x53>;
|
||||
};
|
||||
eeprom@57 {
|
||||
compatible = "at24,24c256";
|
||||
reg = <0x57>;
|
||||
};
|
||||
rtc@68 {
|
||||
compatible = "dallas,ds3232";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
usb@210000 {
|
||||
dr_mode = "host";
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
pci0: pcie@ffe200000 {
|
||||
reg = <0xf 0xfe200000 0 0x10000>;
|
||||
ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
|
||||
0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
|
||||
pcie@0 {
|
||||
ranges = <0x02000000 0 0xe0000000
|
||||
0x02000000 0 0xe0000000
|
||||
0 0x20000000
|
||||
|
||||
0x01000000 0 0x00000000
|
||||
0x01000000 0 0x00000000
|
||||
0 0x00010000>;
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
/include/ "fsl/b4si-post.dtsi"
|
||||
@@ -0,0 +1,98 @@
|
||||
/*
|
||||
* B4420 Silicon/SoC Device Tree Source (post include)
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* This software is provided by Freescale Semiconductor "as is" and any
|
||||
* express or implied warranties, including, but not limited to, the implied
|
||||
* warranties of merchantability and fitness for a particular purpose are
|
||||
* disclaimed. In no event shall Freescale Semiconductor be liable for any
|
||||
* direct, indirect, incidental, special, exemplary, or consequential damages
|
||||
* (including, but not limited to, procurement of substitute goods or services;
|
||||
* loss of use, data, or profits; or business interruption) however caused and
|
||||
* on any theory of liability, whether in contract, strict liability, or tort
|
||||
* (including negligence or otherwise) arising in any way out of the use of
|
||||
* this software, even if advised of the possibility of such damage.
|
||||
*/
|
||||
|
||||
/include/ "b4si-post.dtsi"
|
||||
|
||||
/* controller at 0x200000 */
|
||||
&pci0 {
|
||||
compatible = "fsl,b4420-pcie", "fsl,qoriq-pcie-v2.4";
|
||||
};
|
||||
|
||||
&dcsr {
|
||||
dcsr-epu@0 {
|
||||
compatible = "fsl,b4420-dcsr-epu", "fsl,dcsr-epu";
|
||||
};
|
||||
dcsr-npc {
|
||||
compatible = "fsl,b4420-dcsr-cnpc", "fsl,dcsr-cnpc";
|
||||
};
|
||||
dcsr-dpaa@9000 {
|
||||
compatible = "fsl,b4420-dcsr-dpaa", "fsl,dcsr-dpaa";
|
||||
};
|
||||
dcsr-ocn@11000 {
|
||||
compatible = "fsl,b4420-dcsr-ocn", "fsl,dcsr-ocn";
|
||||
};
|
||||
dcsr-nal@18000 {
|
||||
compatible = "fsl,b4420-dcsr-nal", "fsl,dcsr-nal";
|
||||
};
|
||||
dcsr-rcpm@22000 {
|
||||
compatible = "fsl,b4420-dcsr-rcpm", "fsl,dcsr-rcpm";
|
||||
};
|
||||
dcsr-snpc@30000 {
|
||||
compatible = "fsl,b4420-dcsr-snpc", "fsl,dcsr-snpc";
|
||||
};
|
||||
dcsr-snpc@31000 {
|
||||
compatible = "fsl,b4420-dcsr-snpc", "fsl,dcsr-snpc";
|
||||
};
|
||||
dcsr-cpu-sb-proxy@108000 {
|
||||
compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu1>;
|
||||
reg = <0x108000 0x1000 0x109000 0x1000>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
cpc: l3-cache-controller@10000 {
|
||||
compatible = "fsl,b4420-l3-cache-controller", "cache";
|
||||
};
|
||||
|
||||
corenet-cf@18000 {
|
||||
compatible = "fsl,b4420-corenet-cf";
|
||||
};
|
||||
|
||||
guts: global-utilities@e0000 {
|
||||
compatible = "fsl,b4420-device-config", "fsl,qoriq-device-config-2.0";
|
||||
};
|
||||
|
||||
clockgen: global-utilities@e1000 {
|
||||
compatible = "fsl,b4420-clockgen", "fsl,qoriq-clockgen-2.0";
|
||||
};
|
||||
|
||||
rcpm: global-utilities@e2000 {
|
||||
compatible = "fsl,b4420-rcpm", "fsl,qoriq-rcpm-2.0";
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@c20000 {
|
||||
compatible = "fsl,b4420-l2-cache-controller";
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,73 @@
|
||||
/*
|
||||
* B4420 Silicon/SoC Device Tree Source (pre include)
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* This software is provided by Freescale Semiconductor "as is" and any
|
||||
* express or implied warranties, including, but not limited to, the implied
|
||||
* warranties of merchantability and fitness for a particular purpose are
|
||||
* disclaimed. In no event shall Freescale Semiconductor be liable for any
|
||||
* direct, indirect, incidental, special, exemplary, or consequential damages
|
||||
* (including, but not limited to, procurement of substitute goods or services;
|
||||
* loss of use, data, or profits; or business interruption) however caused and
|
||||
* on any theory of liability, whether in contract, strict liability, or tort
|
||||
* (including negligence or otherwise) arising in any way out of the use of
|
||||
* this software, even if advised of the possibility of such damage.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
compatible = "fsl,B4420";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
ccsr = &soc;
|
||||
dcsr = &dcsr;
|
||||
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
serial2 = &serial2;
|
||||
serial3 = &serial3;
|
||||
pci0 = &pci0;
|
||||
dma0 = &dma0;
|
||||
dma1 = &dma1;
|
||||
sdhc = &sdhc;
|
||||
};
|
||||
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu0: PowerPC,e6500@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0 1>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
cpu1: PowerPC,e6500@2 {
|
||||
device_type = "cpu";
|
||||
reg = <2 3>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,142 @@
|
||||
/*
|
||||
* B4860 Silicon/SoC Device Tree Source (post include)
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/include/ "b4si-post.dtsi"
|
||||
|
||||
/* controller at 0x200000 */
|
||||
&pci0 {
|
||||
compatible = "fsl,b4860-pcie", "fsl,qoriq-pcie-v2.4";
|
||||
};
|
||||
|
||||
&rio {
|
||||
compatible = "fsl,srio";
|
||||
interrupts = <16 2 1 11>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
fsl,iommu-parent = <&pamu0>;
|
||||
ranges;
|
||||
|
||||
port1 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
cell-index = <1>;
|
||||
fsl,liodn-reg = <&guts 0x510>; /* RIO1LIODNR */
|
||||
};
|
||||
|
||||
port2 {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
cell-index = <2>;
|
||||
fsl,liodn-reg = <&guts 0x514>; /* RIO2LIODNR */
|
||||
};
|
||||
};
|
||||
|
||||
&dcsr {
|
||||
dcsr-epu@0 {
|
||||
compatible = "fsl,b4860-dcsr-epu", "fsl,dcsr-epu";
|
||||
};
|
||||
dcsr-npc {
|
||||
compatible = "fsl,b4860-dcsr-cnpc", "fsl,dcsr-cnpc";
|
||||
};
|
||||
dcsr-dpaa@9000 {
|
||||
compatible = "fsl,b4860-dcsr-dpaa", "fsl,dcsr-dpaa";
|
||||
};
|
||||
dcsr-ocn@11000 {
|
||||
compatible = "fsl,b4860-dcsr-ocn", "fsl,dcsr-ocn";
|
||||
};
|
||||
dcsr-ddr@13000 {
|
||||
compatible = "fsl,dcsr-ddr";
|
||||
dev-handle = <&ddr2>;
|
||||
reg = <0x13000 0x1000>;
|
||||
};
|
||||
dcsr-nal@18000 {
|
||||
compatible = "fsl,b4860-dcsr-nal", "fsl,dcsr-nal";
|
||||
};
|
||||
dcsr-rcpm@22000 {
|
||||
compatible = "fsl,b4860-dcsr-rcpm", "fsl,dcsr-rcpm";
|
||||
};
|
||||
dcsr-snpc@30000 {
|
||||
compatible = "fsl,b4860-dcsr-snpc", "fsl,dcsr-snpc";
|
||||
};
|
||||
dcsr-snpc@31000 {
|
||||
compatible = "fsl,b4860-dcsr-snpc", "fsl,dcsr-snpc";
|
||||
};
|
||||
dcsr-cpu-sb-proxy@108000 {
|
||||
compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu1>;
|
||||
reg = <0x108000 0x1000 0x109000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@110000 {
|
||||
compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu2>;
|
||||
reg = <0x110000 0x1000 0x111000 0x1000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@118000 {
|
||||
compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu3>;
|
||||
reg = <0x118000 0x1000 0x119000 0x1000>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
ddr2: memory-controller@9000 {
|
||||
compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
|
||||
reg = <0x9000 0x1000>;
|
||||
interrupts = <16 2 1 9>;
|
||||
};
|
||||
|
||||
cpc: l3-cache-controller@10000 {
|
||||
compatible = "fsl,b4860-l3-cache-controller", "cache";
|
||||
};
|
||||
|
||||
corenet-cf@18000 {
|
||||
compatible = "fsl,b4860-corenet-cf";
|
||||
};
|
||||
|
||||
guts: global-utilities@e0000 {
|
||||
compatible = "fsl,b4860-device-config", "fsl,qoriq-device-config-2.0";
|
||||
};
|
||||
|
||||
clockgen: global-utilities@e1000 {
|
||||
compatible = "fsl,b4860-clockgen", "fsl,qoriq-clockgen-2.0";
|
||||
};
|
||||
|
||||
rcpm: global-utilities@e2000 {
|
||||
compatible = "fsl,b4860-rcpm", "fsl,qoriq-rcpm-2.0";
|
||||
};
|
||||
|
||||
L2: l2-cache-controller@c20000 {
|
||||
compatible = "fsl,b4860-l2-cache-controller";
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,83 @@
|
||||
/*
|
||||
* B4860 Silicon/SoC Device Tree Source (pre include)
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
compatible = "fsl,B4860";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&mpic>;
|
||||
|
||||
aliases {
|
||||
ccsr = &soc;
|
||||
dcsr = &dcsr;
|
||||
|
||||
serial0 = &serial0;
|
||||
serial1 = &serial1;
|
||||
serial2 = &serial2;
|
||||
serial3 = &serial3;
|
||||
pci0 = &pci0;
|
||||
dma0 = &dma0;
|
||||
dma1 = &dma1;
|
||||
sdhc = &sdhc;
|
||||
};
|
||||
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu0: PowerPC,e6500@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0 1>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
cpu1: PowerPC,e6500@2 {
|
||||
device_type = "cpu";
|
||||
reg = <2 3>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
cpu2: PowerPC,e6500@4 {
|
||||
device_type = "cpu";
|
||||
reg = <4 5>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
cpu3: PowerPC,e6500@6 {
|
||||
device_type = "cpu";
|
||||
reg = <6 7>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,268 @@
|
||||
/*
|
||||
* B4420 Silicon/SoC Device Tree Source (post include)
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* This software is provided by Freescale Semiconductor "as is" and any
|
||||
* express or implied warranties, including, but not limited to, the implied
|
||||
* warranties of merchantability and fitness for a particular purpose are
|
||||
* disclaimed. In no event shall Freescale Semiconductor be liable for any
|
||||
* direct, indirect, incidental, special, exemplary, or consequential damages
|
||||
* (including, but not limited to, procurement of substitute goods or services;
|
||||
* loss of use, data, or profits; or business interruption) however caused and
|
||||
* on any theory of liability, whether in contract, strict liability, or tort
|
||||
* (including negligence or otherwise) arising in any way out of the use of
|
||||
* this software, even if advised of the possibility of such damage.
|
||||
*/
|
||||
|
||||
&ifc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,ifc", "simple-bus";
|
||||
interrupts = <25 2 0 0>;
|
||||
};
|
||||
|
||||
/* controller at 0x200000 */
|
||||
&pci0 {
|
||||
compatible = "fsl,b4-pcie", "fsl,qoriq-pcie-v2.4";
|
||||
device_type = "pci";
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
bus-range = <0x0 0xff>;
|
||||
interrupts = <20 2 0 0>;
|
||||
fsl,iommu-parent = <&pamu0>;
|
||||
pcie@0 {
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
reg = <0 0 0 0 0>;
|
||||
interrupts = <20 2 0 0>;
|
||||
interrupt-map-mask = <0xf800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0 */
|
||||
0000 0 0 1 &mpic 40 1 0 0
|
||||
0000 0 0 2 &mpic 1 1 0 0
|
||||
0000 0 0 3 &mpic 2 1 0 0
|
||||
0000 0 0 4 &mpic 3 1 0 0
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&dcsr {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "fsl,dcsr", "simple-bus";
|
||||
|
||||
dcsr-epu@0 {
|
||||
compatible = "fsl,b4-dcsr-epu", "fsl,dcsr-epu";
|
||||
interrupts = <52 2 0 0
|
||||
84 2 0 0
|
||||
85 2 0 0
|
||||
94 2 0 0
|
||||
95 2 0 0>;
|
||||
reg = <0x0 0x1000>;
|
||||
};
|
||||
dcsr-npc {
|
||||
compatible = "fsl,b4-dcsr-cnpc", "fsl,dcsr-cnpc";
|
||||
reg = <0x1000 0x1000 0x1002000 0x10000>;
|
||||
};
|
||||
dcsr-nxc@2000 {
|
||||
compatible = "fsl,dcsr-nxc";
|
||||
reg = <0x2000 0x1000>;
|
||||
};
|
||||
dcsr-corenet {
|
||||
compatible = "fsl,dcsr-corenet";
|
||||
reg = <0x8000 0x1000 0x1A000 0x1000>;
|
||||
};
|
||||
dcsr-dpaa@9000 {
|
||||
compatible = "fsl,b4-dcsr-dpaa", "fsl,dcsr-dpaa";
|
||||
reg = <0x9000 0x1000>;
|
||||
};
|
||||
dcsr-ocn@11000 {
|
||||
compatible = "fsl,b4-dcsr-ocn", "fsl,dcsr-ocn";
|
||||
reg = <0x11000 0x1000>;
|
||||
};
|
||||
dcsr-ddr@12000 {
|
||||
compatible = "fsl,dcsr-ddr";
|
||||
dev-handle = <&ddr1>;
|
||||
reg = <0x12000 0x1000>;
|
||||
};
|
||||
dcsr-nal@18000 {
|
||||
compatible = "fsl,b4-dcsr-nal", "fsl,dcsr-nal";
|
||||
reg = <0x18000 0x1000>;
|
||||
};
|
||||
dcsr-rcpm@22000 {
|
||||
compatible = "fsl,b4-dcsr-rcpm", "fsl,dcsr-rcpm";
|
||||
reg = <0x22000 0x1000>;
|
||||
};
|
||||
dcsr-snpc@30000 {
|
||||
compatible = "fsl,b4-dcsr-snpc", "fsl,dcsr-snpc";
|
||||
reg = <0x30000 0x1000 0x1022000 0x10000>;
|
||||
};
|
||||
dcsr-snpc@31000 {
|
||||
compatible = "fsl,b4-dcsr-snpc", "fsl,dcsr-snpc";
|
||||
reg = <0x31000 0x1000 0x1042000 0x10000>;
|
||||
};
|
||||
dcsr-cpu-sb-proxy@100000 {
|
||||
compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
|
||||
cpu-handle = <&cpu0>;
|
||||
reg = <0x100000 0x1000 0x101000 0x1000>;
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "soc";
|
||||
compatible = "simple-bus";
|
||||
|
||||
soc-sram-error {
|
||||
compatible = "fsl,soc-sram-error";
|
||||
interrupts = <16 2 1 2>;
|
||||
};
|
||||
|
||||
corenet-law@0 {
|
||||
compatible = "fsl,corenet-law";
|
||||
reg = <0x0 0x1000>;
|
||||
fsl,num-laws = <32>;
|
||||
};
|
||||
|
||||
ddr1: memory-controller@8000 {
|
||||
compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
|
||||
reg = <0x8000 0x1000>;
|
||||
interrupts = <16 2 1 8>;
|
||||
};
|
||||
|
||||
cpc: l3-cache-controller@10000 {
|
||||
compatible = "fsl,b4-l3-cache-controller", "cache";
|
||||
reg = <0x10000 0x1000>;
|
||||
interrupts = <16 2 1 4>;
|
||||
};
|
||||
|
||||
corenet-cf@18000 {
|
||||
compatible = "fsl,b4-corenet-cf";
|
||||
reg = <0x18000 0x1000>;
|
||||
interrupts = <16 2 1 0>;
|
||||
fsl,ccf-num-csdids = <32>;
|
||||
fsl,ccf-num-snoopids = <32>;
|
||||
};
|
||||
|
||||
iommu@20000 {
|
||||
compatible = "fsl,pamu-v1.0", "fsl,pamu";
|
||||
reg = <0x20000 0x4000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
interrupts = <
|
||||
24 2 0 0
|
||||
16 2 1 1>;
|
||||
|
||||
|
||||
/* PCIe, DMA, SRIO */
|
||||
pamu0: pamu@0 {
|
||||
reg = <0 0x1000>;
|
||||
fsl,primary-cache-geometry = <8 1>;
|
||||
fsl,secondary-cache-geometry = <32 2>;
|
||||
};
|
||||
|
||||
/* AXI2, Maple */
|
||||
pamu1: pamu@1000 {
|
||||
reg = <0x1000 0x1000>;
|
||||
fsl,primary-cache-geometry = <32 1>;
|
||||
fsl,secondary-cache-geometry = <32 2>;
|
||||
};
|
||||
|
||||
/* Q/BMan */
|
||||
pamu2: pamu@2000 {
|
||||
reg = <0x2000 0x1000>;
|
||||
fsl,primary-cache-geometry = <32 1>;
|
||||
fsl,secondary-cache-geometry = <32 2>;
|
||||
};
|
||||
|
||||
/* AXI1, FMAN */
|
||||
pamu3: pamu@3000 {
|
||||
reg = <0x3000 0x1000>;
|
||||
fsl,primary-cache-geometry = <32 1>;
|
||||
fsl,secondary-cache-geometry = <32 2>;
|
||||
};
|
||||
};
|
||||
|
||||
/include/ "qoriq-mpic.dtsi"
|
||||
|
||||
guts: global-utilities@e0000 {
|
||||
compatible = "fsl,b4-device-config";
|
||||
reg = <0xe0000 0xe00>;
|
||||
fsl,has-rstcr;
|
||||
fsl,liodn-bits = <12>;
|
||||
};
|
||||
|
||||
clockgen: global-utilities@e1000 {
|
||||
compatible = "fsl,b4-clockgen", "fsl,qoriq-clockgen-2.0";
|
||||
reg = <0xe1000 0x1000>;
|
||||
};
|
||||
|
||||
rcpm: global-utilities@e2000 {
|
||||
compatible = "fsl,b4-rcpm", "fsl,qoriq-rcpm-2.0";
|
||||
reg = <0xe2000 0x1000>;
|
||||
};
|
||||
|
||||
/include/ "qoriq-dma-0.dtsi"
|
||||
dma@100300 {
|
||||
fsl,iommu-parent = <&pamu0>;
|
||||
fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
|
||||
};
|
||||
|
||||
/include/ "qoriq-dma-1.dtsi"
|
||||
dma@101300 {
|
||||
fsl,iommu-parent = <&pamu0>;
|
||||
fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
|
||||
};
|
||||
|
||||
/include/ "qonverge-usb2-dr-0.dtsi"
|
||||
usb0: usb@210000 {
|
||||
compatible = "fsl-usb2-dr-v2.4", "fsl-usb2-dr";
|
||||
fsl,iommu-parent = <&pamu1>;
|
||||
fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
|
||||
};
|
||||
|
||||
/include/ "qoriq-espi-0.dtsi"
|
||||
spi@110000 {
|
||||
fsl,espi-num-chipselects = <4>;
|
||||
};
|
||||
|
||||
/include/ "qoriq-esdhc-0.dtsi"
|
||||
sdhc@114000 {
|
||||
sdhci,auto-cmd12;
|
||||
fsl,iommu-parent = <&pamu1>;
|
||||
fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
|
||||
};
|
||||
|
||||
/include/ "qoriq-i2c-0.dtsi"
|
||||
/include/ "qoriq-i2c-1.dtsi"
|
||||
/include/ "qoriq-duart-0.dtsi"
|
||||
/include/ "qoriq-duart-1.dtsi"
|
||||
/include/ "qoriq-sec5.3-0.dtsi"
|
||||
|
||||
L2: l2-cache-controller@c20000 {
|
||||
compatible = "fsl,b4-l2-cache-controller";
|
||||
reg = <0xc20000 0x1000>;
|
||||
next-level-cache = <&cpc>;
|
||||
};
|
||||
};
|
||||
@@ -53,6 +53,7 @@
|
||||
power-isa-mmc; // Memory Coherence
|
||||
power-isa-scpm; // Store Conditional Page Mobility
|
||||
power-isa-wt; // Wait
|
||||
fsl,eref-deo; // Data Cache Extended Operations
|
||||
mmu-type = "power-embedded";
|
||||
};
|
||||
};
|
||||
|
||||
@@ -54,6 +54,7 @@
|
||||
power-isa-scpm; // Store Conditional Page Mobility
|
||||
power-isa-wt; // Wait
|
||||
power-isa-64; // 64-bit
|
||||
fsl,eref-deo; // Data Cache Extended Operations
|
||||
mmu-type = "power-embedded";
|
||||
};
|
||||
};
|
||||
|
||||
@@ -0,0 +1,65 @@
|
||||
/*
|
||||
* e6500 Power ISA Device Tree Source (include)
|
||||
*
|
||||
* Copyright 2013 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/ {
|
||||
cpus {
|
||||
power-isa-version = "2.06";
|
||||
power-isa-b; // Base
|
||||
power-isa-e; // Embedded
|
||||
power-isa-atb; // Alternate Time Base
|
||||
power-isa-cs; // Cache Specification
|
||||
power-isa-ds; // Decorated Storage
|
||||
power-isa-e.ed; // Embedded.Enhanced Debug
|
||||
power-isa-e.pd; // Embedded.External PID
|
||||
power-isa-e.hv; // Embedded.Hypervisor
|
||||
power-isa-e.le; // Embedded.Little-Endian
|
||||
power-isa-e.pm; // Embedded.Performance Monitor
|
||||
power-isa-e.pc; // Embedded.Processor Control
|
||||
power-isa-ecl; // Embedded Cache Locking
|
||||
power-isa-exp; // External Proxy
|
||||
power-isa-fp; // Floating Point
|
||||
power-isa-fp.r; // Floating Point.Record
|
||||
power-isa-mmc; // Memory Coherence
|
||||
power-isa-scpm; // Store Conditional Page Mobility
|
||||
power-isa-wt; // Wait
|
||||
power-isa-64; // 64-bit
|
||||
power-isa-e.pt; // Embedded.Page Table
|
||||
power-isa-e.hv.lrat; // Embedded.Hypervisor.LRAT
|
||||
power-isa-e.em; // Embedded Multi-Threading
|
||||
power-isa-v; // Vector (AltiVec)
|
||||
fsl,eref-er; // Enhanced Reservations (Load and Reserve and Store Cond.)
|
||||
fsl,eref-deo; // Data Cache Extended Operations
|
||||
mmu-type = "power-embedded";
|
||||
};
|
||||
};
|
||||
@@ -148,6 +148,7 @@
|
||||
|
||||
crypto: crypto@300000 {
|
||||
compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
|
||||
fsl,sec-era = <3>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x30000 0x10000>;
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user