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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (73 commits) netfilter: Remove ADVANCED dependency from NF_CONNTRACK_NETBIOS_NS ipv4: flush route cache after change accept_local sch_red: fix red_change Revert "udp: remove redundant variable" bridge: master device stuck in no-carrier state forever when in user-stp mode ipv4: Perform peer validation on cached route lookup. net/core: fix rollback handler in register_netdevice_notifier sch_red: fix red_calc_qavg_from_idle_time bonding: only use primary address for ARP ipv4: fix lockdep splat in rt_cache_seq_show sch_teql: fix lockdep splat net: fec: Select the FEC driver by default for i.MX SoCs isdn: avoid copying too long drvid isdn: make sure strings are null terminated netlabel: Fix build problems when IPv6 is not enabled sctp: better integer overflow check in sctp_auth_create_key() sctp: integer overflow in sctp_auth_create_key() ipv6: Set mcast_hops to IPV6_DEFAULT_MCASTHOPS when -1 was given. net: Fix corruption in /proc/*/net/dev_mcast mac80211: fix race between the AGG SM and the Tx data path ...
This commit is contained in:
@@ -242,6 +242,12 @@ static int isdn_divert_ioctl_unlocked(struct file *file, uint cmd, ulong arg)
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case IIOCDOCFINT:
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if (!divert_if.drv_to_name(dioctl.cf_ctrl.drvid))
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return (-EINVAL); /* invalid driver */
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if (strnlen(dioctl.cf_ctrl.msn, sizeof(dioctl.cf_ctrl.msn)) ==
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sizeof(dioctl.cf_ctrl.msn))
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return -EINVAL;
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if (strnlen(dioctl.cf_ctrl.fwd_nr, sizeof(dioctl.cf_ctrl.fwd_nr)) ==
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sizeof(dioctl.cf_ctrl.fwd_nr))
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return -EINVAL;
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if ((i = cf_command(dioctl.cf_ctrl.drvid,
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(cmd == IIOCDOCFACT) ? 1 : (cmd == IIOCDOCFDIS) ? 0 : 2,
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dioctl.cf_ctrl.cfproc,
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@@ -2756,6 +2756,9 @@ isdn_net_setcfg(isdn_net_ioctl_cfg * cfg)
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char *c,
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*e;
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if (strnlen(cfg->drvid, sizeof(cfg->drvid)) ==
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sizeof(cfg->drvid))
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return -EINVAL;
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drvidx = -1;
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chidx = -1;
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strcpy(drvid, cfg->drvid);
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@@ -4,7 +4,7 @@
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menuconfig ARCNET
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depends on NETDEVICES && (ISA || PCI || PCMCIA)
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bool "ARCnet support"
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tristate "ARCnet support"
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---help---
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If you have a network card of this type, say Y and check out the
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(arguably) beautiful poetry in
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@@ -2553,30 +2553,6 @@ re_arm:
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}
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}
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static __be32 bond_glean_dev_ip(struct net_device *dev)
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{
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struct in_device *idev;
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struct in_ifaddr *ifa;
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__be32 addr = 0;
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if (!dev)
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return 0;
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rcu_read_lock();
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idev = __in_dev_get_rcu(dev);
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if (!idev)
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goto out;
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ifa = idev->ifa_list;
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if (!ifa)
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goto out;
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addr = ifa->ifa_local;
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out:
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rcu_read_unlock();
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return addr;
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}
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static int bond_has_this_ip(struct bonding *bond, __be32 ip)
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{
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struct vlan_entry *vlan;
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@@ -3322,6 +3298,10 @@ static int bond_inetaddr_event(struct notifier_block *this, unsigned long event,
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struct bonding *bond;
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struct vlan_entry *vlan;
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/* we only care about primary address */
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if(ifa->ifa_flags & IFA_F_SECONDARY)
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return NOTIFY_DONE;
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list_for_each_entry(bond, &bn->dev_list, bond_list) {
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if (bond->dev == event_dev) {
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switch (event) {
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@@ -3329,7 +3309,7 @@ static int bond_inetaddr_event(struct notifier_block *this, unsigned long event,
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bond->master_ip = ifa->ifa_local;
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return NOTIFY_OK;
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case NETDEV_DOWN:
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bond->master_ip = bond_glean_dev_ip(bond->dev);
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bond->master_ip = 0;
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return NOTIFY_OK;
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default:
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return NOTIFY_DONE;
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@@ -3345,8 +3325,7 @@ static int bond_inetaddr_event(struct notifier_block *this, unsigned long event,
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vlan->vlan_ip = ifa->ifa_local;
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return NOTIFY_OK;
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case NETDEV_DOWN:
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vlan->vlan_ip =
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bond_glean_dev_ip(vlan_dev);
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vlan->vlan_ip = 0;
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return NOTIFY_OK;
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default:
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return NOTIFY_DONE;
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@@ -20,7 +20,6 @@
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*/
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#include <linux/kernel.h>
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#include <linux/version.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/netdevice.h>
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@@ -608,7 +608,7 @@ static void b44_tx(struct b44 *bp)
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skb->len,
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DMA_TO_DEVICE);
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rp->skb = NULL;
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dev_kfree_skb(skb);
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dev_kfree_skb_irq(skb);
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}
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bp->tx_cons = cons;
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@@ -10327,6 +10327,43 @@ static int bnx2x_54618se_config_init(struct bnx2x_phy *phy,
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return 0;
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}
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static void bnx2x_5461x_set_link_led(struct bnx2x_phy *phy,
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struct link_params *params, u8 mode)
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{
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struct bnx2x *bp = params->bp;
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u16 temp;
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bnx2x_cl22_write(bp, phy,
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MDIO_REG_GPHY_SHADOW,
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MDIO_REG_GPHY_SHADOW_LED_SEL1);
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bnx2x_cl22_read(bp, phy,
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MDIO_REG_GPHY_SHADOW,
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&temp);
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temp &= 0xff00;
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DP(NETIF_MSG_LINK, "54618x set link led (mode=%x)\n", mode);
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switch (mode) {
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case LED_MODE_FRONT_PANEL_OFF:
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case LED_MODE_OFF:
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temp |= 0x00ee;
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break;
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case LED_MODE_OPER:
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temp |= 0x0001;
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break;
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case LED_MODE_ON:
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temp |= 0x00ff;
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break;
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default:
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break;
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}
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bnx2x_cl22_write(bp, phy,
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MDIO_REG_GPHY_SHADOW,
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MDIO_REG_GPHY_SHADOW_WR_ENA | temp);
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return;
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}
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static void bnx2x_54618se_link_reset(struct bnx2x_phy *phy,
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struct link_params *params)
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{
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@@ -11103,7 +11140,7 @@ static struct bnx2x_phy phy_54618se = {
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.config_loopback = (config_loopback_t)bnx2x_54618se_config_loopback,
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.format_fw_ver = (format_fw_ver_t)NULL,
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.hw_reset = (hw_reset_t)NULL,
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.set_link_led = (set_link_led_t)NULL,
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.set_link_led = (set_link_led_t)bnx2x_5461x_set_link_led,
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.phy_specific_func = (phy_specific_func_t)NULL
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};
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/*****************************************************************/
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@@ -6990,6 +6990,7 @@ Theotherbitsarereservedandshouldbezero*/
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#define MDIO_REG_INTR_MASK 0x1b
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#define MDIO_REG_INTR_MASK_LINK_STATUS (0x1 << 1)
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#define MDIO_REG_GPHY_SHADOW 0x1c
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#define MDIO_REG_GPHY_SHADOW_LED_SEL1 (0x0d << 10)
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#define MDIO_REG_GPHY_SHADOW_LED_SEL2 (0x0e << 10)
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#define MDIO_REG_GPHY_SHADOW_WR_ENA (0x1 << 15)
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#define MDIO_REG_GPHY_SHADOW_AUTO_DET_MED (0x1e << 10)
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@@ -613,7 +613,7 @@ static int dm9000_set_wol(struct net_device *dev, struct ethtool_wolinfo *w)
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if (!dm->wake_state)
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irq_set_irq_wake(dm->irq_wake, 1);
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else if (dm->wake_state & !opts)
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else if (dm->wake_state && !opts)
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irq_set_irq_wake(dm->irq_wake, 0);
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}
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@@ -24,6 +24,7 @@ config FEC
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bool "FEC ethernet controller (of ColdFire and some i.MX CPUs)"
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depends on (M523x || M527x || M5272 || M528x || M520x || M532x || \
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ARCH_MXC || ARCH_MXS)
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default ARCH_MXC || ARCH_MXS if ARM
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select PHYLIB
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---help---
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Say Y here if you want to use the built-in 10/100 Fast ethernet
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@@ -61,9 +61,9 @@
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#ifdef EHEA_SMALL_QUEUES
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#define EHEA_MAX_CQE_COUNT 1023
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#define EHEA_DEF_ENTRIES_SQ 1023
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#define EHEA_DEF_ENTRIES_RQ1 4095
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#define EHEA_DEF_ENTRIES_RQ1 1023
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#define EHEA_DEF_ENTRIES_RQ2 1023
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#define EHEA_DEF_ENTRIES_RQ3 1023
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#define EHEA_DEF_ENTRIES_RQ3 511
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#else
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#define EHEA_MAX_CQE_COUNT 4080
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#define EHEA_DEF_ENTRIES_SQ 4080
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@@ -371,7 +371,8 @@ static void ehea_update_stats(struct work_struct *work)
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out_herr:
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free_page((unsigned long)cb2);
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resched:
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schedule_delayed_work(&port->stats_work, msecs_to_jiffies(1000));
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schedule_delayed_work(&port->stats_work,
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round_jiffies_relative(msecs_to_jiffies(1000)));
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}
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static void ehea_refill_rq1(struct ehea_port_res *pr, int index, int nr_of_wqes)
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@@ -2434,7 +2435,8 @@ static int ehea_open(struct net_device *dev)
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}
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mutex_unlock(&port->port_lock);
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schedule_delayed_work(&port->stats_work, msecs_to_jiffies(1000));
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schedule_delayed_work(&port->stats_work,
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round_jiffies_relative(msecs_to_jiffies(1000)));
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return ret;
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}
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@@ -1421,7 +1421,7 @@ static void veth_receive(struct veth_lpar_connection *cnx,
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/* FIXME: do we need this? */
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memset(local_list, 0, sizeof(local_list));
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memset(remote_list, 0, sizeof(VETH_MAX_FRAMES_PER_MSG));
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memset(remote_list, 0, sizeof(remote_list));
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/* a 0 address marks the end of the valid entries */
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if (senddata->addr[startchunk] == 0)
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+110
-3
@@ -1744,6 +1744,112 @@ jme_phy_off(struct jme_adapter *jme)
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jme_new_phy_off(jme);
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}
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static int
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jme_phy_specreg_read(struct jme_adapter *jme, u32 specreg)
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{
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u32 phy_addr;
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phy_addr = JM_PHY_SPEC_REG_READ | specreg;
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jme_mdio_write(jme->dev, jme->mii_if.phy_id, JM_PHY_SPEC_ADDR_REG,
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phy_addr);
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return jme_mdio_read(jme->dev, jme->mii_if.phy_id,
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JM_PHY_SPEC_DATA_REG);
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}
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static void
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jme_phy_specreg_write(struct jme_adapter *jme, u32 ext_reg, u32 phy_data)
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{
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u32 phy_addr;
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phy_addr = JM_PHY_SPEC_REG_WRITE | ext_reg;
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jme_mdio_write(jme->dev, jme->mii_if.phy_id, JM_PHY_SPEC_DATA_REG,
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phy_data);
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jme_mdio_write(jme->dev, jme->mii_if.phy_id, JM_PHY_SPEC_ADDR_REG,
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phy_addr);
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}
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static int
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jme_phy_calibration(struct jme_adapter *jme)
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{
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u32 ctrl1000, phy_data;
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jme_phy_off(jme);
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jme_phy_on(jme);
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/* Enabel PHY test mode 1 */
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ctrl1000 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_CTRL1000);
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ctrl1000 &= ~PHY_GAD_TEST_MODE_MSK;
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ctrl1000 |= PHY_GAD_TEST_MODE_1;
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jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_CTRL1000, ctrl1000);
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phy_data = jme_phy_specreg_read(jme, JM_PHY_EXT_COMM_2_REG);
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phy_data &= ~JM_PHY_EXT_COMM_2_CALI_MODE_0;
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phy_data |= JM_PHY_EXT_COMM_2_CALI_LATCH |
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JM_PHY_EXT_COMM_2_CALI_ENABLE;
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jme_phy_specreg_write(jme, JM_PHY_EXT_COMM_2_REG, phy_data);
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msleep(20);
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phy_data = jme_phy_specreg_read(jme, JM_PHY_EXT_COMM_2_REG);
|
||||
phy_data &= ~(JM_PHY_EXT_COMM_2_CALI_ENABLE |
|
||||
JM_PHY_EXT_COMM_2_CALI_MODE_0 |
|
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JM_PHY_EXT_COMM_2_CALI_LATCH);
|
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jme_phy_specreg_write(jme, JM_PHY_EXT_COMM_2_REG, phy_data);
|
||||
|
||||
/* Disable PHY test mode */
|
||||
ctrl1000 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_CTRL1000);
|
||||
ctrl1000 &= ~PHY_GAD_TEST_MODE_MSK;
|
||||
jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_CTRL1000, ctrl1000);
|
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return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
jme_phy_setEA(struct jme_adapter *jme)
|
||||
{
|
||||
u32 phy_comm0 = 0, phy_comm1 = 0;
|
||||
u8 nic_ctrl;
|
||||
|
||||
pci_read_config_byte(jme->pdev, PCI_PRIV_SHARE_NICCTRL, &nic_ctrl);
|
||||
if ((nic_ctrl & 0x3) == JME_FLAG_PHYEA_ENABLE)
|
||||
return 0;
|
||||
|
||||
switch (jme->pdev->device) {
|
||||
case PCI_DEVICE_ID_JMICRON_JMC250:
|
||||
if (((jme->chip_main_rev == 5) &&
|
||||
((jme->chip_sub_rev == 0) || (jme->chip_sub_rev == 1) ||
|
||||
(jme->chip_sub_rev == 3))) ||
|
||||
(jme->chip_main_rev >= 6)) {
|
||||
phy_comm0 = 0x008A;
|
||||
phy_comm1 = 0x4109;
|
||||
}
|
||||
if ((jme->chip_main_rev == 3) &&
|
||||
((jme->chip_sub_rev == 1) || (jme->chip_sub_rev == 2)))
|
||||
phy_comm0 = 0xE088;
|
||||
break;
|
||||
case PCI_DEVICE_ID_JMICRON_JMC260:
|
||||
if (((jme->chip_main_rev == 5) &&
|
||||
((jme->chip_sub_rev == 0) || (jme->chip_sub_rev == 1) ||
|
||||
(jme->chip_sub_rev == 3))) ||
|
||||
(jme->chip_main_rev >= 6)) {
|
||||
phy_comm0 = 0x008A;
|
||||
phy_comm1 = 0x4109;
|
||||
}
|
||||
if ((jme->chip_main_rev == 3) &&
|
||||
((jme->chip_sub_rev == 1) || (jme->chip_sub_rev == 2)))
|
||||
phy_comm0 = 0xE088;
|
||||
if ((jme->chip_main_rev == 2) && (jme->chip_sub_rev == 0))
|
||||
phy_comm0 = 0x608A;
|
||||
if ((jme->chip_main_rev == 2) && (jme->chip_sub_rev == 2))
|
||||
phy_comm0 = 0x408A;
|
||||
break;
|
||||
default:
|
||||
return -ENODEV;
|
||||
}
|
||||
if (phy_comm0)
|
||||
jme_phy_specreg_write(jme, JM_PHY_EXT_COMM_0_REG, phy_comm0);
|
||||
if (phy_comm1)
|
||||
jme_phy_specreg_write(jme, JM_PHY_EXT_COMM_1_REG, phy_comm1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
jme_open(struct net_device *netdev)
|
||||
{
|
||||
@@ -1769,7 +1875,8 @@ jme_open(struct net_device *netdev)
|
||||
jme_set_settings(netdev, &jme->old_ecmd);
|
||||
else
|
||||
jme_reset_phy_processor(jme);
|
||||
|
||||
jme_phy_calibration(jme);
|
||||
jme_phy_setEA(jme);
|
||||
jme_reset_link(jme);
|
||||
|
||||
return 0;
|
||||
@@ -3184,7 +3291,8 @@ jme_resume(struct device *dev)
|
||||
jme_set_settings(netdev, &jme->old_ecmd);
|
||||
else
|
||||
jme_reset_phy_processor(jme);
|
||||
|
||||
jme_phy_calibration(jme);
|
||||
jme_phy_setEA(jme);
|
||||
jme_start_irq(jme);
|
||||
netif_device_attach(netdev);
|
||||
|
||||
@@ -3239,4 +3347,3 @@ MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_VERSION(DRV_VERSION);
|
||||
MODULE_DEVICE_TABLE(pci, jme_pci_tbl);
|
||||
|
||||
|
||||
@@ -760,6 +760,25 @@ enum jme_rxmcs_bits {
|
||||
RXMCS_CHECKSUM,
|
||||
};
|
||||
|
||||
/* Extern PHY common register 2 */
|
||||
|
||||
#define PHY_GAD_TEST_MODE_1 0x00002000
|
||||
#define PHY_GAD_TEST_MODE_MSK 0x0000E000
|
||||
#define JM_PHY_SPEC_REG_READ 0x00004000
|
||||
#define JM_PHY_SPEC_REG_WRITE 0x00008000
|
||||
#define PHY_CALIBRATION_DELAY 20
|
||||
#define JM_PHY_SPEC_ADDR_REG 0x1E
|
||||
#define JM_PHY_SPEC_DATA_REG 0x1F
|
||||
|
||||
#define JM_PHY_EXT_COMM_0_REG 0x30
|
||||
#define JM_PHY_EXT_COMM_1_REG 0x31
|
||||
#define JM_PHY_EXT_COMM_2_REG 0x32
|
||||
#define JM_PHY_EXT_COMM_2_CALI_ENABLE 0x01
|
||||
#define JM_PHY_EXT_COMM_2_CALI_MODE_0 0x02
|
||||
#define JM_PHY_EXT_COMM_2_CALI_LATCH 0x10
|
||||
#define PCI_PRIV_SHARE_NICCTRL 0xF5
|
||||
#define JME_FLAG_PHYEA_ENABLE 0x2
|
||||
|
||||
/*
|
||||
* Wakeup Frame setup interface registers
|
||||
*/
|
||||
|
||||
@@ -58,10 +58,8 @@
|
||||
|
||||
|
||||
#define TX_DESC_PER_IOCB 8
|
||||
/* The maximum number of frags we handle is based
|
||||
* on PAGE_SIZE...
|
||||
*/
|
||||
#if (PAGE_SHIFT == 12) || (PAGE_SHIFT == 13) /* 4k & 8k pages */
|
||||
|
||||
#if ((MAX_SKB_FRAGS - TX_DESC_PER_IOCB) + 2) > 0
|
||||
#define TX_DESC_PER_OAL ((MAX_SKB_FRAGS - TX_DESC_PER_IOCB) + 2)
|
||||
#else /* all other page sizes */
|
||||
#define TX_DESC_PER_OAL 0
|
||||
@@ -1353,7 +1351,7 @@ struct tx_ring_desc {
|
||||
struct ob_mac_iocb_req *queue_entry;
|
||||
u32 index;
|
||||
struct oal oal;
|
||||
struct map_list map[MAX_SKB_FRAGS + 1];
|
||||
struct map_list map[MAX_SKB_FRAGS + 2];
|
||||
int map_cnt;
|
||||
struct tx_ring_desc *next;
|
||||
};
|
||||
|
||||
@@ -781,10 +781,15 @@ static void stmmac_mmc_setup(struct stmmac_priv *priv)
|
||||
unsigned int mode = MMC_CNTRL_RESET_ON_READ | MMC_CNTRL_COUNTER_RESET |
|
||||
MMC_CNTRL_PRESET | MMC_CNTRL_FULL_HALF_PRESET;
|
||||
|
||||
/* Do not manage MMC IRQ (FIXME) */
|
||||
/* Mask MMC irq, counters are managed in SW and registers
|
||||
* are cleared on each READ eventually. */
|
||||
dwmac_mmc_intr_all_mask(priv->ioaddr);
|
||||
dwmac_mmc_ctrl(priv->ioaddr, mode);
|
||||
memset(&priv->mmc, 0, sizeof(struct stmmac_counters));
|
||||
|
||||
if (priv->dma_cap.rmon) {
|
||||
dwmac_mmc_ctrl(priv->ioaddr, mode);
|
||||
memset(&priv->mmc, 0, sizeof(struct stmmac_counters));
|
||||
} else
|
||||
pr_info(" No MAC Management Counters available");
|
||||
}
|
||||
|
||||
static u32 stmmac_get_synopsys_id(struct stmmac_priv *priv)
|
||||
@@ -1012,8 +1017,7 @@ static int stmmac_open(struct net_device *dev)
|
||||
memset(&priv->xstats, 0, sizeof(struct stmmac_extra_stats));
|
||||
priv->xstats.threshold = tc;
|
||||
|
||||
if (priv->dma_cap.rmon)
|
||||
stmmac_mmc_setup(priv);
|
||||
stmmac_mmc_setup(priv);
|
||||
|
||||
/* Start the ball rolling... */
|
||||
DBG(probe, DEBUG, "%s: DMA RX/TX processes started...\n", dev->name);
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
#
|
||||
|
||||
menuconfig PHYLIB
|
||||
bool "PHY Device support and infrastructure"
|
||||
tristate "PHY Device support and infrastructure"
|
||||
depends on !S390
|
||||
depends on NETDEVICES
|
||||
help
|
||||
|
||||
@@ -588,8 +588,6 @@ static void p54spi_op_stop(struct ieee80211_hw *dev)
|
||||
|
||||
WARN_ON(priv->fw_state != FW_STATE_READY);
|
||||
|
||||
cancel_work_sync(&priv->work);
|
||||
|
||||
p54spi_power_off(priv);
|
||||
spin_lock_irqsave(&priv->tx_lock, flags);
|
||||
INIT_LIST_HEAD(&priv->tx_pending);
|
||||
@@ -597,6 +595,8 @@ static void p54spi_op_stop(struct ieee80211_hw *dev)
|
||||
|
||||
priv->fw_state = FW_STATE_OFF;
|
||||
mutex_unlock(&priv->mutex);
|
||||
|
||||
cancel_work_sync(&priv->work);
|
||||
}
|
||||
|
||||
static int __devinit p54spi_probe(struct spi_device *spi)
|
||||
@@ -656,6 +656,7 @@ static int __devinit p54spi_probe(struct spi_device *spi)
|
||||
init_completion(&priv->fw_comp);
|
||||
INIT_LIST_HEAD(&priv->tx_pending);
|
||||
mutex_init(&priv->mutex);
|
||||
spin_lock_init(&priv->tx_lock);
|
||||
SET_IEEE80211_DEV(hw, &spi->dev);
|
||||
priv->common.open = p54spi_op_start;
|
||||
priv->common.stop = p54spi_op_stop;
|
||||
|
||||
@@ -778,7 +778,7 @@ prism54_get_essid(struct net_device *ndev, struct iw_request_info *info,
|
||||
dwrq->flags = 0;
|
||||
dwrq->length = 0;
|
||||
}
|
||||
essid->octets[essid->length] = '\0';
|
||||
essid->octets[dwrq->length] = '\0';
|
||||
memcpy(extra, essid->octets, dwrq->length);
|
||||
kfree(essid);
|
||||
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user