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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-next
Jeff Kirsher says: ==================== Intel Wired LAN Driver Updates This series contains updates to ixgbe, ixgbevf, e1000e, igb and i40e. Jacob converts the ixgbe low_water into an array which allows the algorithm to output different values for different TCs and we can distinguish between them. Removes vlan_filter_disable() and vlan_filter_enable() in ixgbe so that we can do the work directly in set_rx_mode(). Changes the setting of multicast filters only when the interface is not in promiscuous mode for multicast packets in ixgbe. Improves MAC filter handling by adding mac_table API based on work done for igb, which includes functions to add/delete MAC filters. Mark changes register reads in ixgbe to an out-of-line function since register reads are slow. Emil provides a ixgbevf patch to update the driver description since it supports more than just 82599 parts now. David provides several cleanup patches for e1000e which resolve some checkpatch issues as well as changing occurrences of returning 0 or 1 in bool functions to returning true false or true. Carolyn provides several cleanup patches for igb which fix checkpatch warnings. Mitch provides a fix for i40evf where the driver would correctly allow the virtual function link state to be controlled by 'ip set link', but would not report it correctly back. This is fixed by filling out the appropriate field in the VF info struct. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
@@ -265,10 +265,10 @@ struct e1000_adapter {
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u32 tx_hwtstamp_timeouts;
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/* Rx */
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bool (*clean_rx) (struct e1000_ring *ring, int *work_done,
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int work_to_do) ____cacheline_aligned_in_smp;
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void (*alloc_rx_buf) (struct e1000_ring *ring, int cleaned_count,
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gfp_t gfp);
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bool (*clean_rx)(struct e1000_ring *ring, int *work_done,
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int work_to_do) ____cacheline_aligned_in_smp;
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void (*alloc_rx_buf)(struct e1000_ring *ring, int cleaned_count,
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gfp_t gfp);
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struct e1000_ring *rx_ring;
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u32 rx_int_delay;
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@@ -169,6 +169,7 @@ static int e1000_get_settings(struct net_device *netdev,
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}
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} else if (!pm_runtime_suspended(netdev->dev.parent)) {
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u32 status = er32(STATUS);
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if (status & E1000_STATUS_LU) {
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if (status & E1000_STATUS_SPEED_1000)
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speed = SPEED_1000;
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@@ -783,25 +784,26 @@ static bool reg_pattern_test(struct e1000_adapter *adapter, u64 *data,
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reg + (offset << 2), val,
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(test[pat] & write & mask));
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*data = reg;
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return 1;
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return true;
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}
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}
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return 0;
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return false;
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}
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static bool reg_set_and_check(struct e1000_adapter *adapter, u64 *data,
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int reg, u32 mask, u32 write)
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{
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u32 val;
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__ew32(&adapter->hw, reg, write & mask);
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val = __er32(&adapter->hw, reg);
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if ((write & mask) != (val & mask)) {
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e_err("set/check test failed (reg 0x%05X): got 0x%08X expected 0x%08X\n",
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reg, (val & mask), (write & mask));
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*data = reg;
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return 1;
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return true;
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}
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return 0;
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return false;
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}
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#define REG_PATTERN_TEST_ARRAY(reg, offset, mask, write) \
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@@ -1717,6 +1719,7 @@ static int e1000_link_test(struct e1000_adapter *adapter, u64 *data)
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*data = 0;
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if (hw->phy.media_type == e1000_media_type_internal_serdes) {
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int i = 0;
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hw->mac.serdes_has_link = false;
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/* On some blade server designs, link establishment
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@@ -1320,6 +1320,7 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
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*/
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if ((hw->mac.type == e1000_pch2lan) && link) {
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u32 reg;
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reg = er32(STATUS);
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if (!(reg & (E1000_STATUS_FD | E1000_STATUS_SPEED_MASK))) {
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reg = er32(TIPG);
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@@ -599,6 +599,7 @@ static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
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if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) {
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u32 rctl = er32(RCTL);
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ew32(RCTL, rctl & ~E1000_RCTL_EN);
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e_err("ME firmware caused invalid RDT - resetting\n");
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schedule_work(&adapter->reset_task);
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@@ -615,6 +616,7 @@ static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
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if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) {
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u32 tctl = er32(TCTL);
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ew32(TCTL, tctl & ~E1000_TCTL_EN);
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e_err("ME firmware caused invalid TDT - resetting\n");
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schedule_work(&adapter->reset_task);
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@@ -1198,6 +1200,7 @@ static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
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while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
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(count < tx_ring->count)) {
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bool cleaned = false;
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rmb(); /* read buffer_info after eop_desc */
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for (; !cleaned; count++) {
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tx_desc = E1000_TX_DESC(*tx_ring, i);
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@@ -1753,6 +1756,7 @@ static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
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adapter->flags & FLAG_RX_NEEDS_RESTART) {
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/* disable receives */
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u32 rctl = er32(RCTL);
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ew32(RCTL, rctl & ~E1000_RCTL_EN);
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adapter->flags |= FLAG_RESTART_NOW;
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}
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@@ -1960,6 +1964,7 @@ static void e1000_configure_msix(struct e1000_adapter *adapter)
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/* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
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if (hw->mac.type == e1000_82574) {
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u32 rfctl = er32(RFCTL);
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rfctl |= E1000_RFCTL_ACK_DIS;
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ew32(RFCTL, rfctl);
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}
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@@ -2204,6 +2209,7 @@ static void e1000_irq_disable(struct e1000_adapter *adapter)
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if (adapter->msix_entries) {
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int i;
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for (i = 0; i < adapter->num_vectors; i++)
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synchronize_irq(adapter->msix_entries[i].vector);
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} else {
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@@ -2921,6 +2927,7 @@ static void e1000_configure_tx(struct e1000_adapter *adapter)
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if (adapter->flags2 & FLAG2_DMA_BURST) {
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u32 txdctl = er32(TXDCTL(0));
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txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
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E1000_TXDCTL_WTHRESH);
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/* set up some performance related parameters to encourage the
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@@ -3239,6 +3246,7 @@ static void e1000_configure_rx(struct e1000_adapter *adapter)
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if (adapter->flags & FLAG_IS_ICH) {
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u32 rxdctl = er32(RXDCTL(0));
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ew32(RXDCTL(0), rxdctl | 0x3);
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}
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@@ -4695,6 +4703,7 @@ static void e1000e_update_stats(struct e1000_adapter *adapter)
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/* Correctable ECC Errors */
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if (hw->mac.type == e1000_pch_lpt) {
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u32 pbeccsts = er32(PBECCSTS);
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adapter->corr_errors +=
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pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
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adapter->uncorr_errors +=
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@@ -4808,6 +4817,7 @@ static void e1000e_enable_receives(struct e1000_adapter *adapter)
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(adapter->flags & FLAG_RESTART_NOW)) {
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struct e1000_hw *hw = &adapter->hw;
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u32 rctl = er32(RCTL);
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ew32(RCTL, rctl | E1000_RCTL_EN);
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adapter->flags &= ~FLAG_RESTART_NOW;
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}
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@@ -4930,6 +4940,7 @@ static void e1000_watchdog_task(struct work_struct *work)
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if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
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!txb2b) {
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u32 tarc0;
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tarc0 = er32(TARC(0));
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tarc0 &= ~SPEED_MODE_BIT;
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ew32(TARC(0), tarc0);
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@@ -5170,7 +5181,7 @@ static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb)
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__be16 protocol;
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if (skb->ip_summed != CHECKSUM_PARTIAL)
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return 0;
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return false;
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if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
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protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
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@@ -5215,7 +5226,7 @@ static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb)
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i = 0;
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tx_ring->next_to_use = i;
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return 1;
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return true;
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}
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static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
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@@ -6209,6 +6220,7 @@ static int __e1000_resume(struct pci_dev *pdev)
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e1e_wphy(&adapter->hw, BM_WUS, ~0);
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} else {
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u32 wus = er32(WUS);
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if (wus) {
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e_info("MAC Wakeup cause - %s\n",
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wus & E1000_WUS_EX ? "Unicast Packet" :
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@@ -7027,7 +7039,7 @@ static const struct pci_error_handlers e1000_err_handler = {
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.resume = e1000_io_resume,
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};
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static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
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static const struct pci_device_id e1000_pci_tbl[] = {
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{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
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{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
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{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
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@@ -7144,6 +7156,7 @@ static struct pci_driver e1000_driver = {
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static int __init e1000_init_module(void)
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{
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int ret;
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pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
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e1000e_driver_version);
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pr_info("Copyright(c) 1999 - 2014 Intel Corporation.\n");
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@@ -398,6 +398,7 @@ s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
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/* Loop to allow for up to whole page write of eeprom */
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while (widx < words) {
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u16 word_out = data[widx];
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word_out = (word_out >> 8) | (word_out << 8);
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e1000_shift_out_eec_bits(hw, word_out, 16);
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widx++;
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@@ -436,6 +436,7 @@ void e1000e_check_options(struct e1000_adapter *adapter)
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if (num_IntMode > bd) {
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unsigned int int_mode = IntMode[bd];
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e1000_validate_option(&int_mode, &opt, adapter);
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adapter->int_mode = int_mode;
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} else {
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@@ -457,6 +458,7 @@ void e1000e_check_options(struct e1000_adapter *adapter)
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if (num_SmartPowerDownEnable > bd) {
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unsigned int spd = SmartPowerDownEnable[bd];
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e1000_validate_option(&spd, &opt, adapter);
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if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) && spd)
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adapter->flags |= FLAG_SMART_POWER_DOWN;
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@@ -473,6 +475,7 @@ void e1000e_check_options(struct e1000_adapter *adapter)
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if (num_CrcStripping > bd) {
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unsigned int crc_stripping = CrcStripping[bd];
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e1000_validate_option(&crc_stripping, &opt, adapter);
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if (crc_stripping == OPTION_ENABLED) {
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adapter->flags2 |= FLAG2_CRC_STRIPPING;
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@@ -495,6 +498,7 @@ void e1000e_check_options(struct e1000_adapter *adapter)
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if (num_KumeranLockLoss > bd) {
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unsigned int kmrn_lock_loss = KumeranLockLoss[bd];
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e1000_validate_option(&kmrn_lock_loss, &opt, adapter);
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enabled = kmrn_lock_loss;
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}
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@@ -2896,6 +2896,7 @@ static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,
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(hw->phy.addr == 2) &&
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!(MAX_PHY_REG_ADDRESS & reg) && (data & (1 << 11))) {
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u16 data2 = 0x7EFF;
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ret_val = e1000_access_phy_debug_regs_hv(hw,
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(1 << 6) | 0x3,
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&data2, false);
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@@ -2291,6 +2291,13 @@ int i40e_ndo_get_vf_config(struct net_device *netdev,
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ivi->vlan = le16_to_cpu(vsi->info.pvid) & I40E_VLAN_MASK;
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ivi->qos = (le16_to_cpu(vsi->info.pvid) & I40E_PRIORITY_MASK) >>
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I40E_VLAN_PRIORITY_SHIFT;
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if (vf->link_forced == false)
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ivi->linkstate = IFLA_VF_LINK_STATE_AUTO;
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else if (vf->link_up == true)
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ivi->linkstate = IFLA_VF_LINK_STATE_ENABLE;
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else
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ivi->linkstate = IFLA_VF_LINK_STATE_DISABLE;
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ret = 0;
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error_param:
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@@ -73,9 +73,8 @@ static s32 igb_validate_nvm_checksum_82580(struct e1000_hw *hw);
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static s32 igb_update_nvm_checksum_82580(struct e1000_hw *hw);
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static s32 igb_validate_nvm_checksum_i350(struct e1000_hw *hw);
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static s32 igb_update_nvm_checksum_i350(struct e1000_hw *hw);
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static const u16 e1000_82580_rxpbs_table[] =
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{ 36, 72, 144, 1, 2, 4, 8, 16,
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35, 70, 140 };
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static const u16 e1000_82580_rxpbs_table[] = {
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36, 72, 144, 1, 2, 4, 8, 16, 35, 70, 140 };
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/**
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* igb_sgmii_uses_mdio_82575 - Determine if I2C pins are for external MDIO
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@@ -1269,7 +1268,7 @@ static s32 igb_check_for_link_82575(struct e1000_hw *hw)
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if (hw->phy.media_type != e1000_media_type_copper) {
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ret_val = igb_get_pcs_speed_and_duplex_82575(hw, &speed,
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&duplex);
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&duplex);
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/* Use this flag to determine if link needs to be checked or
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* not. If we have link clear the flag so that we do not
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* continue to check for link.
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@@ -1436,9 +1435,8 @@ static s32 igb_reset_hw_82575(struct e1000_hw *hw)
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/* set the completion timeout for interface */
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ret_val = igb_set_pcie_completion_timeout(hw);
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if (ret_val) {
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if (ret_val)
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hw_dbg("PCI-E Set completion timeout has failed.\n");
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}
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hw_dbg("Masking off all interrupts\n");
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wr32(E1000_IMC, 0xffffffff);
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@@ -1676,7 +1674,7 @@ static s32 igb_setup_serdes_link_82575(struct e1000_hw *hw)
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hw->mac.type == e1000_82576) {
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ret_val = hw->nvm.ops.read(hw, NVM_COMPAT, 1, &data);
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if (ret_val) {
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printk(KERN_DEBUG "NVM Read Error\n\n");
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hw_dbg(KERN_DEBUG "NVM Read Error\n\n");
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return ret_val;
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}
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@@ -1689,7 +1687,7 @@ static s32 igb_setup_serdes_link_82575(struct e1000_hw *hw)
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* link either autoneg or be forced to 1000/Full
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*/
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ctrl_reg |= E1000_CTRL_SPD_1000 | E1000_CTRL_FRCSPD |
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E1000_CTRL_FD | E1000_CTRL_FRCDPX;
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E1000_CTRL_FD | E1000_CTRL_FRCDPX;
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/* set speed of 1000/Full if speed/duplex is forced */
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reg |= E1000_PCS_LCTL_FSV_1000 | E1000_PCS_LCTL_FDV_FULL;
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@@ -2005,14 +2003,14 @@ static s32 igb_set_pcie_completion_timeout(struct e1000_hw *hw)
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* 16ms to 55ms
|
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*/
|
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ret_val = igb_read_pcie_cap_reg(hw, PCIE_DEVICE_CONTROL2,
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&pcie_devctl2);
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&pcie_devctl2);
|
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if (ret_val)
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goto out;
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|
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pcie_devctl2 |= PCIE_DEVICE_CONTROL2_16ms;
|
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ret_val = igb_write_pcie_cap_reg(hw, PCIE_DEVICE_CONTROL2,
|
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&pcie_devctl2);
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&pcie_devctl2);
|
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out:
|
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/* disable completion timeout resend */
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gcr &= ~E1000_GCR_CMPL_TMOUT_RESEND;
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@@ -2436,8 +2434,7 @@ static s32 igb_update_nvm_checksum_82580(struct e1000_hw *hw)
|
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|
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ret_val = hw->nvm.ops.read(hw, NVM_COMPATIBILITY_REG_3, 1, &nvm_data);
|
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if (ret_val) {
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hw_dbg("NVM Read Error while updating checksum"
|
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" compatibility bit.\n");
|
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hw_dbg("NVM Read Error while updating checksum compatibility bit.\n");
|
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goto out;
|
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}
|
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|
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@@ -2447,8 +2444,7 @@ static s32 igb_update_nvm_checksum_82580(struct e1000_hw *hw)
|
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ret_val = hw->nvm.ops.write(hw, NVM_COMPATIBILITY_REG_3, 1,
|
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&nvm_data);
|
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if (ret_val) {
|
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hw_dbg("NVM Write Error while updating checksum"
|
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" compatibility bit.\n");
|
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hw_dbg("NVM Write Error while updating checksum compatibility bit.\n");
|
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goto out;
|
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}
|
||||
}
|
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|
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@@ -37,9 +37,9 @@ s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset, u8 dev_addr,
|
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u8 data);
|
||||
|
||||
#define ID_LED_DEFAULT_82575_SERDES ((ID_LED_DEF1_DEF2 << 12) | \
|
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(ID_LED_DEF1_DEF2 << 8) | \
|
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(ID_LED_DEF1_DEF2 << 4) | \
|
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(ID_LED_OFF1_ON2))
|
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(ID_LED_DEF1_DEF2 << 8) | \
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(ID_LED_DEF1_DEF2 << 4) | \
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(ID_LED_OFF1_ON2))
|
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|
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#define E1000_RAR_ENTRIES_82575 16
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#define E1000_RAR_ENTRIES_82576 24
|
||||
@@ -67,16 +67,16 @@ s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset, u8 dev_addr,
|
||||
#define E1000_MRQC_RSS_FIELD_IPV6_UDP_EX 0x01000000
|
||||
|
||||
#define E1000_EICR_TX_QUEUE ( \
|
||||
E1000_EICR_TX_QUEUE0 | \
|
||||
E1000_EICR_TX_QUEUE1 | \
|
||||
E1000_EICR_TX_QUEUE2 | \
|
||||
E1000_EICR_TX_QUEUE3)
|
||||
E1000_EICR_TX_QUEUE0 | \
|
||||
E1000_EICR_TX_QUEUE1 | \
|
||||
E1000_EICR_TX_QUEUE2 | \
|
||||
E1000_EICR_TX_QUEUE3)
|
||||
|
||||
#define E1000_EICR_RX_QUEUE ( \
|
||||
E1000_EICR_RX_QUEUE0 | \
|
||||
E1000_EICR_RX_QUEUE1 | \
|
||||
E1000_EICR_RX_QUEUE2 | \
|
||||
E1000_EICR_RX_QUEUE3)
|
||||
E1000_EICR_RX_QUEUE0 | \
|
||||
E1000_EICR_RX_QUEUE1 | \
|
||||
E1000_EICR_RX_QUEUE2 | \
|
||||
E1000_EICR_RX_QUEUE3)
|
||||
|
||||
/* Immediate Interrupt Rx (A.K.A. Low Latency Interrupt) */
|
||||
#define E1000_IMIREXT_SIZE_BP 0x00001000 /* Packet size bypass */
|
||||
|
||||
@@ -101,11 +101,11 @@
|
||||
|
||||
/* Same mask, but for extended and packet split descriptors */
|
||||
#define E1000_RXDEXT_ERR_FRAME_ERR_MASK ( \
|
||||
E1000_RXDEXT_STATERR_CE | \
|
||||
E1000_RXDEXT_STATERR_SE | \
|
||||
E1000_RXDEXT_STATERR_SEQ | \
|
||||
E1000_RXDEXT_STATERR_CXE | \
|
||||
E1000_RXDEXT_STATERR_RXE)
|
||||
E1000_RXDEXT_STATERR_CE | \
|
||||
E1000_RXDEXT_STATERR_SE | \
|
||||
E1000_RXDEXT_STATERR_SEQ | \
|
||||
E1000_RXDEXT_STATERR_CXE | \
|
||||
E1000_RXDEXT_STATERR_RXE)
|
||||
|
||||
#define E1000_MRQC_RSS_FIELD_IPV4_TCP 0x00010000
|
||||
#define E1000_MRQC_RSS_FIELD_IPV4 0x00020000
|
||||
@@ -406,12 +406,12 @@
|
||||
* o LSC = Link Status Change
|
||||
*/
|
||||
#define IMS_ENABLE_MASK ( \
|
||||
E1000_IMS_RXT0 | \
|
||||
E1000_IMS_TXDW | \
|
||||
E1000_IMS_RXDMT0 | \
|
||||
E1000_IMS_RXSEQ | \
|
||||
E1000_IMS_LSC | \
|
||||
E1000_IMS_DOUTSYNC)
|
||||
E1000_IMS_RXT0 | \
|
||||
E1000_IMS_TXDW | \
|
||||
E1000_IMS_RXDMT0 | \
|
||||
E1000_IMS_RXSEQ | \
|
||||
E1000_IMS_LSC | \
|
||||
E1000_IMS_DOUTSYNC)
|
||||
|
||||
/* Interrupt Mask Set */
|
||||
#define E1000_IMS_TXDW E1000_ICR_TXDW /* Transmit desc written back */
|
||||
@@ -1011,8 +1011,7 @@
|
||||
#define E1000_VFTA_ENTRY_BIT_SHIFT_MASK 0x1F
|
||||
|
||||
/* DMA Coalescing register fields */
|
||||
#define E1000_PCIEMISC_LX_DECISION 0x00000080 /* Lx power decision based
|
||||
on DMA coal */
|
||||
#define E1000_PCIEMISC_LX_DECISION 0x00000080 /* Lx power on DMA coal */
|
||||
|
||||
/* Tx Rate-Scheduler Config fields */
|
||||
#define E1000_RTTBCNRC_RS_ENA 0x80000000
|
||||
|
||||
@@ -320,15 +320,15 @@ struct e1000_host_mng_command_info {
|
||||
#include "e1000_mbx.h"
|
||||
|
||||
struct e1000_mac_operations {
|
||||
s32 (*check_for_link)(struct e1000_hw *);
|
||||
s32 (*reset_hw)(struct e1000_hw *);
|
||||
s32 (*init_hw)(struct e1000_hw *);
|
||||
s32 (*check_for_link)(struct e1000_hw *);
|
||||
s32 (*reset_hw)(struct e1000_hw *);
|
||||
s32 (*init_hw)(struct e1000_hw *);
|
||||
bool (*check_mng_mode)(struct e1000_hw *);
|
||||
s32 (*setup_physical_interface)(struct e1000_hw *);
|
||||
s32 (*setup_physical_interface)(struct e1000_hw *);
|
||||
void (*rar_set)(struct e1000_hw *, u8 *, u32);
|
||||
s32 (*read_mac_addr)(struct e1000_hw *);
|
||||
s32 (*get_speed_and_duplex)(struct e1000_hw *, u16 *, u16 *);
|
||||
s32 (*acquire_swfw_sync)(struct e1000_hw *, u16);
|
||||
s32 (*read_mac_addr)(struct e1000_hw *);
|
||||
s32 (*get_speed_and_duplex)(struct e1000_hw *, u16 *, u16 *);
|
||||
s32 (*acquire_swfw_sync)(struct e1000_hw *, u16);
|
||||
void (*release_swfw_sync)(struct e1000_hw *, u16);
|
||||
#ifdef CONFIG_IGB_HWMON
|
||||
s32 (*get_thermal_sensor_data)(struct e1000_hw *);
|
||||
@@ -338,31 +338,31 @@ struct e1000_mac_operations {
|
||||
};
|
||||
|
||||
struct e1000_phy_operations {
|
||||
s32 (*acquire)(struct e1000_hw *);
|
||||
s32 (*check_polarity)(struct e1000_hw *);
|
||||
s32 (*check_reset_block)(struct e1000_hw *);
|
||||
s32 (*force_speed_duplex)(struct e1000_hw *);
|
||||
s32 (*get_cfg_done)(struct e1000_hw *hw);
|
||||
s32 (*get_cable_length)(struct e1000_hw *);
|
||||
s32 (*get_phy_info)(struct e1000_hw *);
|
||||
s32 (*read_reg)(struct e1000_hw *, u32, u16 *);
|
||||
s32 (*acquire)(struct e1000_hw *);
|
||||
s32 (*check_polarity)(struct e1000_hw *);
|
||||
s32 (*check_reset_block)(struct e1000_hw *);
|
||||
s32 (*force_speed_duplex)(struct e1000_hw *);
|
||||
s32 (*get_cfg_done)(struct e1000_hw *hw);
|
||||
s32 (*get_cable_length)(struct e1000_hw *);
|
||||
s32 (*get_phy_info)(struct e1000_hw *);
|
||||
s32 (*read_reg)(struct e1000_hw *, u32, u16 *);
|
||||
void (*release)(struct e1000_hw *);
|
||||
s32 (*reset)(struct e1000_hw *);
|
||||
s32 (*set_d0_lplu_state)(struct e1000_hw *, bool);
|
||||
s32 (*set_d3_lplu_state)(struct e1000_hw *, bool);
|
||||
s32 (*write_reg)(struct e1000_hw *, u32, u16);
|
||||
s32 (*reset)(struct e1000_hw *);
|
||||
s32 (*set_d0_lplu_state)(struct e1000_hw *, bool);
|
||||
s32 (*set_d3_lplu_state)(struct e1000_hw *, bool);
|
||||
s32 (*write_reg)(struct e1000_hw *, u32, u16);
|
||||
s32 (*read_i2c_byte)(struct e1000_hw *, u8, u8, u8 *);
|
||||
s32 (*write_i2c_byte)(struct e1000_hw *, u8, u8, u8);
|
||||
};
|
||||
|
||||
struct e1000_nvm_operations {
|
||||
s32 (*acquire)(struct e1000_hw *);
|
||||
s32 (*read)(struct e1000_hw *, u16, u16, u16 *);
|
||||
s32 (*acquire)(struct e1000_hw *);
|
||||
s32 (*read)(struct e1000_hw *, u16, u16, u16 *);
|
||||
void (*release)(struct e1000_hw *);
|
||||
s32 (*write)(struct e1000_hw *, u16, u16, u16 *);
|
||||
s32 (*update)(struct e1000_hw *);
|
||||
s32 (*validate)(struct e1000_hw *);
|
||||
s32 (*valid_led_default)(struct e1000_hw *, u16 *);
|
||||
s32 (*write)(struct e1000_hw *, u16, u16, u16 *);
|
||||
s32 (*update)(struct e1000_hw *);
|
||||
s32 (*validate)(struct e1000_hw *);
|
||||
s32 (*valid_led_default)(struct e1000_hw *, u16 *);
|
||||
};
|
||||
|
||||
#define E1000_MAX_SENSORS 3
|
||||
|
||||
@@ -442,7 +442,7 @@ static u32 igb_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr)
|
||||
* The caller must have a packed mc_addr_list of multicast addresses.
|
||||
**/
|
||||
void igb_update_mc_addr_list(struct e1000_hw *hw,
|
||||
u8 *mc_addr_list, u32 mc_addr_count)
|
||||
u8 *mc_addr_list, u32 mc_addr_count)
|
||||
{
|
||||
u32 hash_value, hash_bit, hash_reg;
|
||||
int i;
|
||||
@@ -866,8 +866,7 @@ s32 igb_config_fc_after_link_up(struct e1000_hw *hw)
|
||||
goto out;
|
||||
|
||||
if (!(mii_status_reg & MII_SR_AUTONEG_COMPLETE)) {
|
||||
hw_dbg("Copper PHY and Auto Neg "
|
||||
"has not completed.\n");
|
||||
hw_dbg("Copper PHY and Auto Neg has not completed.\n");
|
||||
goto out;
|
||||
}
|
||||
|
||||
@@ -932,8 +931,7 @@ s32 igb_config_fc_after_link_up(struct e1000_hw *hw)
|
||||
hw_dbg("Flow Control = FULL.\r\n");
|
||||
} else {
|
||||
hw->fc.current_mode = e1000_fc_rx_pause;
|
||||
hw_dbg("Flow Control = "
|
||||
"RX PAUSE frames only.\r\n");
|
||||
hw_dbg("Flow Control = RX PAUSE frames only.\r\n");
|
||||
}
|
||||
}
|
||||
/* For receiving PAUSE frames ONLY.
|
||||
@@ -1299,7 +1297,7 @@ static s32 igb_valid_led_default(struct e1000_hw *hw, u16 *data)
|
||||
}
|
||||
|
||||
if (*data == ID_LED_RESERVED_0000 || *data == ID_LED_RESERVED_FFFF) {
|
||||
switch(hw->phy.media_type) {
|
||||
switch (hw->phy.media_type) {
|
||||
case e1000_media_type_internal_serdes:
|
||||
*data = ID_LED_DEFAULT_82575_SERDES;
|
||||
break;
|
||||
|
||||
@@ -480,6 +480,7 @@ s32 igb_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
|
||||
/* Loop to allow for up to whole page write of eeprom */
|
||||
while (widx < words) {
|
||||
u16 word_out = data[widx];
|
||||
|
||||
word_out = (word_out >> 8) | (word_out << 8);
|
||||
igb_shift_out_eec_bits(hw, word_out, 16);
|
||||
widx++;
|
||||
|
||||
@@ -32,7 +32,7 @@ void igb_release_nvm(struct e1000_hw *hw);
|
||||
s32 igb_read_mac_addr(struct e1000_hw *hw);
|
||||
s32 igb_read_part_num(struct e1000_hw *hw, u32 *part_num);
|
||||
s32 igb_read_part_string(struct e1000_hw *hw, u8 *part_num,
|
||||
u32 part_num_size);
|
||||
u32 part_num_size);
|
||||
s32 igb_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
|
||||
s32 igb_read_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
|
||||
s32 igb_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
|
||||
|
||||
@@ -924,8 +924,7 @@ static s32 igb_copper_link_autoneg(struct e1000_hw *hw)
|
||||
if (phy->autoneg_wait_to_complete) {
|
||||
ret_val = igb_wait_autoneg(hw);
|
||||
if (ret_val) {
|
||||
hw_dbg("Error while waiting for "
|
||||
"autoneg to complete\n");
|
||||
hw_dbg("Error while waiting for autoneg to complete\n");
|
||||
goto out;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -301,9 +301,9 @@
|
||||
#define E1000_RA2 0x054E0 /* 2nd half of Rx address array - RW Array */
|
||||
#define E1000_PSRTYPE(_i) (0x05480 + ((_i) * 4))
|
||||
#define E1000_RAL(_i) (((_i) <= 15) ? (0x05400 + ((_i) * 8)) : \
|
||||
(0x054E0 + ((_i - 16) * 8)))
|
||||
(0x054E0 + ((_i - 16) * 8)))
|
||||
#define E1000_RAH(_i) (((_i) <= 15) ? (0x05404 + ((_i) * 8)) : \
|
||||
(0x054E4 + ((_i - 16) * 8)))
|
||||
(0x054E4 + ((_i - 16) * 8)))
|
||||
#define E1000_IP4AT_REG(_i) (0x05840 + ((_i) * 8))
|
||||
#define E1000_IP6AT_REG(_i) (0x05880 + ((_i) * 4))
|
||||
#define E1000_WUPM_REG(_i) (0x05A00 + ((_i) * 4))
|
||||
@@ -358,8 +358,7 @@
|
||||
#define E1000_VMBMEM(_n) (0x00800 + (64 * (_n)))
|
||||
#define E1000_VMOLR(_n) (0x05AD0 + (4 * (_n)))
|
||||
#define E1000_DVMOLR(_n) (0x0C038 + (64 * (_n)))
|
||||
#define E1000_VLVF(_n) (0x05D00 + (4 * (_n))) /* VLAN Virtual Machine
|
||||
* Filter - RW */
|
||||
#define E1000_VLVF(_n) (0x05D00 + (4 * (_n))) /* VLAN VM Filter */
|
||||
#define E1000_VMVIR(_n) (0x03700 + (4 * (_n)))
|
||||
|
||||
struct e1000_hw;
|
||||
|
||||
@@ -198,6 +198,7 @@ struct igb_tx_buffer {
|
||||
unsigned int bytecount;
|
||||
u16 gso_segs;
|
||||
__be16 protocol;
|
||||
|
||||
DEFINE_DMA_UNMAP_ADDR(dma);
|
||||
DEFINE_DMA_UNMAP_LEN(len);
|
||||
u32 tx_flags;
|
||||
|
||||
@@ -1060,8 +1060,8 @@ static struct igb_reg_test reg_test_i350[] = {
|
||||
{ E1000_TDT(0), 0x100, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
|
||||
{ E1000_TDT(4), 0x40, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
|
||||
{ E1000_RCTL, 0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
|
||||
{ E1000_RCTL, 0x100, 1, SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
|
||||
{ E1000_RCTL, 0x100, 1, SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
|
||||
{ E1000_RCTL, 0x100, 1, SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
|
||||
{ E1000_RCTL, 0x100, 1, SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
|
||||
{ E1000_TCTL, 0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
|
||||
{ E1000_RA, 0, 16, TABLE64_TEST_LO,
|
||||
0xFFFFFFFF, 0xFFFFFFFF },
|
||||
@@ -1103,8 +1103,8 @@ static struct igb_reg_test reg_test_82580[] = {
|
||||
{ E1000_TDT(0), 0x100, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
|
||||
{ E1000_TDT(4), 0x40, 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
|
||||
{ E1000_RCTL, 0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
|
||||
{ E1000_RCTL, 0x100, 1, SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
|
||||
{ E1000_RCTL, 0x100, 1, SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
|
||||
{ E1000_RCTL, 0x100, 1, SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
|
||||
{ E1000_RCTL, 0x100, 1, SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
|
||||
{ E1000_TCTL, 0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
|
||||
{ E1000_RA, 0, 16, TABLE64_TEST_LO,
|
||||
0xFFFFFFFF, 0xFFFFFFFF },
|
||||
@@ -1149,14 +1149,14 @@ static struct igb_reg_test reg_test_82576[] = {
|
||||
{ E1000_TDBAH(4), 0x40, 12, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
|
||||
{ E1000_TDLEN(4), 0x40, 12, PATTERN_TEST, 0x000FFFF0, 0x000FFFFF },
|
||||
{ E1000_RCTL, 0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
|
||||
{ E1000_RCTL, 0x100, 1, SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
|
||||
{ E1000_RCTL, 0x100, 1, SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
|
||||
{ E1000_RCTL, 0x100, 1, SET_READ_TEST, 0x04CFB0FE, 0x003FFFFB },
|
||||
{ E1000_RCTL, 0x100, 1, SET_READ_TEST, 0x04CFB0FE, 0xFFFFFFFF },
|
||||
{ E1000_TCTL, 0x100, 1, SET_READ_TEST, 0xFFFFFFFF, 0x00000000 },
|
||||
{ E1000_RA, 0, 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
|
||||
{ E1000_RA, 0, 16, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
|
||||
{ E1000_RA2, 0, 8, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
|
||||
{ E1000_RA2, 0, 8, TABLE64_TEST_HI, 0x83FFFFFF, 0xFFFFFFFF },
|
||||
{ E1000_MTA, 0, 128,TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
|
||||
{ E1000_MTA, 0, 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
|
||||
{ 0, 0, 0, 0 }
|
||||
};
|
||||
|
||||
@@ -1196,8 +1196,8 @@ static bool reg_pattern_test(struct igb_adapter *adapter, u64 *data,
|
||||
{
|
||||
struct e1000_hw *hw = &adapter->hw;
|
||||
u32 pat, val;
|
||||
static const u32 _test[] =
|
||||
{0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
|
||||
static const u32 _test[] = {
|
||||
0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF};
|
||||
for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {
|
||||
wr32(reg, (_test[pat] & write));
|
||||
val = rd32(reg) & mask;
|
||||
@@ -1218,6 +1218,7 @@ static bool reg_set_and_check(struct igb_adapter *adapter, u64 *data,
|
||||
{
|
||||
struct e1000_hw *hw = &adapter->hw;
|
||||
u32 val;
|
||||
|
||||
wr32(reg, write & mask);
|
||||
val = rd32(reg);
|
||||
if ((write & mask) != (val & mask)) {
|
||||
@@ -1387,14 +1388,14 @@ static int igb_intr_test(struct igb_adapter *adapter, u64 *data)
|
||||
/* Hook up test interrupt handler just for this test */
|
||||
if (adapter->flags & IGB_FLAG_HAS_MSIX) {
|
||||
if (request_irq(adapter->msix_entries[0].vector,
|
||||
igb_test_intr, 0, netdev->name, adapter)) {
|
||||
igb_test_intr, 0, netdev->name, adapter)) {
|
||||
*data = 1;
|
||||
return -1;
|
||||
}
|
||||
} else if (adapter->flags & IGB_FLAG_HAS_MSI) {
|
||||
shared_int = false;
|
||||
if (request_irq(irq,
|
||||
igb_test_intr, 0, netdev->name, adapter)) {
|
||||
igb_test_intr, 0, netdev->name, adapter)) {
|
||||
*data = 1;
|
||||
return -1;
|
||||
}
|
||||
@@ -1949,6 +1950,7 @@ static int igb_link_test(struct igb_adapter *adapter, u64 *data)
|
||||
*data = 0;
|
||||
if (hw->phy.media_type == e1000_media_type_internal_serdes) {
|
||||
int i = 0;
|
||||
|
||||
hw->mac.serdes_has_link = false;
|
||||
|
||||
/* On some blade server designs, link establishment
|
||||
|
||||
@@ -217,8 +217,7 @@ static void igb_netpoll(struct net_device *);
|
||||
#ifdef CONFIG_PCI_IOV
|
||||
static unsigned int max_vfs = 0;
|
||||
module_param(max_vfs, uint, 0);
|
||||
MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate "
|
||||
"per physical function");
|
||||
MODULE_PARM_DESC(max_vfs, "Maximum number of virtual functions to allocate per physical function");
|
||||
#endif /* CONFIG_PCI_IOV */
|
||||
|
||||
static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
|
||||
@@ -384,8 +383,7 @@ static void igb_dump(struct igb_adapter *adapter)
|
||||
/* Print netdevice Info */
|
||||
if (netdev) {
|
||||
dev_info(&adapter->pdev->dev, "Net device Info\n");
|
||||
pr_info("Device Name state trans_start "
|
||||
"last_rx\n");
|
||||
pr_info("Device Name state trans_start last_rx\n");
|
||||
pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
|
||||
netdev->state, netdev->trans_start, netdev->last_rx);
|
||||
}
|
||||
@@ -438,9 +436,7 @@ static void igb_dump(struct igb_adapter *adapter)
|
||||
pr_info("------------------------------------\n");
|
||||
pr_info("TX QUEUE INDEX = %d\n", tx_ring->queue_index);
|
||||
pr_info("------------------------------------\n");
|
||||
pr_info("T [desc] [address 63:0 ] [PlPOCIStDDM Ln] "
|
||||
"[bi->dma ] leng ntw timestamp "
|
||||
"bi->skb\n");
|
||||
pr_info("T [desc] [address 63:0 ] [PlPOCIStDDM Ln] [bi->dma ] leng ntw timestamp bi->skb\n");
|
||||
|
||||
for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
|
||||
const char *next_desc;
|
||||
@@ -458,9 +454,8 @@ static void igb_dump(struct igb_adapter *adapter)
|
||||
else
|
||||
next_desc = "";
|
||||
|
||||
pr_info("T [0x%03X] %016llX %016llX %016llX"
|
||||
" %04X %p %016llX %p%s\n", i,
|
||||
le64_to_cpu(u0->a),
|
||||
pr_info("T [0x%03X] %016llX %016llX %016llX %04X %p %016llX %p%s\n",
|
||||
i, le64_to_cpu(u0->a),
|
||||
le64_to_cpu(u0->b),
|
||||
(u64)dma_unmap_addr(buffer_info, dma),
|
||||
dma_unmap_len(buffer_info, len),
|
||||
@@ -519,10 +514,8 @@ rx_ring_summary:
|
||||
pr_info("------------------------------------\n");
|
||||
pr_info("RX QUEUE INDEX = %d\n", rx_ring->queue_index);
|
||||
pr_info("------------------------------------\n");
|
||||
pr_info("R [desc] [ PktBuf A0] [ HeadBuf DD] "
|
||||
"[bi->dma ] [bi->skb] <-- Adv Rx Read format\n");
|
||||
pr_info("RWB[desc] [PcsmIpSHl PtRs] [vl er S cks ln] -----"
|
||||
"----------- [bi->skb] <-- Adv Rx Write-Back format\n");
|
||||
pr_info("R [desc] [ PktBuf A0] [ HeadBuf DD] [bi->dma ] [bi->skb] <-- Adv Rx Read format\n");
|
||||
pr_info("RWB[desc] [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
|
||||
|
||||
for (i = 0; i < rx_ring->count; i++) {
|
||||
const char *next_desc;
|
||||
@@ -681,9 +674,9 @@ struct net_device *igb_get_hw_dev(struct e1000_hw *hw)
|
||||
static int __init igb_init_module(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
pr_info("%s - version %s\n",
|
||||
igb_driver_string, igb_driver_version);
|
||||
|
||||
pr_info("%s\n", igb_copyright);
|
||||
|
||||
#ifdef CONFIG_IGB_DCA
|
||||
@@ -1345,6 +1338,7 @@ static int igb_alloc_q_vectors(struct igb_adapter *adapter)
|
||||
for (; v_idx < q_vectors; v_idx++) {
|
||||
int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
|
||||
int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
|
||||
|
||||
err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
|
||||
tqpv, txr_idx, rqpv, rxr_idx);
|
||||
|
||||
@@ -1484,6 +1478,7 @@ static void igb_irq_disable(struct igb_adapter *adapter)
|
||||
*/
|
||||
if (adapter->flags & IGB_FLAG_HAS_MSIX) {
|
||||
u32 regval = rd32(E1000_EIAM);
|
||||
|
||||
wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask);
|
||||
wr32(E1000_EIMC, adapter->eims_enable_mask);
|
||||
regval = rd32(E1000_EIAC);
|
||||
@@ -1495,6 +1490,7 @@ static void igb_irq_disable(struct igb_adapter *adapter)
|
||||
wrfl();
|
||||
if (adapter->flags & IGB_FLAG_HAS_MSIX) {
|
||||
int i;
|
||||
|
||||
for (i = 0; i < adapter->num_q_vectors; i++)
|
||||
synchronize_irq(adapter->msix_entries[i].vector);
|
||||
} else {
|
||||
@@ -1513,6 +1509,7 @@ static void igb_irq_enable(struct igb_adapter *adapter)
|
||||
if (adapter->flags & IGB_FLAG_HAS_MSIX) {
|
||||
u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
|
||||
u32 regval = rd32(E1000_EIAC);
|
||||
|
||||
wr32(E1000_EIAC, regval | adapter->eims_enable_mask);
|
||||
regval = rd32(E1000_EIAM);
|
||||
wr32(E1000_EIAM, regval | adapter->eims_enable_mask);
|
||||
@@ -1745,6 +1742,7 @@ int igb_up(struct igb_adapter *adapter)
|
||||
/* notify VFs that reset has been completed */
|
||||
if (adapter->vfs_allocated_count) {
|
||||
u32 reg_data = rd32(E1000_CTRL_EXT);
|
||||
|
||||
reg_data |= E1000_CTRL_EXT_PFRSTD;
|
||||
wr32(E1000_CTRL_EXT, reg_data);
|
||||
}
|
||||
@@ -1960,6 +1958,7 @@ void igb_reset(struct igb_adapter *adapter)
|
||||
/* disable receive for all VFs and wait one second */
|
||||
if (adapter->vfs_allocated_count) {
|
||||
int i;
|
||||
|
||||
for (i = 0 ; i < adapter->vfs_allocated_count; i++)
|
||||
adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
|
||||
|
||||
@@ -3077,6 +3076,7 @@ static int __igb_open(struct net_device *netdev, bool resuming)
|
||||
/* notify VFs that reset has been completed */
|
||||
if (adapter->vfs_allocated_count) {
|
||||
u32 reg_data = rd32(E1000_CTRL_EXT);
|
||||
|
||||
reg_data |= E1000_CTRL_EXT_PFRSTD;
|
||||
wr32(E1000_CTRL_EXT, reg_data);
|
||||
}
|
||||
@@ -3248,7 +3248,7 @@ void igb_setup_tctl(struct igb_adapter *adapter)
|
||||
* Configure a transmit ring after a reset.
|
||||
**/
|
||||
void igb_configure_tx_ring(struct igb_adapter *adapter,
|
||||
struct igb_ring *ring)
|
||||
struct igb_ring *ring)
|
||||
{
|
||||
struct e1000_hw *hw = &adapter->hw;
|
||||
u32 txdctl = 0;
|
||||
@@ -3430,6 +3430,7 @@ static void igb_setup_mrqc(struct igb_adapter *adapter)
|
||||
if (hw->mac.type > e1000_82575) {
|
||||
/* Set the default pool for the PF's first queue */
|
||||
u32 vtctl = rd32(E1000_VT_CTL);
|
||||
|
||||
vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
|
||||
E1000_VT_CTL_DISABLE_DEF_POOL);
|
||||
vtctl |= adapter->vfs_allocated_count <<
|
||||
@@ -3511,7 +3512,7 @@ void igb_setup_rctl(struct igb_adapter *adapter)
|
||||
}
|
||||
|
||||
static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
|
||||
int vfn)
|
||||
int vfn)
|
||||
{
|
||||
struct e1000_hw *hw = &adapter->hw;
|
||||
u32 vmolr;
|
||||
@@ -4077,7 +4078,7 @@ static void igb_spoof_check(struct igb_adapter *adapter)
|
||||
if (!adapter->wvbr)
|
||||
return;
|
||||
|
||||
for(j = 0; j < adapter->vfs_allocated_count; j++) {
|
||||
for (j = 0; j < adapter->vfs_allocated_count; j++) {
|
||||
if (adapter->wvbr & (1 << j) ||
|
||||
adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
|
||||
dev_warn(&adapter->pdev->dev,
|
||||
@@ -4209,14 +4210,15 @@ static void igb_watchdog_task(struct work_struct *work)
|
||||
|
||||
if (!netif_carrier_ok(netdev)) {
|
||||
u32 ctrl;
|
||||
|
||||
hw->mac.ops.get_speed_and_duplex(hw,
|
||||
&adapter->link_speed,
|
||||
&adapter->link_duplex);
|
||||
|
||||
ctrl = rd32(E1000_CTRL);
|
||||
/* Links status message must follow this format */
|
||||
printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s "
|
||||
"Duplex, Flow Control: %s\n",
|
||||
netdev_info(netdev,
|
||||
"igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
|
||||
netdev->name,
|
||||
adapter->link_speed,
|
||||
adapter->link_duplex == FULL_DUPLEX ?
|
||||
@@ -4242,11 +4244,8 @@ static void igb_watchdog_task(struct work_struct *work)
|
||||
|
||||
/* check for thermal sensor event */
|
||||
if (igb_thermal_sensor_event(hw,
|
||||
E1000_THSTAT_LINK_THROTTLE)) {
|
||||
netdev_info(netdev, "The network adapter link "
|
||||
"speed was downshifted because it "
|
||||
"overheated\n");
|
||||
}
|
||||
E1000_THSTAT_LINK_THROTTLE))
|
||||
netdev_info(netdev, "The network adapter link speed was downshifted because it overheated\n");
|
||||
|
||||
/* adjust timeout factor according to speed/duplex */
|
||||
adapter->tx_timeout_factor = 1;
|
||||
@@ -4277,12 +4276,11 @@ static void igb_watchdog_task(struct work_struct *work)
|
||||
/* check for thermal sensor event */
|
||||
if (igb_thermal_sensor_event(hw,
|
||||
E1000_THSTAT_PWR_DOWN)) {
|
||||
netdev_err(netdev, "The network adapter was "
|
||||
"stopped because it overheated\n");
|
||||
netdev_err(netdev, "The network adapter was stopped because it overheated\n");
|
||||
}
|
||||
|
||||
/* Links status message must follow this format */
|
||||
printk(KERN_INFO "igb: %s NIC Link is Down\n",
|
||||
netdev_info(netdev, "igb: %s NIC Link is Down\n",
|
||||
netdev->name);
|
||||
netif_carrier_off(netdev);
|
||||
|
||||
@@ -4344,6 +4342,7 @@ static void igb_watchdog_task(struct work_struct *work)
|
||||
/* Cause software interrupt to ensure Rx ring is cleaned */
|
||||
if (adapter->flags & IGB_FLAG_HAS_MSIX) {
|
||||
u32 eics = 0;
|
||||
|
||||
for (i = 0; i < adapter->num_q_vectors; i++)
|
||||
eics |= adapter->q_vector[i]->eims_value;
|
||||
wr32(E1000_EICS, eics);
|
||||
@@ -4483,13 +4482,12 @@ static void igb_update_itr(struct igb_q_vector *q_vector,
|
||||
case low_latency: /* 50 usec aka 20000 ints/s */
|
||||
if (bytes > 10000) {
|
||||
/* this if handles the TSO accounting */
|
||||
if (bytes/packets > 8000) {
|
||||
if (bytes/packets > 8000)
|
||||
itrval = bulk_latency;
|
||||
} else if ((packets < 10) || ((bytes/packets) > 1200)) {
|
||||
else if ((packets < 10) || ((bytes/packets) > 1200))
|
||||
itrval = bulk_latency;
|
||||
} else if ((packets > 35)) {
|
||||
else if ((packets > 35))
|
||||
itrval = lowest_latency;
|
||||
}
|
||||
} else if (bytes/packets > 2000) {
|
||||
itrval = bulk_latency;
|
||||
} else if (packets <= 2 && bytes < 512) {
|
||||
@@ -4675,6 +4673,7 @@ static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
|
||||
return;
|
||||
} else {
|
||||
u8 l4_hdr = 0;
|
||||
|
||||
switch (first->protocol) {
|
||||
case htons(ETH_P_IP):
|
||||
vlan_macip_lens |= skb_network_header_len(skb);
|
||||
@@ -4962,6 +4961,7 @@ netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
|
||||
*/
|
||||
if (NETDEV_FRAG_PAGE_MAX_SIZE > IGB_MAX_DATA_PER_TXD) {
|
||||
unsigned short f;
|
||||
|
||||
for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
|
||||
count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
|
||||
} else {
|
||||
@@ -5619,6 +5619,7 @@ static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
|
||||
vmolr |= E1000_VMOLR_MPME;
|
||||
} else if (vf_data->num_vf_mc_hashes) {
|
||||
int j;
|
||||
|
||||
vmolr |= E1000_VMOLR_ROMPE;
|
||||
for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
|
||||
igb_mta_set(hw, vf_data->vf_mc_hashes[j]);
|
||||
@@ -5670,6 +5671,7 @@ static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
|
||||
|
||||
for (i = 0; i < adapter->vfs_allocated_count; i++) {
|
||||
u32 vmolr = rd32(E1000_VMOLR(i));
|
||||
|
||||
vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
|
||||
|
||||
vf_data = &adapter->vf_data[i];
|
||||
@@ -5768,6 +5770,7 @@ static s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
|
||||
|
||||
if (!adapter->vf_data[vf].vlans_enabled) {
|
||||
u32 size;
|
||||
|
||||
reg = rd32(E1000_VMOLR(vf));
|
||||
size = reg & E1000_VMOLR_RLPML_MASK;
|
||||
size += 4;
|
||||
@@ -5796,6 +5799,7 @@ static s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
|
||||
adapter->vf_data[vf].vlans_enabled--;
|
||||
if (!adapter->vf_data[vf].vlans_enabled) {
|
||||
u32 size;
|
||||
|
||||
reg = rd32(E1000_VMOLR(vf));
|
||||
size = reg & E1000_VMOLR_RLPML_MASK;
|
||||
size -= 4;
|
||||
@@ -5900,8 +5904,8 @@ static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
|
||||
*/
|
||||
if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
|
||||
u32 vlvf, bits;
|
||||
|
||||
int regndx = igb_find_vlvf_entry(adapter, vid);
|
||||
|
||||
if (regndx < 0)
|
||||
goto out;
|
||||
/* See if any other pools are set for this VLAN filter
|
||||
@@ -6961,6 +6965,7 @@ static void igb_process_skb_fields(struct igb_ring *rx_ring,
|
||||
if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
|
||||
igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
|
||||
u16 vid;
|
||||
|
||||
if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
|
||||
test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
|
||||
vid = be16_to_cpu(rx_desc->wb.upper.vlan);
|
||||
@@ -7170,7 +7175,7 @@ static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
|
||||
break;
|
||||
case SIOCGMIIREG:
|
||||
if (igb_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
|
||||
&data->val_out))
|
||||
&data->val_out))
|
||||
return -EIO;
|
||||
break;
|
||||
case SIOCSMIIREG:
|
||||
@@ -8047,6 +8052,7 @@ static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
|
||||
} /* endif adapter->dmac is not disabled */
|
||||
} else if (hw->mac.type == e1000_82580) {
|
||||
u32 reg = rd32(E1000_PCIEMISC);
|
||||
|
||||
wr32(E1000_PCIEMISC, reg & ~E1000_PCIEMISC_LX_DECISION);
|
||||
wr32(E1000_DMACR, 0);
|
||||
}
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user