Merge branch 'for-armsoc' of git://git.linaro.org/people/rmk/linux-arm

Pull #1 ARM updates from Russell King:
 "This one covers stuff which Arnd is waiting for me to push, as this is
  shared between both our trees and probably other trees elsewhere.

  Essentially, this contains:
   - AMBA primecell device initializer updates - mostly shrinking the
     size of the device declarations in platform code to something more
     reasonable.
   - Getting rid of the NO_IRQ crap from AMBA primecell stuff.
   - Nicolas' idle cleanups.  This in combination with the restart
     cleanups from the last merge window results in a great many
     mach/system.h files being deleted."

Yay: ~80 files, ~2000 lines deleted.

* 'for-armsoc' of git://git.linaro.org/people/rmk/linux-arm: (60 commits)
  ARM: remove disable_fiq and arch_ret_to_user macros
  ARM: make entry-macro.S depend on !MULTI_IRQ_HANDLER
  ARM: rpc: make default fiq handler run-time installed
  ARM: make arch_ret_to_user macro optional
  ARM: amba: samsung: use common amba device initializers
  ARM: amba: spear: use common amba device initializers
  ARM: amba: nomadik: use common amba device initializers
  ARM: amba: u300: use common amba device initializers
  ARM: amba: lpc32xx: use common amba device initializers
  ARM: amba: netx: use common amba device initializers
  ARM: amba: bcmring: use common amba device initializers
  ARM: amba: ep93xx: use common amba device initializers
  ARM: amba: omap2: use common amba device initializers
  ARM: amba: integrator: use common amba device initializers
  ARM: amba: realview: get rid of private platform amba_device initializer
  ARM: amba: versatile: get rid of private platform amba_device initializer
  ARM: amba: vexpress: get rid of private platform amba_device initializer
  ARM: amba: provide common initializers for static amba devices
  ARM: amba: make use of -1 IRQs warn
  ARM: amba: u300: get rid of NO_IRQ initializers
  ...
This commit is contained in:
Linus Torvalds
2012-03-23 17:30:49 -07:00
202 changed files with 935 additions and 2901 deletions
+6
View File
@@ -186,6 +186,9 @@ config GENERIC_ISA_DMA
config FIQ
bool
config NEED_RET_TO_USER
bool
config ARCH_MTD_XIP
bool
@@ -479,6 +482,7 @@ config ARCH_IOP13XX
select ARCH_SUPPORTS_MSI
select VMSPLIT_1G
select NEED_MACH_MEMORY_H
select NEED_RET_TO_USER
help
Support for Intel's IOP13XX (XScale) family of processors.
@@ -486,6 +490,7 @@ config ARCH_IOP32X
bool "IOP32x-based"
depends on MMU
select CPU_XSCALE
select NEED_RET_TO_USER
select PLAT_IOP
select PCI
select ARCH_REQUIRE_GPIOLIB
@@ -497,6 +502,7 @@ config ARCH_IOP33X
bool "IOP33x-based"
depends on MMU
select CPU_XSCALE
select NEED_RET_TO_USER
select PLAT_IOP
select PCI
select ARCH_REQUIRE_GPIOLIB
+82 -82
View File
@@ -81,25 +81,6 @@ choice
prompt "Kernel low-level debugging port"
depends on DEBUG_LL
config DEBUG_LL_UART_NONE
bool "No low-level debugging UART"
help
Say Y here if your platform doesn't provide a UART option
below. This relies on your platform choosing the right UART
definition internally in order for low-level debugging to
work.
config DEBUG_ICEDCC
bool "Kernel low-level debugging via EmbeddedICE DCC channel"
help
Say Y here if you want the debug print routines to direct
their output to the EmbeddedICE macrocell's DCC channel using
co-processor 14. This is known to work on the ARM9 style ICE
channel and on the XScale with the PEEDI.
Note that the system will appear to hang during boot if there
is nothing connected to read from the DCC.
config AT91_DEBUG_LL_DBGU0
bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl"
depends on HAVE_AT91_DBGU0
@@ -108,20 +89,6 @@ choice
bool "Kernel low-level debugging on 9263, 9g45 and cap9"
depends on HAVE_AT91_DBGU1
config DEBUG_FOOTBRIDGE_COM1
bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1"
depends on FOOTBRIDGE
help
Say Y here if you want the debug print routines to direct
their output to the 8250 at PCI COM1.
config DEBUG_DC21285_PORT
bool "Kernel low-level debugging messages via footbridge serial port"
depends on FOOTBRIDGE
help
Say Y here if you want the debug print routines to direct
their output to the serial port in the DC21285 (Footbridge).
config DEBUG_CLPS711X_UART1
bool "Kernel low-level debugging messages via UART1"
depends on ARCH_CLPS711X
@@ -136,6 +103,20 @@ choice
Say Y here if you want the debug print routines to direct
their output to the second serial port on these devices.
config DEBUG_DC21285_PORT
bool "Kernel low-level debugging messages via footbridge serial port"
depends on FOOTBRIDGE
help
Say Y here if you want the debug print routines to direct
their output to the serial port in the DC21285 (Footbridge).
config DEBUG_FOOTBRIDGE_COM1
bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1"
depends on FOOTBRIDGE
help
Say Y here if you want the debug print routines to direct
their output to the 8250 at PCI COM1.
config DEBUG_HIGHBANK_UART
bool "Kernel low-level debugging messages via Highbank UART"
depends on ARCH_HIGHBANK
@@ -206,55 +187,6 @@ choice
Say Y here if you want kernel low-level debugging support
on i.MX6Q.
config DEBUG_S3C_UART0
depends on PLAT_SAMSUNG
bool "Use S3C UART 0 for low-level debug"
help
Say Y here if you want the debug print routines to direct
their output to UART 0. The port must have been initialised
by the boot-loader before use.
The uncompressor code port configuration is now handled
by CONFIG_S3C_LOWLEVEL_UART_PORT.
config DEBUG_S3C_UART1
depends on PLAT_SAMSUNG
bool "Use S3C UART 1 for low-level debug"
help
Say Y here if you want the debug print routines to direct
their output to UART 1. The port must have been initialised
by the boot-loader before use.
The uncompressor code port configuration is now handled
by CONFIG_S3C_LOWLEVEL_UART_PORT.
config DEBUG_S3C_UART2
depends on PLAT_SAMSUNG
bool "Use S3C UART 2 for low-level debug"
help
Say Y here if you want the debug print routines to direct
their output to UART 2. The port must have been initialised
by the boot-loader before use.
The uncompressor code port configuration is now handled
by CONFIG_S3C_LOWLEVEL_UART_PORT.
config DEBUG_REALVIEW_STD_PORT
bool "RealView Default UART"
depends on ARCH_REALVIEW
help
Say Y here if you want the debug print routines to direct
their output to the serial port on RealView EB, PB11MP, PBA8
and PBX platforms.
config DEBUG_REALVIEW_PB1176_PORT
bool "RealView PB1176 UART"
depends on MACH_REALVIEW_PB1176
help
Say Y here if you want the debug print routines to direct
their output to the standard serial port on the RealView
PB1176 platform.
config DEBUG_MSM_UART1
bool "Kernel low-level debugging messages via MSM UART1"
depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50
@@ -292,6 +224,74 @@ choice
Say Y here if you want the debug print routines to direct
their output to the serial port on MSM 8960 devices.
config DEBUG_REALVIEW_STD_PORT
bool "RealView Default UART"
depends on ARCH_REALVIEW
help
Say Y here if you want the debug print routines to direct
their output to the serial port on RealView EB, PB11MP, PBA8
and PBX platforms.
config DEBUG_REALVIEW_PB1176_PORT
bool "RealView PB1176 UART"
depends on MACH_REALVIEW_PB1176
help
Say Y here if you want the debug print routines to direct
their output to the standard serial port on the RealView
PB1176 platform.
config DEBUG_S3C_UART0
depends on PLAT_SAMSUNG
bool "Use S3C UART 0 for low-level debug"
help
Say Y here if you want the debug print routines to direct
their output to UART 0. The port must have been initialised
by the boot-loader before use.
The uncompressor code port configuration is now handled
by CONFIG_S3C_LOWLEVEL_UART_PORT.
config DEBUG_S3C_UART1
depends on PLAT_SAMSUNG
bool "Use S3C UART 1 for low-level debug"
help
Say Y here if you want the debug print routines to direct
their output to UART 1. The port must have been initialised
by the boot-loader before use.
The uncompressor code port configuration is now handled
by CONFIG_S3C_LOWLEVEL_UART_PORT.
config DEBUG_S3C_UART2
depends on PLAT_SAMSUNG
bool "Use S3C UART 2 for low-level debug"
help
Say Y here if you want the debug print routines to direct
their output to UART 2. The port must have been initialised
by the boot-loader before use.
The uncompressor code port configuration is now handled
by CONFIG_S3C_LOWLEVEL_UART_PORT.
config DEBUG_LL_UART_NONE
bool "No low-level debugging UART"
help
Say Y here if your platform doesn't provide a UART option
below. This relies on your platform choosing the right UART
definition internally in order for low-level debugging to
work.
config DEBUG_ICEDCC
bool "Kernel low-level debugging via EmbeddedICE DCC channel"
help
Say Y here if you want the debug print routines to direct
their output to the EmbeddedICE macrocell's DCC channel using
co-processor 14. This is known to work on the ARM9 style ICE
channel and on the XScale with the PEEDI.
Note that the system will appear to hang during boot if there
is nothing connected to read from the DCC.
endchoice
config EARLY_PRINTK
@@ -11,14 +11,6 @@
/* IOC / IOMD based hardware */
#include <asm/hardware/iomd.h>
.macro disable_fiq
mov r12, #ioc_base_high
.if ioc_base_low
orr r12, r12, #ioc_base_low
.endif
strb r12, [r12, #0x38] @ Disable FIQ register
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first
ldr \tmp, =irq_prio_h
+1
View File
@@ -110,6 +110,7 @@ extern void cpu_init(void);
void soft_restart(unsigned long);
extern void (*arm_pm_restart)(char str, const char *cmd);
extern void (*arm_pm_idle)(void);
#define UDBG_UNDEFINED (1 << 0)
#define UDBG_SYSCALL (1 << 1)
+2 -1
View File
@@ -19,7 +19,9 @@
#include <asm/glue-df.h>
#include <asm/glue-pf.h>
#include <asm/vfpmacros.h>
#ifndef CONFIG_MULTI_IRQ_HANDLER
#include <mach/entry-macro.S>
#endif
#include <asm/thread_notify.h>
#include <asm/unwind.h>
#include <asm/unistd.h>
@@ -1101,7 +1103,6 @@ __stubs_start:
* get out of that mode without clobbering one register.
*/
vector_fiq:
disable_fiq
subs pc, lr, #4
/*=============================================================================
+7 -1
View File
@@ -10,9 +10,15 @@
#include <asm/unistd.h>
#include <asm/ftrace.h>
#include <mach/entry-macro.S>
#include <asm/unwind.h>
#ifdef CONFIG_NEED_RET_TO_USER
#include <mach/entry-macro.S>
#else
.macro arch_ret_to_user, tmp1, tmp2
.endm
#endif
#include "entry-header.S"
+16 -11
View File
@@ -61,8 +61,6 @@ extern void setup_mm_for_reboot(void);
static volatile int hlt_counter;
#include <mach/system.h>
void disable_hlt(void)
{
hlt_counter++;
@@ -181,13 +179,17 @@ void cpu_idle_wait(void)
EXPORT_SYMBOL_GPL(cpu_idle_wait);
/*
* This is our default idle handler. We need to disable
* interrupts here to ensure we don't miss a wakeup call.
* This is our default idle handler.
*/
void (*arm_pm_idle)(void);
static void default_idle(void)
{
if (!need_resched())
arch_idle();
if (arm_pm_idle)
arm_pm_idle();
else
cpu_do_idle();
local_irq_enable();
}
@@ -215,6 +217,10 @@ void cpu_idle(void)
cpu_die();
#endif
/*
* We need to disable interrupts here
* to ensure we don't miss a wakeup call.
*/
local_irq_disable();
#ifdef CONFIG_PL310_ERRATA_769419
wmb();
@@ -222,19 +228,18 @@ void cpu_idle(void)
if (hlt_counter) {
local_irq_enable();
cpu_relax();
} else {
} else if (!need_resched()) {
stop_critical_timings();
if (cpuidle_idle_call())
pm_idle();
start_critical_timings();
/*
* This will eventually be removed - pm_idle
* functions should always return with IRQs
* enabled.
* pm_idle functions must always
* return with IRQs enabled.
*/
WARN_ON(irqs_disabled());
} else
local_irq_enable();
}
}
leds_event(led_idle_end);
rcu_idle_exit();
+8
View File
@@ -14,6 +14,7 @@
#include <linux/module.h>
#include <asm/proc-fns.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@@ -313,6 +314,12 @@ static struct at91_gpio_bank at91cap9_gpio[] __initdata = {
}
};
static void at91cap9_idle(void)
{
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
cpu_do_idle();
}
/* --------------------------------------------------------------------
* AT91CAP9 processor initialization
* -------------------------------------------------------------------- */
@@ -332,6 +339,7 @@ static void __init at91cap9_ioremap_registers(void)
static void __init at91cap9_initialize(void)
{
arm_pm_idle = at91cap9_idle;
arm_pm_restart = at91sam9g45_restart;
at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1);
+10
View File
@@ -289,6 +289,15 @@ static struct at91_gpio_bank at91rm9200_gpio[] __initdata = {
}
};
static void at91rm9200_idle(void)
{
/*
* Disable the processor clock. The processor will be automatically
* re-enabled by an interrupt or by a reset.
*/
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
}
static void at91rm9200_restart(char mode, const char *cmd)
{
/*
@@ -314,6 +323,7 @@ static void __init at91rm9200_ioremap_registers(void)
static void __init at91rm9200_initialize(void)
{
arm_pm_idle = at91rm9200_idle;
arm_pm_restart = at91rm9200_restart;
at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1)
| (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3)
+8
View File
@@ -12,6 +12,7 @@
#include <linux/module.h>
#include <asm/proc-fns.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@@ -328,8 +329,15 @@ static void __init at91sam9260_ioremap_registers(void)
at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC);
}
static void at91sam9260_idle(void)
{
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
cpu_do_idle();
}
static void __init at91sam9260_initialize(void)
{
arm_pm_idle = at91sam9260_idle;
arm_pm_restart = at91sam9_alt_restart;
at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1)
| (1 << AT91SAM9260_ID_IRQ2);
+8
View File
@@ -12,6 +12,7 @@
#include <linux/module.h>
#include <asm/proc-fns.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@@ -286,8 +287,15 @@ static void __init at91sam9261_ioremap_registers(void)
at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC);
}
static void at91sam9261_idle(void)
{
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
cpu_do_idle();
}
static void __init at91sam9261_initialize(void)
{
arm_pm_idle = at91sam9261_idle;
arm_pm_restart = at91sam9_alt_restart;
at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1)
| (1 << AT91SAM9261_ID_IRQ2);
+8
View File
@@ -12,6 +12,7 @@
#include <linux/module.h>
#include <asm/proc-fns.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@@ -307,8 +308,15 @@ static void __init at91sam9263_ioremap_registers(void)
at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1);
}
static void at91sam9263_idle(void)
{
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
cpu_do_idle();
}
static void __init at91sam9263_initialize(void)
{
arm_pm_idle = at91sam9263_idle;
arm_pm_restart = at91sam9_alt_restart;
at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1);
+7
View File
@@ -317,6 +317,12 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = {
}
};
static void at91sam9g45_idle(void)
{
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
cpu_do_idle();
}
/* --------------------------------------------------------------------
* AT91SAM9G45 processor initialization
* -------------------------------------------------------------------- */
@@ -337,6 +343,7 @@ static void __init at91sam9g45_ioremap_registers(void)
static void __init at91sam9g45_initialize(void)
{
arm_pm_idle = at91sam9g45_idle;
arm_pm_restart = at91sam9g45_restart;
at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0);
+8
View File
@@ -11,6 +11,7 @@
#include <linux/module.h>
#include <asm/proc-fns.h>
#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
@@ -291,8 +292,15 @@ static void __init at91sam9rl_ioremap_registers(void)
at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC);
}
static void at91sam9rl_idle(void)
{
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
cpu_do_idle();
}
static void __init at91sam9rl_initialize(void)
{
arm_pm_idle = at91sam9rl_idle;
arm_pm_restart = at91sam9_alt_restart;
at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0);
+12
View File
@@ -13,6 +13,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <asm/proc-fns.h>
#include <asm/mach/arch.h>
#include <mach/at91x40.h>
#include <mach/at91_st.h>
@@ -37,8 +38,19 @@ unsigned long clk_get_rate(struct clk *clk)
return AT91X40_MASTER_CLOCK;
}
static void at91x40_idle(void)
{
/*
* Disable the processor clock. The processor will be automatically
* re-enabled by an interrupt or by a reset.
*/
at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU);
cpu_do_idle();
}
void __init at91x40_initialize(unsigned long main_clock)
{
arm_pm_idle = at91x40_idle;
at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1)
| (1 << AT91X40_ID_IRQ2);
}
@@ -13,17 +13,11 @@
#include <mach/hardware.h>
#include <mach/at91_aic.h>
.macro disable_fiq
.endm
.macro get_irqnr_preamble, base, tmp
ldr \base, =at91_aic_base @ base virtual address of AIC peripheral
ldr \base, [\base]
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number
-50
View File
@@ -1,50 +0,0 @@
/*
* arch/arm/mach-at91/include/mach/system.h
*
* Copyright (C) 2003 SAN People
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
#include <mach/hardware.h>
#include <mach/at91_st.h>
#include <mach/at91_dbgu.h>
#include <mach/at91_pmc.h>
static inline void arch_idle(void)
{
/*
* Disable the processor clock. The processor will be automatically
* re-enabled by an interrupt or by a reset.
*/
#ifdef AT91_PS
at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU);
#else
at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK);
#endif
#ifndef CONFIG_CPU_ARM920T
/*
* Set the processor (CP15) into 'Wait for Interrupt' mode.
* Post-RM9200 processors need this in conjunction with the above
* to save power when idle.
*/
cpu_do_idle();
#endif
}
#endif
+2 -21
View File
@@ -52,27 +52,8 @@
#include <mach/csp/chipcHw_inline.h>
#include <mach/csp/tmrHw_reg.h>
#define AMBA_DEVICE(name, initname, base, plat, size) \
static struct amba_device name##_device = { \
.dev = { \
.coherent_dma_mask = ~0, \
.init_name = initname, \
.platform_data = plat \
}, \
.res = { \
.start = MM_ADDR_IO_##base, \
.end = MM_ADDR_IO_##base + (size) - 1, \
.flags = IORESOURCE_MEM \
}, \
.dma_mask = ~0, \
.irq = { \
IRQ_##base \
} \
}
AMBA_DEVICE(uartA, "uarta", UARTA, NULL, SZ_4K);
AMBA_DEVICE(uartB, "uartb", UARTB, NULL, SZ_4K);
static AMBA_APB_DEVICE(uartA, "uarta", MM_ADDR_IO_UARTA, { IRQ_UARTA }, NULL);
static AMBA_APB_DEVICE(uartB, "uartb", MM_ADDR_IO_UARTB, { IRQ_UARTB }, NULL);
static struct clk pll1_clk = {
.name = "PLL1",
@@ -21,9 +21,6 @@
#include <mach/hardware.h>
#include <mach/csp/mm_io.h>
.macro disable_fiq
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \base, =(MM_IO_BASE_INTC0)
ldr \irqstat, [\base, #0] @ get status
@@ -77,6 +74,3 @@
.macro get_irqnr_preamble, base, tmp
.endm
.macro arch_ret_to_user, tmp1, tmp2
.endm
@@ -1,28 +0,0 @@
/*
*
* Copyright (C) 1999 ARM Limited
* Copyright (C) 2000 Deep Blue Solutions Ltd
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H
static inline void arch_idle(void)
{
cpu_do_idle();
}
#endif

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