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Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/linville/wireless-2.6.26

Browse Source
This commit is contained in:
David S. Miller
2008-02-29 13:41:25 -08:00
parent 03a64c93b6 e486182907
commit 4a80f27889
147 changed files with 10673 additions and 8341 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/net/wireless/Kconfig
+17 -27
View File
@@ -146,12 +146,15 @@ config IPW2100
configure your card:
<http://www.hpl.hp.com/personal/Jean_Tourrilhes/Linux/Tools.html>.
It is recommended that you compile this driver as a module (M)
rather than built-in (Y). This driver requires firmware at device
initialization time, and when built-in this typically happens
before the filesystem is accessible (hence firmware will be
unavailable and initialization will fail). If you do choose to build
this driver into your kernel image, you can avoid this problem by
including the firmware and a firmware loader in an initramfs.
If you want to compile the driver as a module ( = code which can be
inserted in and removed from the running kernel whenever you want),
say M here and read <file:Documentation/kbuild/modules.txt>.
The module will be called ipw2100.ko.
config IPW2100_MONITOR
bool "Enable promiscuous mode"
depends on IPW2100
@@ -201,11 +204,14 @@ config IPW2200
configure your card:
<http://www.hpl.hp.com/personal/Jean_Tourrilhes/Linux/Tools.html>.
If you want to compile the driver as a module ( = code which can be
inserted in and removed from the running kernel whenever you want),
say M here and read <file:Documentation/kbuild/modules.txt>.
The module will be called ipw2200.ko.
It is recommended that you compile this driver as a module (M)
rather than built-in (Y). This driver requires firmware at device
initialization time, and when built-in this typically happens
before the filesystem is accessible (hence firmware will be
unavailable and initialization will fail). If you do choose to build
this driver into your kernel image, you can avoid this problem by
including the firmware and a firmware loader in an initramfs.
config IPW2200_MONITOR
bool "Enable promiscuous mode"
@@ -732,23 +738,7 @@ config P54_PCI
If you choose to build a module, it'll be called p54pci.
config ATH5K
tristate "Atheros 5xxx wireless cards support"
depends on PCI && MAC80211 && WLAN_80211 && EXPERIMENTAL
---help---
This module adds support for wireless adapters based on
Atheros 5xxx chipset.
Currently the following chip versions are supported:
MAC: AR5211 AR5212
PHY: RF5111/2111 RF5112/2112 RF5413/2413
This driver uses the kernel's mac80211 subsystem.
If you choose to build a module, it'll be called ath5k. Say M if
unsure.
source "drivers/net/wireless/ath5k/Kconfig"
source "drivers/net/wireless/iwlwifi/Kconfig"
source "drivers/net/wireless/hostap/Kconfig"
source "drivers/net/wireless/bcm43xx/Kconfig"
drivers/net/wireless/adm8211.c
+48 -40
View File
@@ -48,6 +48,32 @@ static struct pci_device_id adm8211_pci_id_table[] __devinitdata = {
{ 0 }
};
static struct ieee80211_rate adm8211_rates[] = {
{ .bitrate = 10, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
{ .bitrate = 20, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
{ .bitrate = 55, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
{ .bitrate = 110, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
{ .bitrate = 220, .flags = IEEE80211_RATE_SHORT_PREAMBLE }, /* XX ?? */
};
static const struct ieee80211_channel adm8211_channels[] = {
{ .center_freq = 2412},
{ .center_freq = 2417},
{ .center_freq = 2422},
{ .center_freq = 2427},
{ .center_freq = 2432},
{ .center_freq = 2437},
{ .center_freq = 2442},
{ .center_freq = 2447},
{ .center_freq = 2452},
{ .center_freq = 2457},
{ .center_freq = 2462},
{ .center_freq = 2467},
{ .center_freq = 2472},
{ .center_freq = 2484},
};
static void adm8211_eeprom_register_read(struct eeprom_93cx6 *eeprom)
{
struct adm8211_priv *priv = eeprom->data;
@@ -155,17 +181,17 @@ static int adm8211_read_eeprom(struct ieee80211_hw *dev)
printk(KERN_DEBUG "%s (adm8211): Channel range: %d - %d\n",
pci_name(priv->pdev), (int)chan_range.min, (int)chan_range.max);
priv->modes[0].num_channels = chan_range.max - chan_range.min + 1;
priv->modes[0].channels = priv->channels;
BUILD_BUG_ON(sizeof(priv->channels) != sizeof(adm8211_channels));
memcpy(priv->channels, adm8211_channels, sizeof(adm8211_channels));
memcpy(priv->channels, adm8211_channels, sizeof(priv->channels));
priv->band.channels = priv->channels;
priv->band.n_channels = ARRAY_SIZE(adm8211_channels);
priv->band.bitrates = adm8211_rates;
priv->band.n_bitrates = ARRAY_SIZE(adm8211_rates);
for (i = 1; i <= ARRAY_SIZE(adm8211_channels); i++)
if (i >= chan_range.min && i <= chan_range.max)
priv->channels[i - 1].flag =
IEEE80211_CHAN_W_SCAN |
IEEE80211_CHAN_W_ACTIVE_SCAN |
IEEE80211_CHAN_W_IBSS;
if (i < chan_range.min || i > chan_range.max)
priv->channels[i - 1].flags |= IEEE80211_CHAN_DISABLED;
switch (priv->eeprom->specific_bbptype) {
case ADM8211_BBP_RFMD3000:
@@ -347,7 +373,6 @@ static void adm8211_interrupt_rci(struct ieee80211_hw *dev)
unsigned int pktlen;
struct sk_buff *skb, *newskb;
unsigned int limit = priv->rx_ring_size;
static const u8 rate_tbl[] = {10, 20, 55, 110, 220};
u8 rssi, rate;
while (!(priv->rx_ring[entry].status & cpu_to_le32(RDES0_STATUS_OWN))) {
@@ -425,12 +450,10 @@ static void adm8211_interrupt_rci(struct ieee80211_hw *dev)
else
rx_status.ssi = 100 - rssi;
if (rate <= 4)
rx_status.rate = rate_tbl[rate];
rx_status.rate_idx = rate;
rx_status.channel = priv->channel;
rx_status.freq = adm8211_channels[priv->channel - 1].freq;
rx_status.phymode = MODE_IEEE80211B;
rx_status.freq = adm8211_channels[priv->channel - 1].center_freq;
rx_status.band = IEEE80211_BAND_2GHZ;
ieee80211_rx_irqsafe(dev, skb, &rx_status);
}
@@ -1054,7 +1077,7 @@ static int adm8211_set_rate(struct ieee80211_hw *dev)
if (priv->pdev->revision != ADM8211_REV_BA) {
rate_buf[0] = ARRAY_SIZE(adm8211_rates);
for (i = 0; i < ARRAY_SIZE(adm8211_rates); i++)
rate_buf[i + 1] = (adm8211_rates[i].rate / 5) | 0x80;
rate_buf[i + 1] = (adm8211_rates[i].bitrate / 5) | 0x80;
} else {
/* workaround for rev BA specific bug */
rate_buf[0] = 0x04;
@@ -1086,7 +1109,7 @@ static void adm8211_hw_init(struct ieee80211_hw *dev)
u32 reg;
u8 cline;
reg = le32_to_cpu(ADM8211_CSR_READ(PAR));
reg = ADM8211_CSR_READ(PAR);
reg |= ADM8211_PAR_MRLE | ADM8211_PAR_MRME;
reg &= ~(ADM8211_PAR_BAR | ADM8211_PAR_CAL);
@@ -1303,9 +1326,10 @@ static int adm8211_set_ssid(struct ieee80211_hw *dev, u8 *ssid, size_t ssid_len)
static int adm8211_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
{
struct adm8211_priv *priv = dev->priv;
int channel = ieee80211_frequency_to_channel(conf->channel->center_freq);
if (conf->channel != priv->channel) {
priv->channel = conf->channel;
if (channel != priv->channel) {
priv->channel = channel;
adm8211_rf_set_channel(dev, priv->channel);
}
@@ -1678,13 +1702,9 @@ static int adm8211_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
int plcp, dur, len, plcp_signal, short_preamble;
struct ieee80211_hdr *hdr;
if (control->tx_rate < 0) {
short_preamble = 1;
plcp_signal = -control->tx_rate;
} else {
short_preamble = 0;
plcp_signal = control->tx_rate;
}
short_preamble = !!(control->tx_rate->flags &
IEEE80211_TXCTL_SHORT_PREAMBLE);
plcp_signal = control->tx_rate->bitrate;
hdr = (struct ieee80211_hdr *)skb->data;
fc = le16_to_cpu(hdr->frame_control) & ~IEEE80211_FCTL_PROTECTED;
@@ -1880,18 +1900,11 @@ static int __devinit adm8211_probe(struct pci_dev *pdev,
SET_IEEE80211_PERM_ADDR(dev, perm_addr);
dev->extra_tx_headroom = sizeof(struct adm8211_tx_hdr);
dev->flags = IEEE80211_HW_DEFAULT_REG_DOMAIN_CONFIGURED;
/* IEEE80211_HW_RX_INCLUDES_FCS in promisc mode */
/* dev->flags = IEEE80211_HW_RX_INCLUDES_FCS in promisc mode */
dev->channel_change_time = 1000;
dev->max_rssi = 100; /* FIXME: find better value */
priv->modes[0].mode = MODE_IEEE80211B;
/* channel info filled in by adm8211_read_eeprom */
memcpy(priv->rates, adm8211_rates, sizeof(adm8211_rates));
priv->modes[0].num_rates = ARRAY_SIZE(adm8211_rates);
priv->modes[0].rates = priv->rates;
dev->queues = 1; /* ADM8211C supports more, maybe ADM8211B too */
priv->retry_limit = 3;
@@ -1917,14 +1930,9 @@ static int __devinit adm8211_probe(struct pci_dev *pdev,
goto err_free_desc;
}
priv->channel = priv->modes[0].channels[0].chan;
priv->channel = 1;
err = ieee80211_register_hwmode(dev, &priv->modes[0]);
if (err) {
printk(KERN_ERR "%s (adm8211): Can't register hwmode\n",
pci_name(pdev));
goto err_free_desc;
}
dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
err = ieee80211_register_hw(dev);
if (err) {
drivers/net/wireless/adm8211.h
+7 -58
View File
@@ -534,61 +534,6 @@ struct adm8211_eeprom {
u8 cis_data[0]; /* 0x80, 384 bytes */
} __attribute__ ((packed));
static const struct ieee80211_rate adm8211_rates[] = {
{ .rate = 10,
.val = 10,
.val2 = -10,
.flags = IEEE80211_RATE_CCK_2 },
{ .rate = 20,
.val = 20,
.val2 = -20,
.flags = IEEE80211_RATE_CCK_2 },
{ .rate = 55,
.val = 55,
.val2 = -55,
.flags = IEEE80211_RATE_CCK_2 },
{ .rate = 110,
.val = 110,
.val2 = -110,
.flags = IEEE80211_RATE_CCK_2 }
};
struct ieee80211_chan_range {
u8 min;
u8 max;
};
static const struct ieee80211_channel adm8211_channels[] = {
{ .chan = 1,
.freq = 2412},
{ .chan = 2,
.freq = 2417},
{ .chan = 3,
.freq = 2422},
{ .chan = 4,
.freq = 2427},
{ .chan = 5,
.freq = 2432},
{ .chan = 6,
.freq = 2437},
{ .chan = 7,
.freq = 2442},
{ .chan = 8,
.freq = 2447},
{ .chan = 9,
.freq = 2452},
{ .chan = 10,
.freq = 2457},
{ .chan = 11,
.freq = 2462},
{ .chan = 12,
.freq = 2467},
{ .chan = 13,
.freq = 2472},
{ .chan = 14,
.freq = 2484},
};
struct adm8211_priv {
struct pci_dev *pdev;
spinlock_t lock;
@@ -603,9 +548,8 @@ struct adm8211_priv {
unsigned int cur_tx, dirty_tx, cur_rx;
struct ieee80211_low_level_stats stats;
struct ieee80211_hw_mode modes[1];
struct ieee80211_channel channels[ARRAY_SIZE(adm8211_channels)];
struct ieee80211_rate rates[ARRAY_SIZE(adm8211_rates)];
struct ieee80211_supported_band band;
struct ieee80211_channel channels[14];
int mode;
int channel;
@@ -643,6 +587,11 @@ struct adm8211_priv {
} transceiver_type;
};
struct ieee80211_chan_range {
u8 min;
u8 max;
};
static const struct ieee80211_chan_range cranges[] = {
{1, 11}, /* FCC */
{1, 11}, /* IC */
drivers/net/wireless/ath5k/Kconfig
+37
View File
@@ -0,0 +1,37 @@
config ATH5K
tristate "Atheros 5xxx wireless cards support"
depends on PCI && MAC80211 && WLAN_80211 && EXPERIMENTAL
---help---
This module adds support for wireless adapters based on
Atheros 5xxx chipset.
Currently the following chip versions are supported:
MAC: AR5211 AR5212
PHY: RF5111/2111 RF5112/2112 RF5413/2413
This driver uses the kernel's mac80211 subsystem.
If you choose to build a module, it'll be called ath5k. Say M if
unsure.
config ATH5K_DEBUG
bool "Atheros 5xxx debugging"
depends on ATH5K
---help---
Atheros 5xxx debugging messages.
Say Y, if and you will get debug options for ath5k.
To use this, you need to mount debugfs:
mkdir /debug/
mount -t debugfs debug /debug/
You will get access to files under:
/debug/ath5k/phy0/
To enable debug, pass the debug level to the debug module
parameter. For example:
modprobe ath5k debug=0x00000400
drivers/net/wireless/ath5k/Makefile
+6 -2
View File
@@ -1,2 +1,6 @@
ath5k-objs = base.o hw.o regdom.o initvals.o phy.o debug.o
obj-$(CONFIG_ATH5K) += ath5k.o
ath5k-y += base.o
ath5k-y += hw.o
ath5k-y += initvals.o
ath5k-y += phy.o
ath5k-$(CONFIG_ATH5K_DEBUG) += debug.o
obj-$(CONFIG_ATH5K) += ath5k.o
drivers/net/wireless/ath5k/ath5k.h
+51 -55
View File
@@ -30,7 +30,6 @@
#include <net/mac80211.h>
#include "hw.h"
#include "regdom.h"
/* PCI IDs */
#define PCI_DEVICE_ID_ATHEROS_AR5210 0x0007 /* AR5210 */
@@ -251,19 +250,23 @@ struct ath5k_srev_name {
*/
#define MODULATION_TURBO 0x00000080
enum ath5k_vendor_mode {
MODE_ATHEROS_TURBO = NUM_IEEE80211_MODES+1,
MODE_ATHEROS_TURBOG
enum ath5k_driver_mode {
AR5K_MODE_11A = 0,
AR5K_MODE_11A_TURBO = 1,
AR5K_MODE_11B = 2,
AR5K_MODE_11G = 3,
AR5K_MODE_11G_TURBO = 4,
AR5K_MODE_XR = 0,
AR5K_MODE_MAX = 5
};
/* Number of supported mac80211 enum ieee80211_phymode modes by this driver */
#define NUM_DRIVER_MODES 3
/* adding this flag to rate_code enables short preamble, see ar5212_reg.h */
#define AR5K_SET_SHORT_PREAMBLE 0x04
#define HAS_SHPREAMBLE(_ix) (rt->rates[_ix].modulation == IEEE80211_RATE_CCK_2)
#define SHPREAMBLE_FLAG(_ix) (HAS_SHPREAMBLE(_ix) ? AR5K_SET_SHORT_PREAMBLE : 0)
#define HAS_SHPREAMBLE(_ix) \
(rt->rates[_ix].modulation == IEEE80211_RATE_SHORT_PREAMBLE)
#define SHPREAMBLE_FLAG(_ix) \
(HAS_SHPREAMBLE(_ix) ? AR5K_SET_SHORT_PREAMBLE : 0)
/****************\
TX DEFINITIONS
@@ -560,8 +563,8 @@ struct ath5k_desc {
* Used internaly in OpenHAL (ar5211.c/ar5212.c
* for reset_tx_queue). Also see struct struct ieee80211_channel.
*/
#define IS_CHAN_XR(_c) ((_c.val & CHANNEL_XR) != 0)
#define IS_CHAN_B(_c) ((_c.val & CHANNEL_B) != 0)
#define IS_CHAN_XR(_c) ((_c.hw_value & CHANNEL_XR) != 0)
#define IS_CHAN_B(_c) ((_c.hw_value & CHANNEL_B) != 0)
/*
* The following structure will be used to map 2GHz channels to
@@ -584,7 +587,7 @@ struct ath5k_athchan_2ghz {
/**
* struct ath5k_rate - rate structure
* @valid: is this a valid rate for the current mode
* @valid: is this a valid rate for rate control (remove)
* @modulation: respective mac80211 modulation
* @rate_kbps: rate in kbit/s
* @rate_code: hardware rate value, used in &struct ath5k_desc, on RX on
@@ -643,47 +646,48 @@ struct ath5k_rate_table {
/*
* Rate tables...
* TODO: CLEAN THIS !!!
*/
#define AR5K_RATES_11A { 8, { \
255, 255, 255, 255, 255, 255, 255, 255, 6, 4, 2, 0, \
7, 5, 3, 1, 255, 255, 255, 255, 255, 255, 255, 255, \
255, 255, 255, 255, 255, 255, 255, 255 }, { \
{ 1, IEEE80211_RATE_OFDM, 6000, 11, 140, 0 }, \
{ 1, IEEE80211_RATE_OFDM, 9000, 15, 18, 0 }, \
{ 1, IEEE80211_RATE_OFDM, 12000, 10, 152, 2 }, \
{ 1, IEEE80211_RATE_OFDM, 18000, 14, 36, 2 }, \
{ 1, IEEE80211_RATE_OFDM, 24000, 9, 176, 4 }, \
{ 1, IEEE80211_RATE_OFDM, 36000, 13, 72, 4 }, \
{ 1, IEEE80211_RATE_OFDM, 48000, 8, 96, 4 }, \
{ 1, IEEE80211_RATE_OFDM, 54000, 12, 108, 4 } } \
{ 1, 0, 6000, 11, 140, 0 }, \
{ 1, 0, 9000, 15, 18, 0 }, \
{ 1, 0, 12000, 10, 152, 2 }, \
{ 1, 0, 18000, 14, 36, 2 }, \
{ 1, 0, 24000, 9, 176, 4 }, \
{ 1, 0, 36000, 13, 72, 4 }, \
{ 1, 0, 48000, 8, 96, 4 }, \
{ 1, 0, 54000, 12, 108, 4 } } \
}
#define AR5K_RATES_11B { 4, { \
255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, \
255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, 255, \
3, 2, 1, 0, 255, 255, 255, 255 }, { \
{ 1, IEEE80211_RATE_CCK, 1000, 27, 130, 0 }, \
{ 1, IEEE80211_RATE_CCK_2, 2000, 26, 132, 1 }, \
{ 1, IEEE80211_RATE_CCK_2, 5500, 25, 139, 1 }, \
{ 1, IEEE80211_RATE_CCK_2, 11000, 24, 150, 1 } } \
{ 1, 0, 1000, 27, 130, 0 }, \
{ 1, IEEE80211_RATE_SHORT_PREAMBLE, 2000, 26, 132, 1 }, \
{ 1, IEEE80211_RATE_SHORT_PREAMBLE, 5500, 25, 139, 1 }, \
{ 1, IEEE80211_RATE_SHORT_PREAMBLE, 11000, 24, 150, 1 } } \
}
#define AR5K_RATES_11G { 12, { \
255, 255, 255, 255, 255, 255, 255, 255, 10, 8, 6, 4, \
11, 9, 7, 5, 255, 255, 255, 255, 255, 255, 255, 255, \
3, 2, 1, 0, 255, 255, 255, 255 }, { \
{ 1, IEEE80211_RATE_CCK, 1000, 27, 2, 0 }, \
{ 1, IEEE80211_RATE_CCK_2, 2000, 26, 4, 1 }, \
{ 1, IEEE80211_RATE_CCK_2, 5500, 25, 11, 1 }, \
{ 1, IEEE80211_RATE_CCK_2, 11000, 24, 22, 1 }, \
{ 0, IEEE80211_RATE_OFDM, 6000, 11, 12, 4 }, \
{ 0, IEEE80211_RATE_OFDM, 9000, 15, 18, 4 }, \
{ 1, IEEE80211_RATE_OFDM, 12000, 10, 24, 6 }, \
{ 1, IEEE80211_RATE_OFDM, 18000, 14, 36, 6 }, \
{ 1, IEEE80211_RATE_OFDM, 24000, 9, 48, 8 }, \
{ 1, IEEE80211_RATE_OFDM, 36000, 13, 72, 8 }, \
{ 1, IEEE80211_RATE_OFDM, 48000, 8, 96, 8 }, \
{ 1, IEEE80211_RATE_OFDM, 54000, 12, 108, 8 } } \
{ 1, 0, 1000, 27, 2, 0 }, \
{ 1, IEEE80211_RATE_SHORT_PREAMBLE, 2000, 26, 4, 1 }, \
{ 1, IEEE80211_RATE_SHORT_PREAMBLE, 5500, 25, 11, 1 }, \
{ 1, IEEE80211_RATE_SHORT_PREAMBLE, 11000, 24, 22, 1 }, \
{ 0, 0, 6000, 11, 12, 4 }, \
{ 0, 0, 9000, 15, 18, 4 }, \
{ 1, 0, 12000, 10, 24, 6 }, \
{ 1, 0, 18000, 14, 36, 6 }, \
{ 1, 0, 24000, 9, 48, 8 }, \
{ 1, 0, 36000, 13, 72, 8 }, \
{ 1, 0, 48000, 8, 96, 8 }, \
{ 1, 0, 54000, 12, 108, 8 } } \
}
#define AR5K_RATES_TURBO { 8, { \
@@ -708,14 +712,14 @@ struct ath5k_rate_table {
{ 1, MODULATION_XR, 1000, 2, 139, 1 }, \
{ 1, MODULATION_XR, 2000, 6, 150, 2 }, \
{ 1, MODULATION_XR, 3000, 1, 150, 3 }, \
{ 1, IEEE80211_RATE_OFDM, 6000, 11, 140, 4 }, \
{ 1, IEEE80211_RATE_OFDM, 9000, 15, 18, 4 }, \
{ 1, IEEE80211_RATE_OFDM, 12000, 10, 152, 6 }, \
{ 1, IEEE80211_RATE_OFDM, 18000, 14, 36, 6 }, \
{ 1, IEEE80211_RATE_OFDM, 24000, 9, 176, 8 }, \
{ 1, IEEE80211_RATE_OFDM, 36000, 13, 72, 8 }, \
{ 1, IEEE80211_RATE_OFDM, 48000, 8, 96, 8 }, \
{ 1, IEEE80211_RATE_OFDM, 54000, 12, 108, 8 } } \
{ 1, 0, 6000, 11, 140, 4 }, \
{ 1, 0, 9000, 15, 18, 4 }, \
{ 1, 0, 12000, 10, 152, 6 }, \
{ 1, 0, 18000, 14, 36, 6 }, \
{ 1, 0, 24000, 9, 176, 8 }, \
{ 1, 0, 36000, 13, 72, 8 }, \
{ 1, 0, 48000, 8, 96, 8 }, \
{ 1, 0, 54000, 12, 108, 8 } } \
}
/*
@@ -890,12 +894,14 @@ enum ath5k_capability_type {
AR5K_CAP_RFSILENT = 20, /* Supports RFsilent */
};
/* XXX: we *may* move cap_range stuff to struct wiphy */
struct ath5k_capabilities {
/*
* Supported PHY modes
* (ie. CHANNEL_A, CHANNEL_B, ...)
*/
DECLARE_BITMAP(cap_mode, NUM_DRIVER_MODES);
DECLARE_BITMAP(cap_mode, AR5K_MODE_MAX);
/*
* Frequency range (without regulation restrictions)
@@ -907,14 +913,6 @@ struct ath5k_capabilities {
u16 range_5ghz_max;
} cap_range;
/*
* Active regulation domain settings
*/
struct {
enum ath5k_regdom reg_current;
enum ath5k_regdom reg_hw;
} cap_regdomain;
/*
* Values stored in the EEPROM (some of them...)
*/
@@ -1129,8 +1127,6 @@ extern int ath5k_hw_set_gpio_input(struct ath5k_hw *ah, u32 gpio);
extern u32 ath5k_hw_get_gpio(struct ath5k_hw *ah, u32 gpio);
extern int ath5k_hw_set_gpio(struct ath5k_hw *ah, u32 gpio, u32 val);
extern void ath5k_hw_set_gpio_intr(struct ath5k_hw *ah, unsigned int gpio, u32 interrupt_level);
/* Regulatory Domain/Channels Setup */
extern u16 ath5k_get_regdomain(struct ath5k_hw *ah);
/* Misc functions */
extern int ath5k_hw_get_capability(struct ath5k_hw *ah, enum ath5k_capability_type cap_type, u32 capability, u32 *result);
drivers/net/wireless/ath5k/base.c
+241 -180
View File
File diff suppressed because it is too large Load Diff
drivers/net/wireless/ath5k/base.h
+13 -5
View File
@@ -83,7 +83,7 @@ struct ath5k_txq {
#if CHAN_DEBUG
#define ATH_CHAN_MAX (26+26+26+200+200)
#else
#define ATH_CHAN_MAX (14+14+14+252+20) /* XXX what's the max? */
#define ATH_CHAN_MAX (14+14+14+252+20)
#endif
/* Software Carrier, keeps track of the driver state
@@ -95,15 +95,22 @@ struct ath5k_softc {
struct ieee80211_tx_queue_stats tx_stats;
struct ieee80211_low_level_stats ll_stats;
struct ieee80211_hw *hw; /* IEEE 802.11 common */
struct ieee80211_hw_mode modes[NUM_DRIVER_MODES];
struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
struct ieee80211_channel channels[ATH_CHAN_MAX];
struct ieee80211_rate rates[AR5K_MAX_RATES * NUM_DRIVER_MODES];
struct ieee80211_rate rates[AR5K_MAX_RATES * IEEE80211_NUM_BANDS];
enum ieee80211_if_types opmode;
struct ath5k_hw *ah; /* Atheros HW */
#if ATH5K_DEBUG
struct ieee80211_supported_band *curband;
u8 a_rates;
u8 b_rates;
u8 g_rates;
u8 xr_rates;
#ifdef CONFIG_ATH5K_DEBUG
struct ath5k_dbg_info debug; /* debug info */
#endif
#endif /* CONFIG_ATH5K_DEBUG */
struct ath5k_buf *bufptr; /* allocated buffer ptr */
struct ath5k_desc *desc; /* TX/RX descriptors */
@@ -169,6 +176,7 @@ struct ath5k_softc {
unsigned int nexttbtt; /* next beacon time in TU */
struct timer_list calib_tim; /* calibration timer */
int power_level; /* Requested tx power in dbm */
};
#define ath5k_hw_hasbssidmask(_ah) \
drivers/net/wireless/ath5k/debug.c
+36 -19
View File
@@ -65,7 +65,7 @@ static unsigned int ath5k_debug;
module_param_named(debug, ath5k_debug, uint, 0);
#if ATH5K_DEBUG
#ifdef CONFIG_ATH5K_DEBUG
#include <linux/seq_file.h>
#include "reg.h"
@@ -340,7 +340,7 @@ static struct {
{ ATH5K_DEBUG_LED, "led", "LED mamagement" },
{ ATH5K_DEBUG_DUMP_RX, "dumprx", "print received skb content" },
{ ATH5K_DEBUG_DUMP_TX, "dumptx", "print transmit skb content" },
{ ATH5K_DEBUG_DUMPMODES, "dumpmodes", "dump modes" },
{ ATH5K_DEBUG_DUMPBANDS, "dumpbands", "dump bands" },
{ ATH5K_DEBUG_TRACE, "trace", "trace function calls" },
{ ATH5K_DEBUG_ANY, "all", "show all debug levels" },
};
@@ -452,30 +452,47 @@ ath5k_debug_finish_device(struct ath5k_softc *sc)
/* functions used in other places */
void
ath5k_debug_dump_modes(struct ath5k_softc *sc, struct ieee80211_hw_mode *modes)
ath5k_debug_dump_bands(struct ath5k_softc *sc)
{
unsigned int m, i;
unsigned int b, i;
if (likely(!(sc->debug.level & ATH5K_DEBUG_DUMPMODES)))
if (likely(!(sc->debug.level & ATH5K_DEBUG_DUMPBANDS)))
return;
for (m = 0; m < NUM_DRIVER_MODES; m++) {
printk(KERN_DEBUG "Mode %u: channels %d, rates %d\n", m,
modes[m].num_channels, modes[m].num_rates);
BUG_ON(!sc->sbands);
for (b = 0; b < IEEE80211_NUM_BANDS; b++) {
struct ieee80211_supported_band *band = &sc->sbands[b];
char bname[5];
switch (band->band) {
case IEEE80211_BAND_2GHZ:
strcpy(bname, "2 GHz");
break;
case IEEE80211_BAND_5GHZ:
strcpy(bname, "5 GHz");
break;
default:
printk(KERN_DEBUG "Band not supported: %d\n",
band->band);
return;
}
printk(KERN_DEBUG "Band %s: channels %d, rates %d\n", bname,
band->n_channels, band->n_bitrates);
printk(KERN_DEBUG " channels:\n");
for (i = 0; i < modes[m].num_channels; i++)
for (i = 0; i < band->n_channels; i++)
printk(KERN_DEBUG " %3d %d %.4x %.4x\n",
modes[m].channels[i].chan,
modes[m].channels[i].freq,
modes[m].channels[i].val,
modes[m].channels[i].flag);
ieee80211_frequency_to_channel(
band->channels[i].center_freq),
band->channels[i].center_freq,
band->channels[i].hw_value,
band->channels[i].flags);
printk(KERN_DEBUG " rates:\n");
for (i = 0; i < modes[m].num_rates; i++)
for (i = 0; i < band->n_bitrates; i++)
printk(KERN_DEBUG " %4d %.4x %.4x %.4x\n",
modes[m].rates[i].rate,
modes[m].rates[i].val,
modes[m].rates[i].flags,
modes[m].rates[i].val2);
band->bitrates[i].bitrate,
band->bitrates[i].hw_value,
band->bitrates[i].flags,
band->bitrates[i].hw_value_short);
}
}
@@ -548,4 +565,4 @@ ath5k_debug_printtxbuf(struct ath5k_softc *sc,
!done ? ' ' : (ds->ds_txstat.ts_status == 0) ? '*' : '!');
}
#endif /* if ATH5K_DEBUG */
#endif /* ifdef CONFIG_ATH5K_DEBUG */
drivers/net/wireless/ath5k/debug.h
+9 -14
View File
@@ -61,11 +61,6 @@
#ifndef _ATH5K_DEBUG_H
#define _ATH5K_DEBUG_H
/* set this to 1 for debugging output */
#ifndef ATH5K_DEBUG
#define ATH5K_DEBUG 0
#endif
struct ath5k_softc;
struct ath5k_hw;
struct ieee80211_hw_mode;
@@ -96,7 +91,7 @@ struct ath5k_dbg_info {
* @ATH5K_DEBUG_LED: led management
* @ATH5K_DEBUG_DUMP_RX: print received skb content
* @ATH5K_DEBUG_DUMP_TX: print transmit skb content
* @ATH5K_DEBUG_DUMPMODES: dump modes
* @ATH5K_DEBUG_DUMPBANDS: dump bands
* @ATH5K_DEBUG_TRACE: trace function calls
* @ATH5K_DEBUG_ANY: show at any debug level
*
@@ -118,12 +113,12 @@ enum ath5k_debug_level {
ATH5K_DEBUG_LED = 0x00000080,
ATH5K_DEBUG_DUMP_RX = 0x00000100,
ATH5K_DEBUG_DUMP_TX = 0x00000200,
ATH5K_DEBUG_DUMPMODES = 0x00000400,
ATH5K_DEBUG_DUMPBANDS = 0x00000400,
ATH5K_DEBUG_TRACE = 0x00001000,
ATH5K_DEBUG_ANY = 0xffffffff
};
#if ATH5K_DEBUG
#ifdef CONFIG_ATH5K_DEBUG
#define ATH5K_TRACE(_sc) do { \
if (unlikely((_sc)->debug.level & ATH5K_DEBUG_TRACE)) \
@@ -158,8 +153,7 @@ void
ath5k_debug_printrxbuffs(struct ath5k_softc *sc, struct ath5k_hw *ah);
void
ath5k_debug_dump_modes(struct ath5k_softc *sc,
struct ieee80211_hw_mode *modes);
ath5k_debug_dump_bands(struct ath5k_softc *sc);
void
ath5k_debug_dump_skb(struct ath5k_softc *sc,
@@ -171,7 +165,9 @@ ath5k_debug_printtxbuf(struct ath5k_softc *sc,
#else /* no debugging */
#define ATH5K_TRACE(_sc) /* empty */
#include <linux/compiler.h>
#define ATH5K_TRACE(_sc) typecheck(struct ath5k_softc *, (_sc))
static inline void __attribute__ ((format (printf, 3, 4)))
ATH5K_DBG(struct ath5k_softc *sc, unsigned int m, const char *fmt, ...) {}
@@ -196,8 +192,7 @@ static inline void
ath5k_debug_printrxbuffs(struct ath5k_softc *sc, struct ath5k_hw *ah) {}
static inline void
ath5k_debug_dump_modes(struct ath5k_softc *sc,
struct ieee80211_hw_mode *modes) {}
ath5k_debug_dump_bands(struct ath5k_softc *sc) {}
static inline void
ath5k_debug_dump_skb(struct ath5k_softc *sc,
@@ -207,6 +202,6 @@ static inline void
ath5k_debug_printtxbuf(struct ath5k_softc *sc,
struct ath5k_buf *bf, int done) {}
#endif /* if ATH5K_DEBUG */
#endif /* ifdef CONFIG_ATH5K_DEBUG */
#endif /* ifndef _ATH5K_DEBUG_H */
drivers/net/wireless/ath5k/hw.c
+47 -125
View File
@@ -140,9 +140,6 @@ struct ath5k_hw *ath5k_hw_attach(struct ath5k_softc *sc, u8 mac_version)
* HW information
*/
/* Get reg domain from eeprom */
ath5k_get_regdomain(ah);
ah->ah_op_mode = IEEE80211_IF_TYPE_STA;
ah->ah_radar.r_enabled = AR5K_TUNE_RADAR_ALERT;
ah->ah_turbo = false;
@@ -405,15 +402,15 @@ const struct ath5k_rate_table *ath5k_hw_get_rate_table(struct ath5k_hw *ah,
/* Get rate tables */
switch (mode) {
case MODE_IEEE80211A:
case AR5K_MODE_11A:
return &ath5k_rt_11a;
case MODE_ATHEROS_TURBO:
case AR5K_MODE_11A_TURBO:
return &ath5k_rt_turbo;
case MODE_IEEE80211B:
case AR5K_MODE_11B:
return &ath5k_rt_11b;
case MODE_IEEE80211G:
case AR5K_MODE_11G:
return &ath5k_rt_11g;
case MODE_ATHEROS_TURBOG:
case AR5K_MODE_11G_TURBO:
return &ath5k_rt_xr;
}
@@ -457,15 +454,15 @@ static inline int ath5k_hw_write_ofdm_timings(struct ath5k_hw *ah,
ds_coef_exp, ds_coef_man, clock;
if (!(ah->ah_version == AR5K_AR5212) ||
!(channel->val & CHANNEL_OFDM))
!(channel->hw_value & CHANNEL_OFDM))
BUG();
/* Seems there are two PLLs, one for baseband sampling and one
* for tuning. Tuning basebands are 40 MHz or 80MHz when in
* turbo. */
clock = channel->val & CHANNEL_TURBO ? 80 : 40;
clock = channel->hw_value & CHANNEL_TURBO ? 80 : 40;
coef_scaled = ((5 * (clock << 24)) / 2) /
channel->freq;
channel->center_freq;
for (coef_exp = 31; coef_exp > 0; coef_exp--)
if ((coef_scaled >> coef_exp) & 0x1)
@@ -492,8 +489,7 @@ static inline int ath5k_hw_write_ofdm_timings(struct ath5k_hw *ah,
* ath5k_hw_write_rate_duration - set rate duration during hw resets
*
* @ah: the &struct ath5k_hw
* @driver_mode: one of enum ieee80211_phymode or our one of our own
* vendor modes
* @mode: one of enum ath5k_driver_mode
*
* Write the rate duration table for the current mode upon hw reset. This
* is a helper for ath5k_hw_reset(). It seems all this is doing is setting
@@ -504,19 +500,20 @@ static inline int ath5k_hw_write_ofdm_timings(struct ath5k_hw *ah,
*
*/
static inline void ath5k_hw_write_rate_duration(struct ath5k_hw *ah,
unsigned int driver_mode)
unsigned int mode)
{
struct ath5k_softc *sc = ah->ah_sc;
const struct ath5k_rate_table *rt;
struct ieee80211_rate srate = {};
unsigned int i;
/* Get rate table for the current operating mode */
rt = ath5k_hw_get_rate_table(ah,
driver_mode);
rt = ath5k_hw_get_rate_table(ah, mode);
/* Write rate duration table */
for (i = 0; i < rt->rate_count; i++) {
const struct ath5k_rate *rate, *control_rate;
u32 reg;
u16 tx_time;
@@ -526,14 +523,16 @@ static inline void ath5k_hw_write_rate_duration(struct ath5k_hw *ah,
/* Set ACK timeout */
reg = AR5K_RATE_DUR(rate->rate_code);
srate.bitrate = control_rate->rate_kbps/100;
/* An ACK frame consists of 10 bytes. If you add the FCS,
* which ieee80211_generic_frame_duration() adds,
* its 14 bytes. Note we use the control rate and not the
* actual rate for this rate. See mac80211 tx.c
* ieee80211_duration() for a brief description of
* what rate we should choose to TX ACKs. */
tx_time = ieee80211_generic_frame_duration(sc->hw,
sc->vif, 10, control_rate->rate_kbps/100);
tx_time = le16_to_cpu(ieee80211_generic_frame_duration(sc->hw,
sc->vif, 10, &srate));
ath5k_hw_reg_write(ah, tx_time, reg);
@@ -567,7 +566,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode,
{
struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
u32 data, s_seq, s_ant, s_led[3];
unsigned int i, mode, freq, ee_mode, ant[2], driver_mode = -1;
unsigned int i, mode, freq, ee_mode, ant[2];
int ret;
ATH5K_TRACE(ah->ah_sc);
@@ -602,7 +601,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode,
/*Wakeup the device*/
ret = ath5k_hw_nic_wakeup(ah, channel->val, false);
ret = ath5k_hw_nic_wakeup(ah, channel->hw_value, false);
if (ret)
return ret;
@@ -624,37 +623,32 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode,
return -EINVAL;
}
switch (channel->val & CHANNEL_MODES) {
switch (channel->hw_value & CHANNEL_MODES) {
case CHANNEL_A:
mode = AR5K_INI_VAL_11A;
mode = AR5K_MODE_11A;
freq = AR5K_INI_RFGAIN_5GHZ;
ee_mode = AR5K_EEPROM_MODE_11A;
driver_mode = MODE_IEEE80211A;
break;
case CHANNEL_G:
mode = AR5K_INI_VAL_11G;
mode = AR5K_MODE_11G;
freq = AR5K_INI_RFGAIN_2GHZ;
ee_mode = AR5K_EEPROM_MODE_11G;
driver_mode = MODE_IEEE80211G;
break;
case CHANNEL_B:
mode = AR5K_INI_VAL_11B;
mode = AR5K_MODE_11B;
freq = AR5K_INI_RFGAIN_2GHZ;
ee_mode = AR5K_EEPROM_MODE_11B;
driver_mode = MODE_IEEE80211B;
break;
case CHANNEL_T:
mode = AR5K_INI_VAL_11A_TURBO;
mode = AR5K_MODE_11A_TURBO;
freq = AR5K_INI_RFGAIN_5GHZ;
ee_mode = AR5K_EEPROM_MODE_11A;
driver_mode = MODE_ATHEROS_TURBO;
break;
/*Is this ok on 5211 too ?*/
case CHANNEL_TG:
mode = AR5K_INI_VAL_11G_TURBO;
mode = AR5K_MODE_11G_TURBO;
freq = AR5K_INI_RFGAIN_2GHZ;
ee_mode = AR5K_EEPROM_MODE_11G;
driver_mode = MODE_ATHEROS_TURBOG;
break;
case CHANNEL_XR:
if (ah->ah_version == AR5K_AR5211) {
@@ -662,14 +656,13 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode,
"XR mode not available on 5211");
return -EINVAL;
}
mode = AR5K_INI_VAL_XR;
mode = AR5K_MODE_XR;
freq = AR5K_INI_RFGAIN_5GHZ;
ee_mode = AR5K_EEPROM_MODE_11A;
driver_mode = MODE_IEEE80211A;
break;
default:
ATH5K_ERR(ah->ah_sc,
"invalid channel: %d\n", channel->freq);
"invalid channel: %d\n", channel->center_freq);
return -EINVAL;
}
@@ -702,7 +695,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode,
if (ah->ah_version > AR5K_AR5211){ /* found on 5213+ */
ath5k_hw_reg_write(ah, 0x0002a002, AR5K_PHY(11));
if (channel->val == CHANNEL_G)
if (channel->hw_value == CHANNEL_G)
ath5k_hw_reg_write(ah, 0x00f80d80, AR5K_PHY(83)); /* 0x00fc0ec0 */
else
ath5k_hw_reg_write(ah, 0x00000000, AR5K_PHY(83));
@@ -720,7 +713,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode,
AR5K_SREV_RAD_5112A) {
ath5k_hw_reg_write(ah, AR5K_PHY_CCKTXCTL_WORLD,
AR5K_PHY_CCKTXCTL);
if (channel->val & CHANNEL_5GHZ)
if (channel->hw_value & CHANNEL_5GHZ)
data = 0xffb81020;
else
data = 0xffb80d20;
@@ -740,7 +733,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode,
* mac80211 are integrated */
if (ah->ah_version == AR5K_AR5212 &&
ah->ah_sc->vif != NULL)
ath5k_hw_write_rate_duration(ah, driver_mode);
ath5k_hw_write_rate_duration(ah, mode);
/*
* Write RF registers
@@ -756,7 +749,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode,
/* Write OFDM timings on 5212*/
if (ah->ah_version == AR5K_AR5212 &&
channel->val & CHANNEL_OFDM) {
channel->hw_value & CHANNEL_OFDM) {
ret = ath5k_hw_write_ofdm_timings(ah, channel);
if (ret)
return ret;
@@ -765,7 +758,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode,
/*Enable/disable 802.11b mode on 5111
(enable 2111 frequency converter + CCK)*/
if (ah->ah_radio == AR5K_RF5111) {
if (driver_mode == MODE_IEEE80211B)
if (mode == AR5K_MODE_11B)
AR5K_REG_ENABLE_BITS(ah, AR5K_TXCFG,
AR5K_TXCFG_B_MODE);
else
@@ -903,7 +896,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode,
if (ah->ah_version != AR5K_AR5210) {
data = ath5k_hw_reg_read(ah, AR5K_PHY_RX_DELAY) &
AR5K_PHY_RX_DELAY_M;
data = (channel->val & CHANNEL_CCK) ?
data = (channel->hw_value & CHANNEL_CCK) ?
((data << 2) / 22) : (data / 10);
udelay(100 + data);
@@ -920,11 +913,11 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode,
if (ath5k_hw_register_timeout(ah, AR5K_PHY_AGCCTL,
AR5K_PHY_AGCCTL_CAL, 0, false)) {
ATH5K_ERR(ah->ah_sc, "calibration timeout (%uMHz)\n",
channel->freq);
channel->center_freq);
return -EAGAIN;
}
ret = ath5k_hw_noise_floor_calibration(ah, channel->freq);
ret = ath5k_hw_noise_floor_calibration(ah, channel->center_freq);
if (ret)
return ret;
@@ -932,7 +925,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum ieee80211_if_types op_mode,
/* A and G modes can use QAM modulation which requires enabling
* I and Q calibration. Don't bother in B mode. */
if (!(driver_mode == MODE_IEEE80211B)) {
if (!(mode == AR5K_MODE_11B)) {
ah->ah_calibration = true;
AR5K_REG_WRITE_BITS(ah, AR5K_PHY_IQ,
AR5K_PHY_IQ_CAL_NUM_LOG_MAX, 15);
@@ -1590,9 +1583,10 @@ static int ath5k_hw_eeprom_read(struct ath5k_hw *ah, u32 offset, u16 *data)
/*
* Write to eeprom - currently disabled, use at your own risk
*/
#if 0
static int ath5k_hw_eeprom_write(struct ath5k_hw *ah, u32 offset, u16 data)
{
#if 0
u32 status, timeout;
ATH5K_TRACE(ah->ah_sc);
@@ -1634,10 +1628,11 @@ static int ath5k_hw_eeprom_write(struct ath5k_hw *ah, u32 offset, u16 data)
}
udelay(15);
}
#endif
ATH5K_ERR(ah->ah_sc, "EEPROM Write is disabled!");
return -EIO;
}
#endif
/*
* Translate binary channel representation in EEPROM to frequency
@@ -2042,50 +2037,6 @@ static int ath5k_eeprom_read_mac(struct ath5k_hw *ah, u8 *mac)
return 0;
}
/*
* Read/Write regulatory domain
*/
static bool ath5k_eeprom_regulation_domain(struct ath5k_hw *ah, bool write,
enum ath5k_regdom *regdomain)
{
u16 ee_regdomain;
/* Read current value */
if (write != true) {
ee_regdomain = ah->ah_capabilities.cap_eeprom.ee_regdomain;
*regdomain = ath5k_regdom_to_ieee(ee_regdomain);
return true;
}
ee_regdomain = ath5k_regdom_from_ieee(*regdomain);
/* Try to write a new value */
if (ah->ah_capabilities.cap_eeprom.ee_protect &
AR5K_EEPROM_PROTECT_WR_128_191)
return false;
if (ath5k_hw_eeprom_write(ah, AR5K_EEPROM_REG_DOMAIN, ee_regdomain)!=0)
return false;
ah->ah_capabilities.cap_eeprom.ee_regdomain = ee_regdomain;
return true;
}
/*
* Use the above to write a new regulatory domain
*/
int ath5k_hw_set_regdomain(struct ath5k_hw *ah, u16 regdomain)
{
enum ath5k_regdom ieee_regdomain;
ieee_regdomain = ath5k_regdom_to_ieee(regdomain);
if (ath5k_eeprom_regulation_domain(ah, true, &ieee_regdomain) == true)
return 0;
return -EIO;
}
/*
* Fill the capabilities struct
*/
@@ -2108,8 +2059,8 @@ static int ath5k_hw_get_capabilities(struct ath5k_hw *ah)
ah->ah_capabilities.cap_range.range_2ghz_max = 0;
/* Set supported modes */
__set_bit(MODE_IEEE80211A, ah->ah_capabilities.cap_mode);
__set_bit(MODE_ATHEROS_TURBO, ah->ah_capabilities.cap_mode);
__set_bit(AR5K_MODE_11A, ah->ah_capabilities.cap_mode);
__set_bit(AR5K_MODE_11A_TURBO, ah->ah_capabilities.cap_mode);
} else {
/*
* XXX The tranceiver supports frequencies from 4920 to 6100GHz
@@ -2131,12 +2082,12 @@ static int ath5k_hw_get_capabilities(struct ath5k_hw *ah)
ah->ah_capabilities.cap_range.range_5ghz_max = 6100;
/* Set supported modes */
__set_bit(MODE_IEEE80211A,
__set_bit(AR5K_MODE_11A,
ah->ah_capabilities.cap_mode);
__set_bit(MODE_ATHEROS_TURBO,
__set_bit(AR5K_MODE_11A_TURBO,
ah->ah_capabilities.cap_mode);
if (ah->ah_version == AR5K_AR5212)
__set_bit(MODE_ATHEROS_TURBOG,
__set_bit(AR5K_MODE_11G_TURBO,
ah->ah_capabilities.cap_mode);
}
@@ -2148,11 +2099,11 @@ static int ath5k_hw_get_capabilities(struct ath5k_hw *ah)
ah->ah_capabilities.cap_range.range_2ghz_max = 2732;
if (AR5K_EEPROM_HDR_11B(ee_header))
__set_bit(MODE_IEEE80211B,
__set_bit(AR5K_MODE_11B,
ah->ah_capabilities.cap_mode);
if (AR5K_EEPROM_HDR_11G(ee_header))
__set_bit(MODE_IEEE80211G,
__set_bit(AR5K_MODE_11G,
ah->ah_capabilities.cap_mode);
}
}
@@ -4248,35 +4199,6 @@ void ath5k_hw_set_gpio_intr(struct ath5k_hw *ah, unsigned int gpio,
}
/*********************************\
Regulatory Domain/Channels Setup
\*********************************/
u16 ath5k_get_regdomain(struct ath5k_hw *ah)
{
u16 regdomain;
enum ath5k_regdom ieee_regdomain;
#ifdef COUNTRYCODE
u16 code;
#endif
ath5k_eeprom_regulation_domain(ah, false, &ieee_regdomain);
ah->ah_capabilities.cap_regdomain.reg_hw = ieee_regdomain;
#ifdef COUNTRYCODE
/*
* Get the regulation domain by country code. This will ignore
* the settings found in the EEPROM.
*/
code = ieee80211_name2countrycode(COUNTRYCODE);
ieee_regdomain = ieee80211_countrycode2regdomain(code);
#endif
regdomain = ath5k_regdom_from_ieee(ieee_regdomain);
ah->ah_capabilities.cap_regdomain.reg_current = regdomain;
return regdomain;
}
/****************\
drivers/net/wireless/ath5k/initvals.c
+4 -2
View File
@@ -1317,8 +1317,10 @@ int ath5k_hw_write_initvals(struct ath5k_hw *ah, u8 mode, bool change_channel)
/* For AR5211 */
} else if (ah->ah_version == AR5K_AR5211) {
if(mode > 2){ /* AR5K_INI_VAL_11B */
ATH5K_ERR(ah->ah_sc,"unsupported channel mode: %d\n", mode);
/* AR5K_MODE_11B */
if (mode > 2) {
ATH5K_ERR(ah->ah_sc,
"unsupported channel mode: %d\n", mode);
return -EINVAL;
}
drivers/net/wireless/ath5k/phy.c
+46 -42
View File
@@ -1018,7 +1018,7 @@ static int ath5k_hw_rf5111_rfregs(struct ath5k_hw *ah,
int obdb = -1, bank = -1;
u32 ee_mode;
AR5K_ASSERT_ENTRY(mode, AR5K_INI_VAL_MAX);
AR5K_ASSERT_ENTRY(mode, AR5K_MODE_MAX);
rf = ah->ah_rf_banks;
@@ -1038,8 +1038,8 @@ static int ath5k_hw_rf5111_rfregs(struct ath5k_hw *ah,
}
/* Modify bank 0 */
if (channel->val & CHANNEL_2GHZ) {
if (channel->val & CHANNEL_CCK)
if (channel->hw_value & CHANNEL_2GHZ) {
if (channel->hw_value & CHANNEL_CCK)
ee_mode = AR5K_EEPROM_MODE_11B;
else
ee_mode = AR5K_EEPROM_MODE_11G;
@@ -1058,10 +1058,10 @@ static int ath5k_hw_rf5111_rfregs(struct ath5k_hw *ah,
} else {
/* For 11a, Turbo and XR */
ee_mode = AR5K_EEPROM_MODE_11A;
obdb = channel->freq >= 5725 ? 3 :
(channel->freq >= 5500 ? 2 :
(channel->freq >= 5260 ? 1 :
(channel->freq > 4000 ? 0 : -1)));
obdb = channel->center_freq >= 5725 ? 3 :
(channel->center_freq >= 5500 ? 2 :
(channel->center_freq >= 5260 ? 1 :
(channel->center_freq > 4000 ? 0 : -1)));
if (!ath5k_hw_rfregs_op(rf, ah->ah_offset[6],
ee->ee_pwd_84, 1, 51, 3, true))
@@ -1119,12 +1119,12 @@ static int ath5k_hw_rf5112_rfregs(struct ath5k_hw *ah,
int obdb = -1, bank = -1;
u32 ee_mode;
AR5K_ASSERT_ENTRY(mode, AR5K_INI_VAL_MAX);
AR5K_ASSERT_ENTRY(mode, AR5K_MODE_MAX);
rf = ah->ah_rf_banks;
if (ah->ah_radio_5ghz_revision >= AR5K_SREV_RAD_2112A
&& !test_bit(MODE_IEEE80211A, ah->ah_capabilities.cap_mode)){
&& !test_bit(AR5K_MODE_11A, ah->ah_capabilities.cap_mode)) {
rf_ini = rfregs_2112a;
rf_size = ARRAY_SIZE(rfregs_5112a);
if (mode < 2) {
@@ -1156,8 +1156,8 @@ static int ath5k_hw_rf5112_rfregs(struct ath5k_hw *ah,
}
/* Modify bank 6 */
if (channel->val & CHANNEL_2GHZ) {
if (channel->val & CHANNEL_OFDM)
if (channel->hw_value & CHANNEL_2GHZ) {
if (channel->hw_value & CHANNEL_OFDM)
ee_mode = AR5K_EEPROM_MODE_11G;
else
ee_mode = AR5K_EEPROM_MODE_11B;
@@ -1173,10 +1173,13 @@ static int ath5k_hw_rf5112_rfregs(struct ath5k_hw *ah,
} else {
/* For 11a, Turbo and XR */
ee_mode = AR5K_EEPROM_MODE_11A;
obdb = channel->freq >= 5725 ? 3 :
(channel->freq >= 5500 ? 2 :
(channel->freq >= 5260 ? 1 :
(channel->freq > 4000 ? 0 : -1)));
obdb = channel->center_freq >= 5725 ? 3 :
(channel->center_freq >= 5500 ? 2 :
(channel->center_freq >= 5260 ? 1 :
(channel->center_freq > 4000 ? 0 : -1)));
if (obdb == -1)
return -EINVAL;
if (!ath5k_hw_rfregs_op(rf, ah->ah_offset[6],
ee->ee_ob[ee_mode][obdb], 3, 279, 0, true))
@@ -1219,7 +1222,7 @@ static int ath5k_hw_rf5413_rfregs(struct ath5k_hw *ah,
unsigned int rf_size, i;
int bank = -1;
AR5K_ASSERT_ENTRY(mode, AR5K_INI_VAL_MAX);
AR5K_ASSERT_ENTRY(mode, AR5K_MODE_MAX);
rf = ah->ah_rf_banks;
@@ -1445,9 +1448,10 @@ static u32 ath5k_hw_rf5110_chan2athchan(struct ieee80211_channel *channel)
* newer chipsets like the AR5212A who have a completely
* different RF/PHY part.
*/
athchan = (ath5k_hw_bitswap((channel->chan - 24) / 2, 5) << 1) |
(1 << 6) | 0x1;
athchan = (ath5k_hw_bitswap(
(ieee80211_frequency_to_channel(
channel->center_freq) - 24) / 2, 5)
<< 1) | (1 << 6) | 0x1;
return athchan;
}
@@ -1506,7 +1510,8 @@ static int ath5k_hw_rf5111_channel(struct ath5k_hw *ah,
struct ieee80211_channel *channel)
{
struct ath5k_athchan_2ghz ath5k_channel_2ghz;
unsigned int ath5k_channel = channel->chan;
unsigned int ath5k_channel =
ieee80211_frequency_to_channel(channel->center_freq);
u32 data0, data1, clock;
int ret;
@@ -1515,10 +1520,11 @@ static int ath5k_hw_rf5111_channel(struct ath5k_hw *ah,
*/
data0 = data1 = 0;
if (channel->val & CHANNEL_2GHZ) {
if (channel->hw_value & CHANNEL_2GHZ) {
/* Map 2GHz channel to 5GHz Atheros channel ID */
ret = ath5k_hw_rf5111_chan2athchan(channel->chan,
&ath5k_channel_2ghz);
ret = ath5k_hw_rf5111_chan2athchan(
ieee80211_frequency_to_channel(channel->center_freq),
&ath5k_channel_2ghz);
if (ret)
return ret;
@@ -1555,7 +1561,7 @@ static int ath5k_hw_rf5112_channel(struct ath5k_hw *ah,
u16 c;
data = data0 = data1 = data2 = 0;
c = channel->freq;
c = channel->center_freq;
/*
* Set the channel on the RF5112 or newer
@@ -1599,19 +1605,17 @@ static int ath5k_hw_rf5112_channel(struct ath5k_hw *ah,
int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel)
{
int ret;
/*
* Check bounds supported by the PHY
* (don't care about regulation restrictions at this point)
*/
if ((channel->freq < ah->ah_capabilities.cap_range.range_2ghz_min ||
channel->freq > ah->ah_capabilities.cap_range.range_2ghz_max) &&
(channel->freq < ah->ah_capabilities.cap_range.range_5ghz_min ||
channel->freq > ah->ah_capabilities.cap_range.range_5ghz_max)) {
* Check bounds supported by the PHY (we don't care about regultory
* restrictions at this point). Note: hw_value already has the band
* (CHANNEL_2GHZ, or CHANNEL_5GHZ) so we inform ath5k_channel_ok()
* of the band by that */
if (!ath5k_channel_ok(ah, channel->center_freq, channel->hw_value)) {
ATH5K_ERR(ah->ah_sc,
"channel out of supported range (%u MHz)\n",
channel->freq);
return -EINVAL;
"channel frequency (%u MHz) out of supported "
"band range\n",
channel->center_freq);
return -EINVAL;
}
/*
@@ -1632,9 +1636,9 @@ int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel)
if (ret)
return ret;
ah->ah_current_channel.freq = channel->freq;
ah->ah_current_channel.val = channel->val;
ah->ah_turbo = channel->val == CHANNEL_T ? true : false;
ah->ah_current_channel.center_freq = channel->center_freq;
ah->ah_current_channel.hw_value = channel->hw_value;
ah->ah_turbo = channel->hw_value == CHANNEL_T ? true : false;
return 0;
}
@@ -1797,11 +1801,11 @@ static int ath5k_hw_rf5110_calibrate(struct ath5k_hw *ah,
if (ret) {
ATH5K_ERR(ah->ah_sc, "calibration timeout (%uMHz)\n",
channel->freq);
channel->center_freq);
return ret;
}
ret = ath5k_hw_noise_floor_calibration(ah, channel->freq);
ret = ath5k_hw_noise_floor_calibration(ah, channel->center_freq);
if (ret)
return ret;
@@ -1848,10 +1852,10 @@ static int ath5k_hw_rf511x_calibrate(struct ath5k_hw *ah,
((u32)q_coff) | ((u32)i_coff << AR5K_PHY_IQ_CORR_Q_I_COFF_S));
done:
ath5k_hw_noise_floor_calibration(ah, channel->freq);
ath5k_hw_noise_floor_calibration(ah, channel->center_freq);
/* Request RF gain */
if (channel->val & CHANNEL_5GHZ) {
if (channel->hw_value & CHANNEL_5GHZ) {
ath5k_hw_reg_write(ah, AR5K_REG_SM(ah->ah_txpower.txp_max,
AR5K_PHY_PAPD_PROBE_TXPOWER) |
AR5K_PHY_PAPD_PROBE_TX_NEXT, AR5K_PHY_PAPD_PROBE);
drivers/net/wireless/atmel.c
+3 -2
View File
@@ -66,6 +66,7 @@
#include <linux/device.h>
#include <linux/moduleparam.h>
#include <linux/firmware.h>
#include <linux/jiffies.h>
#include <net/ieee80211.h>
#include "atmel.h"
@@ -516,7 +517,7 @@ struct atmel_private {
SITE_SURVEY_IN_PROGRESS,
SITE_SURVEY_COMPLETED
} site_survey_state;
time_t last_survey;
unsigned long last_survey;
int station_was_associated, station_is_associated;
int fast_scan;
@@ -2283,7 +2284,7 @@ static int atmel_set_scan(struct net_device *dev,
return -EAGAIN;
/* Timeout old surveys. */
if ((jiffies - priv->last_survey) > (20 * HZ))
if (time_after(jiffies, priv->last_survey + 20 * HZ))
priv->site_survey_state = SITE_SURVEY_IDLE;
priv->last_survey = jiffies;
drivers/net/wireless/b43/b43.h
+41 -38
View File
@@ -144,7 +144,8 @@ enum {
#define B43_SHM_SH_PHYTYPE 0x0052 /* PHY type */
#define B43_SHM_SH_ANTSWAP 0x005C /* Antenna swap threshold */
#define B43_SHM_SH_HOSTFLO 0x005E /* Hostflags for ucode options (low) */
#define B43_SHM_SH_HOSTFHI 0x0060 /* Hostflags for ucode options (high) */
#define B43_SHM_SH_HOSTFMI 0x0060 /* Hostflags for ucode options (middle) */
#define B43_SHM_SH_HOSTFHI 0x0062 /* Hostflags for ucode options (high) */
#define B43_SHM_SH_RFATT 0x0064 /* Current radio attenuation value */
#define B43_SHM_SH_RADAR 0x0066 /* Radar register */
#define B43_SHM_SH_PHYTXNOI 0x006E /* PHY noise directly after TX (lower 8bit only) */
@@ -232,31 +233,41 @@ enum {
#define B43_MMIO_RADIO_HWENABLED_LO_MASK (1 << 4)
/* HostFlags. See b43_hf_read/write() */
#define B43_HF_ANTDIVHELP 0x00000001 /* ucode antenna div helper */
#define B43_HF_SYMW 0x00000002 /* G-PHY SYM workaround */
#define B43_HF_RXPULLW 0x00000004 /* RX pullup workaround */
#define B43_HF_CCKBOOST 0x00000008 /* 4dB CCK power boost (exclusive with OFDM boost) */
#define B43_HF_BTCOEX 0x00000010 /* Bluetooth coexistance */
#define B43_HF_GDCW 0x00000020 /* G-PHY DV canceller filter bw workaround */
#define B43_HF_OFDMPABOOST 0x00000040 /* Enable PA gain boost for OFDM */
#define B43_HF_ACPR 0x00000080 /* Disable for Japan, channel 14 */
#define B43_HF_EDCF 0x00000100 /* on if WME and MAC suspended */
#define B43_HF_TSSIRPSMW 0x00000200 /* TSSI reset PSM ucode workaround */
#define B43_HF_DSCRQ 0x00000400 /* Disable slow clock request in ucode */
#define B43_HF_ACIW 0x00000800 /* ACI workaround: shift bits by 2 on PHY CRS */
#define B43_HF_2060W 0x00001000 /* 2060 radio workaround */
#define B43_HF_RADARW 0x00002000 /* Radar workaround */
#define B43_HF_USEDEFKEYS 0x00004000 /* Enable use of default keys */
#define B43_HF_BT4PRIOCOEX 0x00010000 /* Bluetooth 2-priority coexistance */
#define B43_HF_FWKUP 0x00020000 /* Fast wake-up ucode */
#define B43_HF_VCORECALC 0x00040000 /* Force VCO recalculation when powering up synthpu */
#define B43_HF_PCISCW 0x00080000 /* PCI slow clock workaround */
#define B43_HF_4318TSSI 0x00200000 /* 4318 TSSI */
#define B43_HF_FBCMCFIFO 0x00400000 /* Flush bcast/mcast FIFO immediately */
#define B43_HF_HWPCTL 0x00800000 /* Enable hardwarre power control */
#define B43_HF_BTCOEXALT 0x01000000 /* Bluetooth coexistance in alternate pins */
#define B43_HF_TXBTCHECK 0x02000000 /* Bluetooth check during transmission */
#define B43_HF_SKCFPUP 0x04000000 /* Skip CFP update */
#define B43_HF_ANTDIVHELP 0x000000000001ULL /* ucode antenna div helper */
#define B43_HF_SYMW 0x000000000002ULL /* G-PHY SYM workaround */
#define B43_HF_RXPULLW 0x000000000004ULL /* RX pullup workaround */
#define B43_HF_CCKBOOST 0x000000000008ULL /* 4dB CCK power boost (exclusive with OFDM boost) */
#define B43_HF_BTCOEX 0x000000000010ULL /* Bluetooth coexistance */
#define B43_HF_GDCW 0x000000000020ULL /* G-PHY DC canceller filter bw workaround */
#define B43_HF_OFDMPABOOST 0x000000000040ULL /* Enable PA gain boost for OFDM */
#define B43_HF_ACPR 0x000000000080ULL /* Disable for Japan, channel 14 */
#define B43_HF_EDCF 0x000000000100ULL /* on if WME and MAC suspended */
#define B43_HF_TSSIRPSMW 0x000000000200ULL /* TSSI reset PSM ucode workaround */
#define B43_HF_20IN40IQW 0x000000000200ULL /* 20 in 40 MHz I/Q workaround (rev >= 13 only) */
#define B43_HF_DSCRQ 0x000000000400ULL /* Disable slow clock request in ucode */
#define B43_HF_ACIW 0x000000000800ULL /* ACI workaround: shift bits by 2 on PHY CRS */
#define B43_HF_2060W 0x000000001000ULL /* 2060 radio workaround */
#define B43_HF_RADARW 0x000000002000ULL /* Radar workaround */
#define B43_HF_USEDEFKEYS 0x000000004000ULL /* Enable use of default keys */
#define B43_HF_AFTERBURNER 0x000000008000ULL /* Afterburner enabled */
#define B43_HF_BT4PRIOCOEX 0x000000010000ULL /* Bluetooth 4-priority coexistance */
#define B43_HF_FWKUP 0x000000020000ULL /* Fast wake-up ucode */
#define B43_HF_VCORECALC 0x000000040000ULL /* Force VCO recalculation when powering up synthpu */
#define B43_HF_PCISCW 0x000000080000ULL /* PCI slow clock workaround */
#define B43_HF_4318TSSI 0x000000200000ULL /* 4318 TSSI */
#define B43_HF_FBCMCFIFO 0x000000400000ULL /* Flush bcast/mcast FIFO immediately */
#define B43_HF_HWPCTL 0x000000800000ULL /* Enable hardwarre power control */
#define B43_HF_BTCOEXALT 0x000001000000ULL /* Bluetooth coexistance in alternate pins */
#define B43_HF_TXBTCHECK 0x000002000000ULL /* Bluetooth check during transmission */
#define B43_HF_SKCFPUP 0x000004000000ULL /* Skip CFP update */
#define B43_HF_N40W 0x000008000000ULL /* N PHY 40 MHz workaround (rev >= 13 only) */
#define B43_HF_ANTSEL 0x000020000000ULL /* Antenna selection (for testing antenna div.) */
#define B43_HF_BT3COEXT 0x000020000000ULL /* Bluetooth 3-wire coexistence (rev >= 13 only) */
#define B43_HF_BTCANT 0x000040000000ULL /* Bluetooth coexistence (antenna mode) (rev >= 13 only) */
#define B43_HF_ANTSELEN 0x000100000000ULL /* Antenna selection enabled (rev >= 13 only) */
#define B43_HF_ANTSELMODE 0x000200000000ULL /* Antenna selection mode (rev >= 13 only) */
#define B43_HF_MLADVW 0x001000000000ULL /* N PHY ML ADV workaround (rev >= 13 only) */
#define B43_HF_PR45960W 0x080000000000ULL /* PR 45960 workaround (rev >= 13 only) */
/* MacFilter offsets. */
#define B43_MACFILTER_SELF 0x0000
@@ -458,20 +469,13 @@ struct b43_iv {
} __attribute__((__packed__));
#define B43_PHYMODE(phytype) (1 << (phytype))
#define B43_PHYMODE_A B43_PHYMODE(B43_PHYTYPE_A)
#define B43_PHYMODE_B B43_PHYMODE(B43_PHYTYPE_B)
#define B43_PHYMODE_G B43_PHYMODE(B43_PHYTYPE_G)
struct b43_phy {
/* Possible PHYMODEs on this PHY */
u8 possible_phymodes;
/* Band support flags. */
bool supports_2ghz;
bool supports_5ghz;
/* GMODE bit enabled? */
bool gmode;
/* Possible ieee80211 subsystem hwmodes for this PHY.
* Which mode is selected, depends on thr GMODE enabled bit */
#define B43_MAX_PHYHWMODES 2
struct ieee80211_hw_mode hwmodes[B43_MAX_PHYHWMODES];
/* Analog Type */
u8 analog;
@@ -727,7 +731,6 @@ struct b43_wldev {
bool bad_frames_preempt; /* Use "Bad Frames Preemption" (default off) */
bool dfq_valid; /* Directed frame queue valid (IBSS PS mode, ATIM) */
bool short_preamble; /* TRUE, if short preamble is enabled. */
bool short_slot; /* TRUE, if short slot timing is enabled. */
bool radio_hw_enable; /* saved state of radio hardware enabled state */
bool suspend_in_progress; /* TRUE, if we are in a suspend/resume cycle */
drivers/net/wireless/b43/main.c
+253 -173
View File
File diff suppressed because it is too large Load Diff
drivers/net/wireless/b43/main.h
+2 -2
View File
@@ -95,8 +95,8 @@ u16 b43_shm_read16(struct b43_wldev *dev, u16 routing, u16 offset);
void b43_shm_write32(struct b43_wldev *dev, u16 routing, u16 offset, u32 value);
void b43_shm_write16(struct b43_wldev *dev, u16 routing, u16 offset, u16 value);
u32 b43_hf_read(struct b43_wldev *dev);
void b43_hf_write(struct b43_wldev *dev, u32 value);
u64 b43_hf_read(struct b43_wldev *dev);
void b43_hf_write(struct b43_wldev *dev, u64 value);
void b43_dummy_transmission(struct b43_wldev *dev);
drivers/net/wireless/b43/sysfs.c
+1 -88
View File
@@ -47,29 +47,6 @@ static int get_integer(const char *buf, size_t count)
return ret;
}
static int get_boolean(const char *buf, size_t count)
{
if (count != 0) {
if (buf[0] == '1')
return 1;
if (buf[0] == '0')
return 0;
if (count >= 4 && memcmp(buf, "true", 4) == 0)
return 1;
if (count >= 5 && memcmp(buf, "false", 5) == 0)
return 0;
if (count >= 3 && memcmp(buf, "yes", 3) == 0)
return 1;
if (count >= 2 && memcmp(buf, "no", 2) == 0)
return 0;
if (count >= 2 && memcmp(buf, "on", 2) == 0)
return 1;
if (count >= 3 && memcmp(buf, "off", 3) == 0)
return 0;
}
return -EINVAL;
}
static ssize_t b43_attr_interfmode_show(struct device *dev,
struct device_attribute *attr,
char *buf)
@@ -155,82 +132,18 @@ static ssize_t b43_attr_interfmode_store(struct device *dev,
static DEVICE_ATTR(interference, 0644,
b43_attr_interfmode_show, b43_attr_interfmode_store);
static ssize_t b43_attr_preamble_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
struct b43_wldev *wldev = dev_to_b43_wldev(dev);
ssize_t count;
if (!capable(CAP_NET_ADMIN))
return -EPERM;
mutex_lock(&wldev->wl->mutex);
if (wldev->short_preamble)
count =
snprintf(buf, PAGE_SIZE, "1 (Short Preamble enabled)\n");
else
count =
snprintf(buf, PAGE_SIZE, "0 (Short Preamble disabled)\n");
mutex_unlock(&wldev->wl->mutex);
return count;
}
static ssize_t b43_attr_preamble_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
struct b43_wldev *wldev = dev_to_b43_wldev(dev);
unsigned long flags;
int value;
if (!capable(CAP_NET_ADMIN))
return -EPERM;
value = get_boolean(buf, count);
if (value < 0)
return value;
mutex_lock(&wldev->wl->mutex);
spin_lock_irqsave(&wldev->wl->irq_lock, flags);
wldev->short_preamble = !!value;
spin_unlock_irqrestore(&wldev->wl->irq_lock, flags);
mutex_unlock(&wldev->wl->mutex);
return count;
}
static DEVICE_ATTR(shortpreamble, 0644,
b43_attr_preamble_show, b43_attr_preamble_store);
int b43_sysfs_register(struct b43_wldev *wldev)
{
struct device *dev = wldev->dev->dev;
int err;
B43_WARN_ON(b43_status(wldev) != B43_STAT_INITIALIZED);
err = device_create_file(dev, &dev_attr_interference);
if (err)
goto out;
err = device_create_file(dev, &dev_attr_shortpreamble);
if (err)
goto err_remove_interfmode;
out:
return err;
err_remove_interfmode:
device_remove_file(dev, &dev_attr_interference);
goto out;
return device_create_file(dev, &dev_attr_interference);
}
void b43_sysfs_unregister(struct b43_wldev *wldev)
{
struct device *dev = wldev->dev->dev;
device_remove_file(dev, &dev_attr_shortpreamble);
device_remove_file(dev, &dev_attr_interference);
}
drivers/net/wireless/b43/xmit.c
+53 -42
View File
@@ -32,46 +32,48 @@
#include "dma.h"
/* Extract the bitrate out of a CCK PLCP header. */
static u8 b43_plcp_get_bitrate_cck(struct b43_plcp_hdr6 *plcp)
/* Extract the bitrate index out of a CCK PLCP header. */
static int b43_plcp_get_bitrate_idx_cck(struct b43_plcp_hdr6 *plcp)
{
switch (plcp->raw[0]) {
case 0x0A:
return B43_CCK_RATE_1MB;
return 0;
case 0x14:
return B43_CCK_RATE_2MB;
return 1;
case 0x37:
return B43_CCK_RATE_5MB;
return 2;
case 0x6E:
return B43_CCK_RATE_11MB;
return 3;
}
B43_WARN_ON(1);
return 0;
return -1;
}
/* Extract the bitrate out of an OFDM PLCP header. */
static u8 b43_plcp_get_bitrate_ofdm(struct b43_plcp_hdr6 *plcp)
/* Extract the bitrate index out of an OFDM PLCP header. */
static u8 b43_plcp_get_bitrate_idx_ofdm(struct b43_plcp_hdr6 *plcp, bool aphy)
{
int base = aphy ? 0 : 4;
switch (plcp->raw[0] & 0xF) {
case 0xB:
return B43_OFDM_RATE_6MB;
return base + 0;
case 0xF:
return B43_OFDM_RATE_9MB;
return base + 1;
case 0xA:
return B43_OFDM_RATE_12MB;
return base + 2;
case 0xE:
return B43_OFDM_RATE_18MB;
return base + 3;
case 0x9:
return B43_OFDM_RATE_24MB;
return base + 4;
case 0xD:
return B43_OFDM_RATE_36MB;
return base + 5;
case 0x8:
return B43_OFDM_RATE_48MB;
return base + 6;
case 0xC:
return B43_OFDM_RATE_54MB;
return base + 7;
}
B43_WARN_ON(1);
return 0;
return -1;
}
u8 b43_plcp_get_ratecode_cck(const u8 bitrate)
@@ -191,6 +193,7 @@ int b43_generate_txhdr(struct b43_wldev *dev,
(const struct ieee80211_hdr *)fragment_data;
int use_encryption = (!(txctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT));
u16 fctl = le16_to_cpu(wlhdr->frame_control);
struct ieee80211_rate *fbrate;
u8 rate, rate_fb;
int rate_ofdm, rate_fb_ofdm;
unsigned int plcp_fragment_len;
@@ -200,9 +203,11 @@ int b43_generate_txhdr(struct b43_wldev *dev,
memset(txhdr, 0, sizeof(*txhdr));
rate = txctl->tx_rate;
WARN_ON(!txctl->tx_rate);
rate = txctl->tx_rate ? txctl->tx_rate->hw_value : B43_CCK_RATE_1MB;
rate_ofdm = b43_is_ofdm_rate(rate);
rate_fb = (txctl->alt_retry_rate == -1) ? rate : txctl->alt_retry_rate;
fbrate = txctl->alt_retry_rate ? : txctl->tx_rate;
rate_fb = fbrate->hw_value;
rate_fb_ofdm = b43_is_ofdm_rate(rate_fb);
if (rate_ofdm)
@@ -221,11 +226,10 @@ int b43_generate_txhdr(struct b43_wldev *dev,
* use the original dur_id field. */
txhdr->dur_fb = wlhdr->duration_id;
} else {
int fbrate_base100kbps = B43_RATE_TO_BASE100KBPS(rate_fb);
txhdr->dur_fb = ieee80211_generic_frame_duration(dev->wl->hw,
txctl->vif,
fragment_len,
fbrate_base100kbps);
fbrate);
}
plcp_fragment_len = fragment_len + FCS_LEN;
@@ -287,7 +291,7 @@ int b43_generate_txhdr(struct b43_wldev *dev,
phy_ctl |= B43_TXH_PHY_ENC_OFDM;
else
phy_ctl |= B43_TXH_PHY_ENC_CCK;
if (dev->short_preamble)
if (txctl->flags & IEEE80211_TXCTL_SHORT_PREAMBLE)
phy_ctl |= B43_TXH_PHY_SHORTPRMBL;
switch (b43_ieee80211_antenna_sanitize(dev, txctl->antenna_sel_tx)) {
@@ -332,7 +336,8 @@ int b43_generate_txhdr(struct b43_wldev *dev,
int rts_rate_ofdm, rts_rate_fb_ofdm;
struct b43_plcp_hdr6 *plcp;
rts_rate = txctl->rts_cts_rate;
WARN_ON(!txctl->rts_cts_rate);
rts_rate = txctl->rts_cts_rate ? txctl->rts_cts_rate->hw_value : B43_CCK_RATE_1MB;
rts_rate_ofdm = b43_is_ofdm_rate(rts_rate);
rts_rate_fb = b43_calc_fallback_rate(rts_rate);
rts_rate_fb_ofdm = b43_is_ofdm_rate(rts_rate_fb);
@@ -506,6 +511,7 @@ void b43_rx(struct b43_wldev *dev, struct sk_buff *skb, const void *_rxhdr)
u16 phystat0, phystat3, chanstat, mactime;
u32 macstat;
u16 chanid;
u16 phytype;
u8 jssi;
int padding;
@@ -518,6 +524,7 @@ void b43_rx(struct b43_wldev *dev, struct sk_buff *skb, const void *_rxhdr)
macstat = le32_to_cpu(rxhdr->mac_status);
mactime = le16_to_cpu(rxhdr->mac_time);
chanstat = le16_to_cpu(rxhdr->channel);
phytype = chanstat & B43_RX_CHAN_PHYTYPE;
if (macstat & B43_RX_MAC_FCSERR)
dev->wl->ieee_stats.dot11FCSErrorCount++;
@@ -575,18 +582,23 @@ void b43_rx(struct b43_wldev *dev, struct sk_buff *skb, const void *_rxhdr)
/* the next line looks wrong, but is what mac80211 wants */
status.signal = (jssi * 100) / B43_RX_MAX_SSI;
if (phystat0 & B43_RX_PHYST0_OFDM)
status.rate = b43_plcp_get_bitrate_ofdm(plcp);
status.rate_idx = b43_plcp_get_bitrate_idx_ofdm(plcp,
phytype == B43_PHYTYPE_A);
else
status.rate = b43_plcp_get_bitrate_cck(plcp);
status.rate_idx = b43_plcp_get_bitrate_idx_cck(plcp);
status.antenna = !!(phystat0 & B43_RX_PHYST0_ANT);
/*
* If monitors are present get full 64-bit timestamp. This
* code assumes we get to process the packet within 16 bits
* of timestamp, i.e. about 65 milliseconds after the PHY
* received the first symbol.
* All frames on monitor interfaces and beacons always need a full
* 64-bit timestamp. Monitor interfaces need it for diagnostic
* purposes and beacons for IBSS merging.
* This code assumes we get to process the packet within 16 bits
* of timestamp, i.e. about 65 milliseconds after the PHY received
* the first symbol.
*/
if (dev->wl->radiotap_enabled) {
if (((fctl & (IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE))
== (IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_BEACON)) ||
dev->wl->radiotap_enabled) {
u16 low_mactime_now;
b43_tsf_read(dev, &status.mactime);
@@ -601,29 +613,28 @@ void b43_rx(struct b43_wldev *dev, struct sk_buff *skb, const void *_rxhdr)
chanid = (chanstat & B43_RX_CHAN_ID) >> B43_RX_CHAN_ID_SHIFT;
switch (chanstat & B43_RX_CHAN_PHYTYPE) {
case B43_PHYTYPE_A:
status.phymode = MODE_IEEE80211A;
status.band = IEEE80211_BAND_5GHZ;
B43_WARN_ON(1);
/* FIXME: We don't really know which value the "chanid" contains.
* So the following assignment might be wrong. */
status.channel = chanid;
status.freq = b43_channel_to_freq_5ghz(status.channel);
status.freq = b43_channel_to_freq_5ghz(chanid);
break;
case B43_PHYTYPE_G:
status.phymode = MODE_IEEE80211G;
status.band = IEEE80211_BAND_2GHZ;
/* chanid is the radio channel cookie value as used
* to tune the radio. */
status.freq = chanid + 2400;
status.channel = b43_freq_to_channel_2ghz(status.freq);
break;
case B43_PHYTYPE_N:
status.phymode = 0xDEAD /*FIXME MODE_IEEE80211N*/;
/* chanid is the SHM channel cookie. Which is the plain
* channel number in b43. */
status.channel = chanid;
if (chanstat & B43_RX_CHAN_5GHZ)
status.freq = b43_freq_to_channel_5ghz(status.freq);
else
status.freq = b43_freq_to_channel_2ghz(status.freq);
if (chanstat & B43_RX_CHAN_5GHZ) {
status.band = IEEE80211_BAND_5GHZ;
status.freq = b43_freq_to_channel_5ghz(chanid);
} else {
status.band = IEEE80211_BAND_2GHZ;
status.freq = b43_freq_to_channel_2ghz(chanid);
}
break;
default:
B43_WARN_ON(1);
drivers/net/wireless/b43legacy/b43legacy.h
+26 -20
View File
@@ -130,13 +130,19 @@
#define B43legacy_SHM_SH_HOSTFHI 0x0060 /* Hostflags ucode opts (high) */
/* SHM_SHARED crypto engine */
#define B43legacy_SHM_SH_KEYIDXBLOCK 0x05D4 /* Key index/algorithm block */
/* SHM_SHARED beacon variables */
/* SHM_SHARED beacon/AP variables */
#define B43legacy_SHM_SH_DTIMP 0x0012 /* DTIM period */
#define B43legacy_SHM_SH_BTL0 0x0018 /* Beacon template length 0 */
#define B43legacy_SHM_SH_BTL1 0x001A /* Beacon template length 1 */
#define B43legacy_SHM_SH_BTSFOFF 0x001C /* Beacon TSF offset */
#define B43legacy_SHM_SH_TIMPOS 0x001E /* TIM position in beacon */
#define B43legacy_SHM_SH_BEACPHYCTL 0x0054 /* Beacon PHY TX control word */
/* SHM_SHARED ACK/CTS control */
#define B43legacy_SHM_SH_ACKCTSPHYCTL 0x0022 /* ACK/CTS PHY control word */
/* SHM_SHARED probe response variables */
#define B43legacy_SHM_SH_PRPHYCTL 0x0188 /* Probe Resp PHY TX control */
#define B43legacy_SHM_SH_PRTLEN 0x004A /* Probe Response template length */
#define B43legacy_SHM_SH_PRMAXTIME 0x0074 /* Probe Response max time */
#define B43legacy_SHM_SH_PRPHYCTL 0x0188 /* Probe Resp PHY TX control */
/* SHM_SHARED rate tables */
/* SHM_SHARED microcode soft registers */
#define B43legacy_SHM_SH_UCODEREV 0x0000 /* Microcode revision */
@@ -199,6 +205,13 @@
#define B43legacy_MACCTL_TBTTHOLD 0x10000000 /* TBTT Hold */
#define B43legacy_MACCTL_GMODE 0x80000000 /* G Mode */
/* MAC Command bitfield */
#define B43legacy_MACCMD_BEACON0_VALID 0x00000001 /* Beacon 0 in template RAM is busy/valid */
#define B43legacy_MACCMD_BEACON1_VALID 0x00000002 /* Beacon 1 in template RAM is busy/valid */
#define B43legacy_MACCMD_DFQ_VALID 0x00000004 /* Directed frame queue valid (IBSS PS mode, ATIM) */
#define B43legacy_MACCMD_CCA 0x00000008 /* Clear channel assessment */
#define B43legacy_MACCMD_BGNOISE 0x00000010 /* Background noise */
/* 802.11 core specific TM State Low flags */
#define B43legacy_TMSLOW_GMODE 0x20000000 /* G Mode Enable */
#define B43legacy_TMSLOW_PLLREFSEL 0x00200000 /* PLL Freq Ref Select */
@@ -317,15 +330,7 @@ enum {
# undef assert
#endif
#ifdef CONFIG_B43LEGACY_DEBUG
# define B43legacy_WARN_ON(expr) \
do { \
if (unlikely((expr))) { \
printk(KERN_INFO PFX "Test (%s) failed at:" \
" %s:%d:%s()\n", \
#expr, __FILE__, \
__LINE__, __FUNCTION__); \
} \
} while (0)
# define B43legacy_WARN_ON(x) WARN_ON(x)
# define B43legacy_BUG_ON(expr) \
do { \
if (unlikely((expr))) { \
@@ -336,7 +341,9 @@ enum {
} while (0)
# define B43legacy_DEBUG 1
#else
# define B43legacy_WARN_ON(x) do { /* nothing */ } while (0)
/* This will evaluate the argument even if debugging is disabled. */
static inline bool __b43legacy_warn_on_dummy(bool x) { return x; }
# define B43legacy_WARN_ON(x) __b43legacy_warn_on_dummy(unlikely(!!(x)))
# define B43legacy_BUG_ON(x) do { /* nothing */ } while (0)
# define B43legacy_DEBUG 0
#endif
@@ -392,10 +399,6 @@ struct b43legacy_phy {
u8 possible_phymodes;
/* GMODE bit enabled in MACCTL? */
bool gmode;
/* Possible ieee80211 subsystem hwmodes for this PHY.
* Which mode is selected, depends on thr GMODE enabled bit */
#define B43legacy_MAX_PHYHWMODES 2
struct ieee80211_hw_mode hwmodes[B43legacy_MAX_PHYHWMODES];
/* Analog Type */
u8 analog;
@@ -598,6 +601,12 @@ struct b43legacy_wl {
u8 nr_devs;
bool radiotap_enabled;
/* The beacon we are currently using (AP or IBSS mode).
* This beacon stuff is protected by the irq_lock. */
struct sk_buff *current_beacon;
bool beacon0_uploaded;
bool beacon1_uploaded;
};
/* Pointers to the firmware data and meta information about it. */
@@ -649,7 +658,7 @@ struct b43legacy_wldev {
bool __using_pio; /* Using pio rather than dma. */
bool bad_frames_preempt;/* Use "Bad Frames Preemption". */
bool reg124_set_0x4; /* Variable to keep track of IRQ. */
bool dfq_valid; /* Directed frame queue valid (IBSS PS mode, ATIM). */
bool short_preamble; /* TRUE if using short preamble. */
bool short_slot; /* TRUE if using short slot timing. */
bool radio_hw_enable; /* State of radio hardware enable bit. */
@@ -696,9 +705,6 @@ struct b43legacy_wldev {
u8 max_nr_keys;
struct b43legacy_key key[58];
/* Cached beacon template while uploading the template. */
struct sk_buff *cached_beacon;
/* Firmware data */
struct b43legacy_firmware fw;

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