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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
Pull networking updates from David Miller:
1) Unified UDP encapsulation offload methods for drivers, from
Alexander Duyck.
2) Make DSA binding more sane, from Andrew Lunn.
3) Support QCA9888 chips in ath10k, from Anilkumar Kolli.
4) Several workqueue usage cleanups, from Bhaktipriya Shridhar.
5) Add XDP (eXpress Data Path), essentially running BPF programs on RX
packets as soon as the device sees them, with the option to mirror
the packet on TX via the same interface. From Brenden Blanco and
others.
6) Allow qdisc/class stats dumps to run lockless, from Eric Dumazet.
7) Add VLAN support to b53 and bcm_sf2, from Florian Fainelli.
8) Simplify netlink conntrack entry layout, from Florian Westphal.
9) Add ipv4 forwarding support to mlxsw spectrum driver, from Ido
Schimmel, Yotam Gigi, and Jiri Pirko.
10) Add SKB array infrastructure and convert tun and macvtap over to it.
From Michael S Tsirkin and Jason Wang.
11) Support qdisc packet injection in pktgen, from John Fastabend.
12) Add neighbour monitoring framework to TIPC, from Jon Paul Maloy.
13) Add NV congestion control support to TCP, from Lawrence Brakmo.
14) Add GSO support to SCTP, from Marcelo Ricardo Leitner.
15) Allow GRO and RPS to function on macsec devices, from Paolo Abeni.
16) Support MPLS over IPV4, from Simon Horman.
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1622 commits)
xgene: Fix build warning with ACPI disabled.
be2net: perform temperature query in adapter regardless of its interface state
l2tp: Correctly return -EBADF from pppol2tp_getname.
net/mlx5_core/health: Remove deprecated create_singlethread_workqueue
net: ipmr/ip6mr: update lastuse on entry change
macsec: ensure rx_sa is set when validation is disabled
tipc: dump monitor attributes
tipc: add a function to get the bearer name
tipc: get monitor threshold for the cluster
tipc: make cluster size threshold for monitoring configurable
tipc: introduce constants for tipc address validation
net: neigh: disallow transition to NUD_STALE if lladdr is unchanged in neigh_update()
MAINTAINERS: xgene: Add driver and documentation path
Documentation: dtb: xgene: Add MDIO node
dtb: xgene: Add MDIO node
drivers: net: xgene: ethtool: Use phy_ethtool_gset and sset
drivers: net: xgene: Use exported functions
drivers: net: xgene: Enable MDIO driver
drivers: net: xgene: Add backward compatibility
drivers: net: phy: xgene: Add MDIO driver
...
This commit is contained in:
Linus Torvalds
@@ -1,19 +1,10 @@
|
||||
|
||||
What: /sys/class/net/<iface>/batman-adv/throughput_override
|
||||
Date: Feb 2014
|
||||
Contact: Antonio Quartulli <antonio@meshcoding.com>
|
||||
description:
|
||||
Defines the throughput value to be used by B.A.T.M.A.N. V
|
||||
when estimating the link throughput using this interface.
|
||||
If the value is set to 0 then batman-adv will try to
|
||||
estimate the throughput by itself.
|
||||
|
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What: /sys/class/net/<iface>/batman-adv/elp_interval
|
||||
Date: Feb 2014
|
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Contact: Linus Lüssing <linus.luessing@web.de>
|
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Description:
|
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Defines the interval in milliseconds in which batman
|
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sends its probing packets for link quality measurements.
|
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emits probing packets for neighbor sensing (ELP).
|
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|
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What: /sys/class/net/<iface>/batman-adv/iface_status
|
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Date: May 2010
|
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@@ -28,3 +19,12 @@ Description:
|
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The /sys/class/net/<iface>/batman-adv/mesh_iface file
|
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displays the batman mesh interface this <iface>
|
||||
currently is associated with.
|
||||
|
||||
What: /sys/class/net/<iface>/batman-adv/throughput_override
|
||||
Date: Feb 2014
|
||||
Contact: Antonio Quartulli <a@unstable.cc>
|
||||
description:
|
||||
Defines the throughput value to be used by B.A.T.M.A.N. V
|
||||
when estimating the link throughput using this interface.
|
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If the value is set to 0 then batman-adv will try to
|
||||
estimate the throughput by itself.
|
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|
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@@ -136,6 +136,7 @@
|
||||
!Finclude/net/cfg80211.h cfg80211_ibss_joined
|
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!Finclude/net/cfg80211.h cfg80211_connect_result
|
||||
!Finclude/net/cfg80211.h cfg80211_connect_bss
|
||||
!Finclude/net/cfg80211.h cfg80211_connect_timeout
|
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!Finclude/net/cfg80211.h cfg80211_roamed
|
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!Finclude/net/cfg80211.h cfg80211_disconnected
|
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!Finclude/net/cfg80211.h cfg80211_ready_on_channel
|
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|
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@@ -0,0 +1,37 @@
|
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APM X-Gene SoC MDIO node
|
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|
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MDIO node is defined to describe on-chip MDIO controller.
|
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|
||||
Required properties:
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- compatible: Must be "apm,xgene-mdio-rgmii" or "apm,xgene-mdio-xfi"
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- #address-cells: Must be <1>.
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- #size-cells: Must be <0>.
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- reg: Address and length of the register set
|
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- clocks: Reference to the clock entry
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For the phys on the mdio bus, there must be a node with the following fields:
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- compatible: PHY identifier. Please refer ./phy.txt for the format.
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- reg: The ID number for the phy.
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Example:
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mdio: mdio@17020000 {
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compatible = "apm,xgene-mdio-rgmii";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x0 0x17020000 0x0 0xd100>;
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clocks = <&menetclk 0>;
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};
|
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/* Board-specific peripheral configurations */
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&mdio {
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menetphy: phy@3 {
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reg = <0x3>;
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};
|
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sgenet0phy: phy@4 {
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reg = <0x4>;
|
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};
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sgenet1phy: phy@5 {
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reg = <0x5>;
|
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};
|
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};
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@@ -0,0 +1,59 @@
|
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Properties for an MDIO bus multiplexer found in Broadcom iProc based SoCs.
|
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|
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This MDIO bus multiplexer defines buses that could be internal as well as
|
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external to SoCs and could accept MDIO transaction compatible to C-22 or
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C-45 Clause. When child bus is selected, one needs to select these two
|
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properties as well to generate desired MDIO transaction on appropriate bus.
|
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|
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Required properties in addition to the generic multiplexer properties:
|
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|
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MDIO multiplexer node:
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- compatible: brcm,mdio-mux-iproc.
|
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|
||||
Every non-ethernet PHY requires a compatible so that it could be probed based
|
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on this compatible string.
|
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|
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Additional information regarding generic multiplexer properties can be found
|
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at- Documentation/devicetree/bindings/net/mdio-mux.txt
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|
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for example:
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mdio_mux_iproc: mdio-mux@6602023c {
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compatible = "brcm,mdio-mux-iproc";
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reg = <0x6602023c 0x14>;
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#address-cells = <1>;
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#size-cells = <0>;
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mdio@0 {
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reg = <0x0>;
|
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#address-cells = <1>;
|
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#size-cells = <0>;
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pci_phy0: pci-phy@0 {
|
||||
compatible = "brcm,ns2-pcie-phy";
|
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reg = <0x0>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
mdio@7 {
|
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reg = <0x7>;
|
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#address-cells = <1>;
|
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#size-cells = <0>;
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||||
|
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pci_phy1: pci-phy@0 {
|
||||
compatible = "brcm,ns2-pcie-phy";
|
||||
reg = <0x0>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
};
|
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mdio@10 {
|
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reg = <0x10>;
|
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#address-cells = <1>;
|
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#size-cells = <0>;
|
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|
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gphy0: eth-phy@10 {
|
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reg = <0x10>;
|
||||
};
|
||||
};
|
||||
};
|
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@@ -0,0 +1,96 @@
|
||||
Renesas R-Car CAN FD controller Device Tree Bindings
|
||||
----------------------------------------------------
|
||||
|
||||
Required properties:
|
||||
- compatible: Must contain one or more of the following:
|
||||
- "renesas,rcar-gen3-canfd" for R-Car Gen3 compatible controller.
|
||||
- "renesas,r8a7795-canfd" for R8A7795 (R-Car H3) compatible controller.
|
||||
|
||||
When compatible with the generic version, nodes must list the
|
||||
SoC-specific version corresponding to the platform first, followed by the
|
||||
family-specific and/or generic versions.
|
||||
|
||||
- reg: physical base address and size of the R-Car CAN FD register map.
|
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- interrupts: interrupt specifier for the Global & Channel interrupts
|
||||
- clocks: phandles and clock specifiers for 3 clock inputs.
|
||||
- clock-names: 3 clock input name strings: "fck", "canfd", "can_clk".
|
||||
- pinctrl-0: pin control group to be used for this controller.
|
||||
- pinctrl-names: must be "default".
|
||||
|
||||
Required child nodes:
|
||||
The controller supports two channels and each is represented as a child node.
|
||||
The name of the child nodes are "channel0" and "channel1" respectively. Each
|
||||
child node supports the "status" property only, which is used to
|
||||
enable/disable the respective channel.
|
||||
|
||||
Required properties for "renesas,r8a7795-canfd" compatible:
|
||||
In R8A7795 SoC, canfd clock is a div6 clock and can be used by both CAN
|
||||
and CAN FD controller at the same time. It needs to be scaled to maximum
|
||||
frequency if any of these controllers use it. This is done using the
|
||||
below properties.
|
||||
|
||||
- assigned-clocks: phandle of canfd clock.
|
||||
- assigned-clock-rates: maximum frequency of this clock.
|
||||
|
||||
Optional property:
|
||||
The controller can operate in either CAN FD only mode (default) or
|
||||
Classical CAN only mode. The mode is global to both the channels. In order to
|
||||
enable the later, define the following optional property.
|
||||
- renesas,no-can-fd: puts the controller in Classical CAN only mode.
|
||||
|
||||
Example
|
||||
-------
|
||||
|
||||
SoC common .dtsi file:
|
||||
|
||||
canfd: can@e66c0000 {
|
||||
compatible = "renesas,r8a7795-canfd",
|
||||
"renesas,rcar-gen3-canfd";
|
||||
reg = <0 0xe66c0000 0 0x8000>;
|
||||
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 914>,
|
||||
<&cpg CPG_CORE R8A7795_CLK_CANFD>,
|
||||
<&can_clk>;
|
||||
clock-names = "fck", "canfd", "can_clk";
|
||||
assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
|
||||
assigned-clock-rates = <40000000>;
|
||||
power-domains = <&cpg>;
|
||||
status = "disabled";
|
||||
|
||||
channel0 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
channel1 {
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
Board specific .dts file:
|
||||
|
||||
E.g. below enables Channel 1 alone in the board in Classical CAN only mode.
|
||||
|
||||
&canfd {
|
||||
pinctrl-0 = <&canfd1_pins>;
|
||||
pinctrl-names = "default";
|
||||
renesas,no-can-fd;
|
||||
status = "okay";
|
||||
|
||||
channel1 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
E.g. below enables Channel 0 alone in the board using External clock
|
||||
as fCAN clock.
|
||||
|
||||
&canfd {
|
||||
pinctrl-0 = <&canfd0_pins &can_clk_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
|
||||
channel0 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,13 @@
|
||||
* Cirrus Logic CS8900/CS8920 Network Controller
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be "cirrus,cs8900" or "cirrus,cs8920".
|
||||
- reg : Address and length of the IO space.
|
||||
- interrupts : Should contain the controller interrupt line.
|
||||
|
||||
Examples:
|
||||
eth0: eth@10000000 {
|
||||
compatible = "cirrus,cs8900";
|
||||
reg = <0x10000000 0x400>;
|
||||
interrupts = <10>;
|
||||
};
|
||||
@@ -15,7 +15,6 @@ Required properties:
|
||||
- cpdma_channels : Specifies number of channels in CPDMA
|
||||
- ale_entries : Specifies No of entries ALE can hold
|
||||
- bd_ram_size : Specifies internal descriptor RAM size
|
||||
- rx_descs : Specifies number of Rx descriptors
|
||||
- mac_control : Specifies Default MAC control register content
|
||||
for the specific platform
|
||||
- slaves : Specifies number for slaves
|
||||
|
||||
@@ -2,7 +2,10 @@ TI SoC Davinci/Keystone2 MDIO Controller Device Tree Bindings
|
||||
---------------------------------------------------
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be "ti,davinci_mdio" or "ti,keystone_mdio"
|
||||
- compatible : Should be "ti,davinci_mdio"
|
||||
and "ti,keystone_mdio" for Keystone 2 SoCs
|
||||
and "ti,cpsw-mdio" for am335x, am472x, am57xx/dra7, dm814x SoCs
|
||||
and "ti,am4372-mdio" for am472x SoC
|
||||
- reg : physical base address and size of the davinci mdio
|
||||
registers map
|
||||
- bus_freq : Mdio Bus frequency
|
||||
|
||||
@@ -0,0 +1,97 @@
|
||||
Broadcom BCM53xx Ethernet switches
|
||||
==================================
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: For external switch chips, compatible string must be exactly one
|
||||
of: "brcm,bcm5325"
|
||||
"brcm,bcm53115"
|
||||
"brcm,bcm53125"
|
||||
"brcm,bcm53128"
|
||||
"brcm,bcm5365"
|
||||
"brcm,bcm5395"
|
||||
"brcm,bcm5397"
|
||||
"brcm,bcm5398"
|
||||
|
||||
For the BCM5310x SoCs with an integrated switch, must be one of:
|
||||
"brcm,bcm53010-srab"
|
||||
"brcm,bcm53011-srab"
|
||||
"brcm,bcm53012-srab"
|
||||
"brcm,bcm53018-srab"
|
||||
"brcm,bcm53019-srab" and the mandatory "brcm,bcm5301x-srab" string
|
||||
|
||||
For the BCM585xx/586XX/88312 SoCs with an integrated switch, must be one of:
|
||||
"brcm,bcm58522-srab"
|
||||
"brcm,bcm58523-srab"
|
||||
"brcm,bcm58525-srab"
|
||||
"brcm,bcm58622-srab"
|
||||
"brcm,bcm58623-srab"
|
||||
"brcm,bcm58625-srab"
|
||||
"brcm,bcm88312-srab" and the mandatory "brcm,nsp-srab string
|
||||
|
||||
For the BCM63xx/33xx SoCs with an integrated switch, must be one of:
|
||||
"brcm,bcm3384-switch"
|
||||
"brcm,bcm6328-switch"
|
||||
"brcm,bcm6368-switch" and the mandatory "brcm,bcm63xx-switch"
|
||||
|
||||
See Documentation/devicetree/bindings/dsa/dsa.txt for a list of additional
|
||||
required and optional properties.
|
||||
|
||||
Examples:
|
||||
|
||||
Ethernet switch connected via MDIO to the host, CPU port wired to eth0:
|
||||
|
||||
eth0: ethernet@10001000 {
|
||||
compatible = "brcm,unimac";
|
||||
reg = <0x10001000 0x1000>;
|
||||
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
duplex-full;
|
||||
};
|
||||
};
|
||||
|
||||
mdio0: mdio@10000000 {
|
||||
compatible = "brcm,unimac-mdio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
switch0: ethernet-switch@30 {
|
||||
compatible = "brcm,bcm53125";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
ports {
|
||||
port0@0 {
|
||||
reg = <0>;
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port1@1 {
|
||||
reg = <1>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
port5@5 {
|
||||
reg = <5>;
|
||||
label = "cable-modem";
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
duplex-full;
|
||||
};
|
||||
phy-mode = "rgmii-txid";
|
||||
};
|
||||
|
||||
port8@8 {
|
||||
reg = <8>;
|
||||
label = "cpu";
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
duplex-full;
|
||||
};
|
||||
phy-mode = "rgmii-txid";
|
||||
ethernet = <ð0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -1,5 +1,279 @@
|
||||
Marvell Distributed Switch Architecture Device Tree Bindings
|
||||
------------------------------------------------------------
|
||||
Distributed Switch Architecture Device Tree Bindings
|
||||
----------------------------------------------------
|
||||
|
||||
Two bindings exist, one of which has been deprecated due to
|
||||
limitations.
|
||||
|
||||
Current Binding
|
||||
---------------
|
||||
|
||||
Switches are true Linux devices and can be probes by any means. Once
|
||||
probed, they register to the DSA framework, passing a node
|
||||
pointer. This node is expected to fulfil the following binding, and
|
||||
may contain additional properties as required by the device it is
|
||||
embedded within.
|
||||
|
||||
Required properties:
|
||||
|
||||
- ports : A container for child nodes representing switch ports.
|
||||
|
||||
Optional properties:
|
||||
|
||||
- dsa,member : A two element list indicates which DSA cluster, and position
|
||||
within the cluster a switch takes. <0 0> is cluster 0,
|
||||
switch 0. <0 1> is cluster 0, switch 1. <1 0> is cluster 1,
|
||||
switch 0. A switch not part of any cluster (single device
|
||||
hanging off a CPU port) must not specify this property
|
||||
|
||||
The ports container has the following properties
|
||||
|
||||
Required properties:
|
||||
|
||||
- #address-cells : Must be 1
|
||||
- #size-cells : Must be 0
|
||||
|
||||
Each port children node must have the following mandatory properties:
|
||||
- reg : Describes the port address in the switch
|
||||
- label : Describes the label associated with this port, which
|
||||
will become the netdev name. Special labels are
|
||||
"cpu" to indicate a CPU port and "dsa" to
|
||||
indicate an uplink/downlink port between switches in
|
||||
the cluster.
|
||||
|
||||
A port labelled "dsa" has the following mandatory property:
|
||||
|
||||
- link : Should be a list of phandles to other switch's DSA
|
||||
port. This port is used as the outgoing port
|
||||
towards the phandle ports. The full routing
|
||||
information must be given, not just the one hop
|
||||
routes to neighbouring switches.
|
||||
|
||||
A port labelled "cpu" has the following mandatory property:
|
||||
|
||||
- ethernet : Should be a phandle to a valid Ethernet device node.
|
||||
This host device is what the switch port is
|
||||
connected to.
|
||||
|
||||
Port child nodes may also contain the following optional standardised
|
||||
properties, described in binding documents:
|
||||
|
||||
- phy-handle : Phandle to a PHY on an MDIO bus. See
|
||||
Documentation/devicetree/bindings/net/ethernet.txt
|
||||
for details.
|
||||
|
||||
- phy-mode : See
|
||||
Documentation/devicetree/bindings/net/ethernet.txt
|
||||
for details.
|
||||
|
||||
- fixed-link : Fixed-link subnode describing a link to a non-MDIO
|
||||
managed entity. See
|
||||
Documentation/devicetree/bindings/net/fixed-link.txt
|
||||
for details.
|
||||
|
||||
Example
|
||||
|
||||
The following example shows three switches on three MDIO busses,
|
||||
linked into one DSA cluster.
|
||||
|
||||
&mdio1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
switch0: switch0@0 {
|
||||
compatible = "marvell,mv88e6085";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
dsa,member = <0 0>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan0";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan1";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan2";
|
||||
};
|
||||
|
||||
switch0port5: port@5 {
|
||||
reg = <5>;
|
||||
label = "dsa";
|
||||
phy-mode = "rgmii-txid";
|
||||
link = <&switch1port6
|
||||
&switch2port9>;
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
port@6 {
|
||||
reg = <6>;
|
||||
label = "cpu";
|
||||
ethernet = <&fec1>;
|
||||
fixed-link {
|
||||
speed = <100>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mdio2 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
switch1: switch1@0 {
|
||||
compatible = "marvell,mv88e6085";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
dsa,member = <0 1>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan3";
|
||||
phy-handle = <&switch1phy0>;
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan4";
|
||||
phy-handle = <&switch1phy1>;
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan5";
|
||||
phy-handle = <&switch1phy2>;
|
||||
};
|
||||
|
||||
switch1port5: port@5 {
|
||||
reg = <5>;
|
||||
label = "dsa";
|
||||
link = <&switch2port9>;
|
||||
phy-mode = "rgmii-txid";
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
|
||||
switch1port6: port@6 {
|
||||
reg = <6>;
|
||||
label = "dsa";
|
||||
phy-mode = "rgmii-txid";
|
||||
link = <&switch0port5>;
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
};
|
||||
mdio-bus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
switch1phy0: switch1phy0@0 {
|
||||
reg = <0>;
|
||||
};
|
||||
switch1phy1: switch1phy0@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
switch1phy2: switch1phy0@2 {
|
||||
reg = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mdio4 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
switch2: switch2@0 {
|
||||
compatible = "marvell,mv88e6085";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
dsa,member = <0 2>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
label = "lan6";
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
label = "lan7";
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
label = "lan8";
|
||||
};
|
||||
|
||||
port@3 {
|
||||
reg = <3>;
|
||||
label = "optical3";
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
link-gpios = <&gpio6 2
|
||||
GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
port@4 {
|
||||
reg = <4>;
|
||||
label = "optical4";
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
link-gpios = <&gpio6 3
|
||||
GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
switch2port9: port@9 {
|
||||
reg = <9>;
|
||||
label = "dsa";
|
||||
phy-mode = "rgmii-txid";
|
||||
link = <&switch1port5
|
||||
&switch0port5>;
|
||||
fixed-link {
|
||||
speed = <1000>;
|
||||
full-duplex;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
Deprecated Binding
|
||||
------------------
|
||||
|
||||
The deprecated binding makes use of a platform device to represent the
|
||||
switches. The switches themselves are not Linux devices, and make use
|
||||
of an MDIO bus for management.
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be "marvell,dsa"
|
||||
|
||||
@@ -0,0 +1,22 @@
|
||||
Hisilicon Fast Ethernet MDIO Controller interface
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "hisilicon,hisi-femac-mdio".
|
||||
- reg: address and length of the register set for the device.
|
||||
- clocks: A phandle to the reference clock for this device.
|
||||
|
||||
- PHY subnode: inherits from phy binding [1]
|
||||
[1] Documentation/devicetree/bindings/net/phy.txt
|
||||
|
||||
Example:
|
||||
mdio: mdio@10091100 {
|
||||
compatible = "hisilicon,hisi-femac-mdio";
|
||||
reg = <0x10091100 0x10>;
|
||||
clocks = <&crg HI3516CV300_MDIO_CLK>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
phy0: phy@1 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
@@ -0,0 +1,39 @@
|
||||
Hisilicon Fast Ethernet MAC controller
|
||||
|
||||
Required properties:
|
||||
- compatible: should contain one of the following version strings:
|
||||
* "hisilicon,hisi-femac-v1"
|
||||
* "hisilicon,hisi-femac-v2"
|
||||
and the soc string "hisilicon,hi3516cv300-femac".
|
||||
- reg: specifies base physical address(s) and size of the device registers.
|
||||
The first region is the MAC core register base and size.
|
||||
The second region is the global MAC control register.
|
||||
- interrupts: should contain the MAC interrupt.
|
||||
- clocks: A phandle to the MAC main clock.
|
||||
- resets: should contain the phandle to the MAC reset signal(required) and
|
||||
the PHY reset signal(optional).
|
||||
- reset-names: should contain the reset signal name "mac"(required)
|
||||
and "phy"(optional).
|
||||
- mac-address: see ethernet.txt [1].
|
||||
- phy-mode: see ethernet.txt [1].
|
||||
- phy-handle: see ethernet.txt [1].
|
||||
- hisilicon,phy-reset-delays-us: triplet of delays if PHY reset signal given.
|
||||
The 1st cell is reset pre-delay in micro seconds.
|
||||
The 2nd cell is reset pulse in micro seconds.
|
||||
The 3rd cell is reset post-delay in micro seconds.
|
||||
|
||||
[1] Documentation/devicetree/bindings/net/ethernet.txt
|
||||
|
||||
Example:
|
||||
hisi_femac: ethernet@10090000 {
|
||||
compatible = "hisilicon,hi3516cv300-femac","hisilicon,hisi-femac-v2";
|
||||
reg = <0x10090000 0x1000>,<0x10091300 0x200>;
|
||||
interrupts = <12>;
|
||||
clocks = <&crg HI3518EV200_ETH_CLK>;
|
||||
resets = <&crg 0xec 0>,<&crg 0xec 3>;
|
||||
reset-names = "mac","phy";
|
||||
mac-address = [00 00 00 00 00 00];
|
||||
phy-mode = "mii";
|
||||
phy-handle = <&phy0>;
|
||||
hisilicon,phy-reset-delays-us = <10000 20000 20000>;
|
||||
};
|
||||
@@ -2,7 +2,7 @@ This document describes the device tree bindings associated with the
|
||||
keystone network coprocessor(NetCP) driver support.
|
||||
|
||||
The network coprocessor (NetCP) is a hardware accelerator that processes
|
||||
Ethernet packets. NetCP has a gigabit Ethernet (GbE) subsytem with a ethernet
|
||||
Ethernet packets. NetCP has a gigabit Ethernet (GbE) subsystem with a ethernet
|
||||
switch sub-module to send and receive packets. NetCP also includes a packet
|
||||
accelerator (PA) module to perform packet classification operations such as
|
||||
header matching, and packet modification operations such as checksum
|
||||
|
||||
@@ -5,11 +5,12 @@ numbered uniquely in a device dependent manner. The nodes for an MDIO
|
||||
bus multiplexer/switch will have one child node for each child bus.
|
||||
|
||||
Required properties:
|
||||
- mdio-parent-bus : phandle to the parent MDIO bus.
|
||||
- #address-cells = <1>;
|
||||
- #size-cells = <0>;
|
||||
|
||||
Optional properties:
|
||||
- mdio-parent-bus : phandle to the parent MDIO bus.
|
||||
|
||||
- Other properties specific to the multiplexer/switch hardware.
|
||||
|
||||
Required properties for child nodes:
|
||||
|
||||
@@ -35,3 +35,13 @@ Optional properties:
|
||||
supported clocks:
|
||||
- KSZ8021, KSZ8031, KSZ8081, KSZ8091: "rmii-ref": The RMII reference
|
||||
input clock. Used to determine the XI input clock.
|
||||
|
||||
- micrel,fiber-mode: If present the PHY is configured to operate in fiber mode
|
||||
|
||||
Some PHYs, such as the KSZ8041FTL variant, support fiber mode, enabled
|
||||
by the FXEN boot strapping pin. It can't be determined from the PHY
|
||||
registers whether the PHY is in fiber mode, so this boolean device tree
|
||||
property can be used to describe it.
|
||||
|
||||
In fiber mode, auto-negotiation is disabled and the PHY can only work in
|
||||
100base-fx (full and half duplex) modes.
|
||||
|
||||
@@ -3,7 +3,8 @@ Rockchip SoC RK3288 10/100/1000 Ethernet driver(GMAC)
|
||||
The device node has following properties.
|
||||
|
||||
Required properties:
|
||||
- compatible: Can be one of "rockchip,rk3288-gmac", "rockchip,rk3368-gmac"
|
||||
- compatible: Can be one of "rockchip,rk3228-gmac", "rockchip,rk3288-gmac",
|
||||
"rockchip,rk3368-gmac"
|
||||
- reg: addresses and length of the register sets for the device.
|
||||
- interrupts: Should contain the GMAC interrupts.
|
||||
- interrupt-names: Should contain the interrupt names "macirq".
|
||||
|
||||
@@ -17,9 +17,26 @@ Required properties:
|
||||
Optional properties:
|
||||
altr,emac-splitter: Should be the phandle to the emac splitter soft IP node if
|
||||
DWMAC controller is connected emac splitter.
|
||||
phy-mode: The phy mode the ethernet operates in
|
||||
altr,sgmii-to-sgmii-converter: phandle to the TSE SGMII converter
|
||||
|
||||
This device node has additional phandle dependency, the sgmii converter:
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be altr,gmii-to-sgmii-2.0
|
||||
- reg-names : Should be "eth_tse_control_port"
|
||||
|
||||
Example:
|
||||
|
||||
gmii_to_sgmii_converter: phy@0x100000240 {
|
||||
compatible = "altr,gmii-to-sgmii-2.0";
|
||||
reg = <0x00000001 0x00000240 0x00000008>,
|
||||
<0x00000001 0x00000200 0x00000040>;
|
||||
reg-names = "eth_tse_control_port";
|
||||
clocks = <&sgmii_1_clk_0 &emac1 1 &sgmii_clk_125 &sgmii_clk_125>;
|
||||
clock-names = "tse_pcs_ref_clk_clock_connection", "tse_rx_cdr_refclk";
|
||||
};
|
||||
|
||||
gmac0: ethernet@ff700000 {
|
||||
compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
|
||||
altr,sysmgr-syscon = <&sysmgr 0x60 0>;
|
||||
@@ -30,4 +47,6 @@ gmac0: ethernet@ff700000 {
|
||||
mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
|
||||
clocks = <&emac_0_clk>;
|
||||
clock-names = "stmmaceth";
|
||||
phy-mode = "sgmii";
|
||||
altr,gmii-to-sgmii-converter = <&gmii_to_sgmii_converter>;
|
||||
};
|
||||
|
||||
@@ -47,6 +47,9 @@ Optional properties:
|
||||
supported by this device instance
|
||||
- snps,perfect-filter-entries: Number of perfect filter entries supported
|
||||
by this device instance
|
||||
- snps,ps-speed: port selection speed that can be passed to the core when
|
||||
PCS is supported. For example, this is used in case of SGMII
|
||||
and MAC2MAC connection.
|
||||
- AXI BUS Mode parameters: below the list of all the parameters to program the
|
||||
AXI register inside the DMA module:
|
||||
- snps,lpi_en: enable Low Power Interface
|
||||
|
||||
@@ -1,19 +1,30 @@
|
||||
* Texas Instruments wl1271 wireless lan controller
|
||||
* Texas Instruments wl12xx/wl18xx wireless lan controller
|
||||
|
||||
The wl1271 chip can be connected via SPI or via SDIO. This
|
||||
The wl12xx/wl18xx chips can be connected via SPI or via SDIO. This
|
||||
document describes the binding for the SPI connected chip.
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be "ti,wl1271"
|
||||
- compatible : Should be one of the following:
|
||||
* "ti,wl1271"
|
||||
* "ti,wl1273"
|
||||
* "ti,wl1281"
|
||||
* "ti,wl1283"
|
||||
* "ti,wl1801"
|
||||
* "ti,wl1805"
|
||||
* "ti,wl1807"
|
||||
* "ti,wl1831"
|
||||
* "ti,wl1835"
|
||||
* "ti,wl1837"
|
||||
- reg : Chip select address of device
|
||||
- spi-max-frequency : Maximum SPI clocking speed of device in Hz
|
||||
- ref-clock-frequency : Reference clock frequency
|
||||
- interrupt-parent, interrupts :
|
||||
Should contain parameters for 1 interrupt line.
|
||||
Interrupt parameters: parent, line number, type.
|
||||
- vwlan-supply : Point the node of the regulator that powers/enable the wl1271 chip
|
||||
- vwlan-supply : Point the node of the regulator that powers/enable the
|
||||
wl12xx/wl18xx chip
|
||||
|
||||
Optional properties:
|
||||
- ref-clock-frequency : Reference clock frequency (should be set for wl12xx)
|
||||
- clock-xtal : boolean, clock is generated from XTAL
|
||||
|
||||
- Please consult Documentation/devicetree/bindings/spi/spi-bus.txt
|
||||
@@ -21,16 +32,28 @@ Optional properties:
|
||||
|
||||
Examples:
|
||||
|
||||
For wl12xx family:
|
||||
&spi1 {
|
||||
wl1271@1 {
|
||||
wlcore: wlcore@1 {
|
||||
compatible = "ti,wl1271";
|
||||
|
||||
reg = <1>;
|
||||
spi-max-frequency = <48000000>;
|
||||
clock-xtal;
|
||||
ref-clock-frequency = <38400000>;
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
|
||||
vwlan-supply = <&vwlan_fixed>;
|
||||
clock-xtal;
|
||||
ref-clock-frequency = <38400000>;
|
||||
};
|
||||
};
|
||||
|
||||
For wl18xx family:
|
||||
&spi0 {
|
||||
wlcore: wlcore@0 {
|
||||
compatible = "ti,wl1835";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <48000000>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <27 IRQ_TYPE_EDGE_RISING>;
|
||||
vwlan-supply = <&vwlan_fixed>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -0,0 +1,27 @@
|
||||
* Broadcom NS2 PCIe PHY binding document
|
||||
|
||||
Required bus properties:
|
||||
- reg: MDIO Bus number for the MDIO interface
|
||||
- #address-cells: must be 1
|
||||
- #size-cells: must be 0
|
||||
|
||||
Required PHY properties:
|
||||
- compatible: should be "brcm,ns2-pcie-phy"
|
||||
- reg: MDIO Phy ID for the MDIO interface
|
||||
- #phy-cells: must be 0
|
||||
|
||||
This is a child bus node of "brcm,mdio-mux-iproc" node.
|
||||
|
||||
Example:
|
||||
|
||||
mdio@0 {
|
||||
reg = <0x0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
pci_phy0: pci-phy@0 {
|
||||
compatible = "brcm,ns2-pcie-phy";
|
||||
reg = <0x0>;
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
};
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user