Merge branch 'pci/irq-fixups' into next

* pci/irq-fixups:
  arm64: PCI: Drop DT IRQ allocation from pcibios_alloc_irq()
  PCI: xilinx-nwl: Move to struct pci_host_bridge IRQ mapping functions
  PCI: rockchip: Move to struct pci_host_bridge IRQ mapping functions
  PCI: xgene: Move to struct pci_host_bridge IRQ mapping functions
  PCI: altera: Drop pci_fixup_irqs()
  PCI: versatile: Drop pci_fixup_irqs()
  PCI: generic: Drop pci_fixup_irqs()
  PCI: faraday: Drop pci_fixup_irqs()
  PCI: designware: Drop pci_fixup_irqs()
  PCI: iproc: Drop pci_fixup_irqs()
  PCI: rcar: Drop pci_fixup_irqs()
  PCI: xilinx: Drop pci_fixup_irqs()
  PCI: tegra: Drop pci_fixup_irqs()
  ARM/PCI: Remove pci_fixup_irqs() call for bios32 host controllers
  PCI: Add a call to pci_assign_irq() in pci_device_probe()
  OF/PCI: Update of_irq_parse_and_map_pci() comment
  PCI: Add pci_assign_irq() function and have pci_fixup_irqs() use it
  PCI: Add IRQ mapping function pointers to pci_host_bridge struct
  PCI: Build setup-irq.o on all arches
  PCI: Remove pci_scan_root_bus_msi()
  PCI: xilinx-nwl: Convert PCI scan API to pci_scan_root_bus_bridge()
  PCI: rockchip: Convert PCI scan API to pci_scan_root_bus_bridge()
  PCI: generic: Convert PCI scan API to pci_scan_root_bus_bridge()
  PCI: xgene: Convert PCI scan API to pci_scan_root_bus_bridge()
  PCI: xilinx: Convert PCI scan API to pci_scan_root_bus_bridge()
  PCI: altera: Convert PCI scan API to pci_scan_root_bus_bridge()
  PCI: versatile: Convert PCI scan API to pci_scan_root_bus_bridge()
  PCI: iproc: Convert PCI scan API to pci_scan_root_bus_bridge()
  PCI: rcar: Convert PCI scan API to pci_scan_root_bus_bridge()
  PCI: aardvark: Convert PCI scan API to pci_scan_root_bus_bridge()
  PCI: designware: Convert PCI scan API to pci_scan_root_bus_bridge()
  ARM/PCI: Convert PCI scan API to pci_scan_root_bus_bridge()
  PCI: Make pci_register_host_bridge() PCI core internal
  PCI: Add pci_scan_root_bus_bridge() interface
  PCI: tegra: Fix host bridge memory leakage
  PCI: faraday: Fix host bridge memory leakage
  PCI: Add devm_pci_alloc_host_bridge() interface
  PCI: Add pci_free_host_bridge() interface
  PCI: Initialize bridge release function at bridge allocation
  PCI: faraday: Convert IRQ masking to raw PCI config accessors
  PCI: iproc: Convert link check to raw PCI config accessors
  PCI: xilinx-nwl: Remove nwl_pcie_enable_msi() unused bus parameter
This commit is contained in:
Bjorn Helgaas
2017-07-03 08:00:29 -05:00
31 changed files with 580 additions and 296 deletions
+1
View File
@@ -342,6 +342,7 @@ PER-CPU MEM
devm_free_percpu()
PCI
devm_pci_alloc_host_bridge() : managed PCI host bridge allocation
devm_pci_remap_cfgspace() : ioremap PCI configuration space
devm_pci_remap_cfg_resource() : ioremap PCI configuration space resource
pcim_enable_device() : after success, all PCI ops become managed
+2 -1
View File
@@ -16,6 +16,7 @@
struct pci_sys_data;
struct pci_ops;
struct pci_bus;
struct pci_host_bridge;
struct device;
struct hw_pci {
@@ -25,7 +26,7 @@ struct hw_pci {
unsigned int io_optional:1;
void **private_data;
int (*setup)(int nr, struct pci_sys_data *);
struct pci_bus *(*scan)(int nr, struct pci_sys_data *);
int (*scan)(int nr, struct pci_host_bridge *);
void (*preinit)(void);
void (*postinit)(void);
u8 (*swizzle)(struct pci_dev *dev, u8 *pin);
+29 -17
View File
@@ -458,10 +458,14 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
int nr, busnr;
for (nr = busnr = 0; nr < hw->nr_controllers; nr++) {
sys = kzalloc(sizeof(struct pci_sys_data), GFP_KERNEL);
if (WARN(!sys, "PCI: unable to allocate sys data!"))
struct pci_host_bridge *bridge;
bridge = pci_alloc_host_bridge(sizeof(struct pci_sys_data));
if (WARN(!bridge, "PCI: unable to allocate bridge!"))
break;
sys = pci_host_bridge_priv(bridge);
sys->busnr = busnr;
sys->swizzle = hw->swizzle;
sys->map_irq = hw->map_irq;
@@ -473,7 +477,6 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
ret = hw->setup(nr, sys);
if (ret > 0) {
struct pci_host_bridge *host_bridge;
ret = pcibios_init_resource(nr, sys, hw->io_optional);
if (ret) {
@@ -481,26 +484,37 @@ static void pcibios_init_hw(struct device *parent, struct hw_pci *hw,
break;
}
if (hw->scan)
sys->bus = hw->scan(nr, sys);
else
sys->bus = pci_scan_root_bus_msi(parent,
sys->busnr, hw->ops, sys,
&sys->resources, hw->msi_ctrl);
bridge->map_irq = pcibios_map_irq;
bridge->swizzle_irq = pcibios_swizzle;
if (WARN(!sys->bus, "PCI: unable to scan bus!")) {
kfree(sys);
if (hw->scan)
ret = hw->scan(nr, bridge);
else {
list_splice_init(&sys->resources,
&bridge->windows);
bridge->dev.parent = parent;
bridge->sysdata = sys;
bridge->busnr = sys->busnr;
bridge->ops = hw->ops;
bridge->msi = hw->msi_ctrl;
bridge->align_resource =
hw->align_resource;
ret = pci_scan_root_bus_bridge(bridge);
}
if (WARN(ret < 0, "PCI: unable to scan bus!")) {
pci_free_host_bridge(bridge);
break;
}
sys->bus = bridge->bus;
busnr = sys->bus->busn_res.end + 1;
list_add(&sys->node, head);
host_bridge = pci_find_host_bridge(sys->bus);
host_bridge->align_resource = hw->align_resource;
} else {
kfree(sys);
pci_free_host_bridge(bridge);
if (ret < 0)
break;
}
@@ -519,8 +533,6 @@ void pci_common_init_dev(struct device *parent, struct hw_pci *hw)
if (hw->postinit)
hw->postinit();
pci_fixup_irqs(pcibios_swizzle, pcibios_map_irq);
list_for_each_entry(sys, &head, node) {
struct pci_bus *bus = sys->bus;
+12 -5
View File
@@ -152,16 +152,23 @@ static void rc_pci_fixup(struct pci_dev *dev)
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_ANY_ID, rc_pci_fixup);
static struct pci_bus __init *
dove_pcie_scan_bus(int nr, struct pci_sys_data *sys)
static int __init
dove_pcie_scan_bus(int nr, struct pci_host_bridge *bridge)
{
struct pci_sys_data *sys = pci_host_bridge_priv(bridge);
if (nr >= num_pcie_ports) {
BUG();
return NULL;
return -EINVAL;
}
return pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
&sys->resources);
list_splice_init(&sys->resources, &bridge->windows);
bridge->dev.parent = NULL;
bridge->sysdata = sys;
bridge->busnr = sys->busnr;
bridge->ops = &pcie_ops;
return pci_scan_root_bus_bridge(bridge);
}
static int __init dove_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+20 -11
View File
@@ -504,10 +504,10 @@ iop13xx_pci_abort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
/* Scan an IOP13XX PCI bus. nr selects which ATU we use.
*/
struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
int iop13xx_scan_bus(int nr, struct pci_host_bridge *bridge)
{
int which_atu;
struct pci_bus *bus = NULL;
int which_atu, ret;
struct pci_sys_data *sys = pci_host_bridge_priv(bridge);
switch (init_atu) {
case IOP13XX_INIT_ATU_ATUX:
@@ -525,9 +525,14 @@ struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
if (!which_atu) {
BUG();
return NULL;
return -ENODEV;
}
list_splice_init(&sys->resources, &bridge->windows);
bridge->dev.parent = NULL;
bridge->sysdata = sys;
bridge->busnr = sys->busnr;
switch (which_atu) {
case IOP13XX_INIT_ATU_ATUX:
if (time_after_eq(jiffies + msecs_to_jiffies(1000),
@@ -535,18 +540,22 @@ struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
while(time_before(jiffies, atux_trhfa_timeout))
udelay(100);
bus = pci_bus_atux = pci_scan_root_bus(NULL, sys->busnr,
&iop13xx_atux_ops,
sys, &sys->resources);
bridge->ops = &iop13xx_atux_ops;
ret = pci_scan_root_bus_bridge(bridge);
if (!ret)
pci_bus_atux = bridge->bus;
break;
case IOP13XX_INIT_ATU_ATUE:
bus = pci_bus_atue = pci_scan_root_bus(NULL, sys->busnr,
&iop13xx_atue_ops,
sys, &sys->resources);
bridge->ops = &iop13xx_atue_ops;
ret = pci_scan_root_bus_bridge(bridge);
if (!ret)
pci_bus_atue = bridge->bus;
break;
default:
ret = -EINVAL;
}
return bus;
return ret;
}
/* This function is called from iop13xx_pci_init() after assigning valid
+2 -1
View File
@@ -11,9 +11,10 @@ extern size_t iop13xx_atue_mem_size;
extern size_t iop13xx_atux_mem_size;
struct pci_sys_data;
struct pci_host_bridge;
struct hw_pci;
int iop13xx_pci_setup(int nr, struct pci_sys_data *sys);
struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *);
int iop13xx_scan_bus(int nr, struct pci_host_bridge *bridge);
void iop13xx_atu_select(struct hw_pci *plat_pci);
void iop13xx_pci_init(void);
void iop13xx_map_pci_memory(void);
+11 -5
View File
@@ -194,16 +194,22 @@ static void rc_pci_fixup(struct pci_dev *dev)
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_ANY_ID, rc_pci_fixup);
static struct pci_bus __init *
mv78xx0_pcie_scan_bus(int nr, struct pci_sys_data *sys)
static int __init mv78xx0_pcie_scan_bus(int nr, struct pci_host_bridge *bridge)
{
struct pci_sys_data *sys = pci_host_bridge_priv(bridge);
if (nr >= num_pcie_ports) {
BUG();
return NULL;
return -EINVAL;
}
return pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
&sys->resources);
list_splice_init(&sys->resources, &bridge->windows);
bridge->dev.parent = NULL;
bridge->sysdata = sys;
bridge->busnr = sys->busnr;
bridge->ops = &pcie_ops;
return pci_scan_root_bus_bridge(bridge);
}
static int __init mv78xx0_pcie_map_irq(const struct pci_dev *dev, u8 slot,
+2 -1
View File
@@ -54,6 +54,7 @@ void orion5x_restart(enum reboot_mode, const char *);
* PCIe/PCI functions.
*/
struct pci_bus;
struct pci_host_bridge;
struct pci_sys_data;
struct pci_dev;
@@ -61,7 +62,7 @@ void orion5x_pcie_id(u32 *dev, u32 *rev);
void orion5x_pci_disable(void);
void orion5x_pci_set_cardbus_mode(void);
int orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys);
struct pci_bus *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys);
int orion5x_pci_sys_scan_bus(int nr, struct pci_host_bridge *bridge);
int orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
struct tag;
+17 -8
View File
@@ -555,18 +555,27 @@ int __init orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys)
return 0;
}
struct pci_bus __init *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys)
int __init orion5x_pci_sys_scan_bus(int nr, struct pci_host_bridge *bridge)
{
if (nr == 0)
return pci_scan_root_bus(NULL, sys->busnr, &pcie_ops, sys,
&sys->resources);
struct pci_sys_data *sys = pci_host_bridge_priv(bridge);
if (nr == 1 && !orion5x_pci_disabled)
return pci_scan_root_bus(NULL, sys->busnr, &pci_ops, sys,
&sys->resources);
list_splice_init(&sys->resources, &bridge->windows);
bridge->dev.parent = NULL;
bridge->sysdata = sys;
bridge->busnr = sys->busnr;
if (nr == 0) {
bridge->ops = &pcie_ops;
return pci_scan_root_bus_bridge(bridge);
}
if (nr == 1 && !orion5x_pci_disabled) {
bridge->ops = &pci_ops;
return pci_scan_root_bus_bridge(bridge);
}
BUG();
return NULL;
return -ENODEV;
}
int __init orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
+4 -6
View File
@@ -39,20 +39,18 @@ resource_size_t pcibios_align_resource(void *data, const struct resource *res,
return res->start;
}
#ifdef CONFIG_ACPI
/*
* Try to assign the IRQ number when probing a new device
*/
int pcibios_alloc_irq(struct pci_dev *dev)
{
if (acpi_disabled)
dev->irq = of_irq_parse_and_map_pci(dev, 0, 0);
#ifdef CONFIG_ACPI
else
return acpi_pci_irq_enable(dev);
#endif
if (!acpi_disabled)
acpi_pci_irq_enable(dev);
return 0;
}
#endif
/*
* raw_pci_read/write - Platform-specific PCI config space access.
+2 -1
View File
@@ -113,7 +113,8 @@ EXPORT_SYMBOL_GPL(of_irq_parse_pci);
* @pin: PCI irq pin number; passed when used as map_irq callback. Unused
*
* @slot and @pin are unused, but included in the function so that this
* function can be used directly as the map_irq callback to pci_fixup_irqs().
* function can be used directly as the map_irq callback to
* pci_assign_irq() and struct pci_host_bridge.map_irq pointer
*/
int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin)
{
+2 -15
View File
@@ -4,7 +4,8 @@
obj-y += access.o bus.o probe.o host-bridge.o remove.o pci.o \
pci-driver.o search.o pci-sysfs.o rom.o setup-res.o \
irq.o vpd.o setup-bus.o vc.o mmap.o
irq.o vpd.o setup-bus.o vc.o mmap.o setup-irq.o
obj-$(CONFIG_PROC_FS) += proc.o
obj-$(CONFIG_SYSFS) += slot.o
@@ -28,20 +29,6 @@ obj-$(CONFIG_HT_IRQ) += htirq.o
obj-$(CONFIG_PCI_ATS) += ats.o
obj-$(CONFIG_PCI_IOV) += iov.o
#
# Some architectures use the generic PCI setup functions
#
obj-$(CONFIG_ALPHA) += setup-irq.o
obj-$(CONFIG_ARC) += setup-irq.o
obj-$(CONFIG_ARM) += setup-irq.o
obj-$(CONFIG_ARM64) += setup-irq.o
obj-$(CONFIG_UNICORE32) += setup-irq.o
obj-$(CONFIG_SUPERH) += setup-irq.o
obj-$(CONFIG_MIPS) += setup-irq.o
obj-$(CONFIG_TILE) += setup-irq.o
obj-$(CONFIG_SPARC_LEON) += setup-irq.o
obj-$(CONFIG_M68K) += setup-irq.o
#
# ACPI Related PCI FW Functions
# ACPI _DSM provided firmware instance and string name
+24 -19
View File
@@ -280,9 +280,9 @@ int dw_pcie_host_init(struct pcie_port *pp)
struct device_node *np = dev->of_node;
struct platform_device *pdev = to_platform_device(dev);
struct pci_bus *bus, *child;
struct pci_host_bridge *bridge;
struct resource *cfg_res;
int i, ret;
LIST_HEAD(res);
struct resource_entry *win, *tmp;
cfg_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "config");
@@ -295,16 +295,21 @@ int dw_pcie_host_init(struct pcie_port *pp)
dev_err(dev, "missing *config* reg space\n");
}
ret = of_pci_get_host_bridge_resources(np, 0, 0xff, &res, &pp->io_base);
bridge = pci_alloc_host_bridge(0);
if (!bridge)
return -ENOMEM;
ret = of_pci_get_host_bridge_resources(np, 0, 0xff,
&bridge->windows, &pp->io_base);
if (ret)
return ret;
ret = devm_request_pci_bus_resources(dev, &res);
ret = devm_request_pci_bus_resources(dev, &bridge->windows);
if (ret)
goto error;
/* Get the I/O and memory ranges from DT */
resource_list_for_each_entry_safe(win, tmp, &res) {
resource_list_for_each_entry_safe(win, tmp, &bridge->windows) {
switch (resource_type(win->res)) {
case IORESOURCE_IO:
ret = pci_remap_iospace(win->res, pp->io_base);
@@ -400,27 +405,27 @@ int dw_pcie_host_init(struct pcie_port *pp)
pp->ops->host_init(pp);
pp->root_bus_nr = pp->busn->start;
bridge->dev.parent = dev;
bridge->sysdata = pp;
bridge->busnr = pp->root_bus_nr;
bridge->ops = &dw_pcie_ops;
bridge->map_irq = of_irq_parse_and_map_pci;
bridge->swizzle_irq = pci_common_swizzle;
if (IS_ENABLED(CONFIG_PCI_MSI)) {
bus = pci_scan_root_bus_msi(dev, pp->root_bus_nr,
&dw_pcie_ops, pp, &res,
&dw_pcie_msi_chip);
bridge->msi = &dw_pcie_msi_chip;
dw_pcie_msi_chip.dev = dev;
} else
bus = pci_scan_root_bus(dev, pp->root_bus_nr, &dw_pcie_ops,
pp, &res);
if (!bus) {
ret = -ENOMEM;
goto error;
}
ret = pci_scan_root_bus_bridge(bridge);
if (ret)
goto error;
bus = bridge->bus;
if (pp->ops->scan_bus)
pp->ops->scan_bus(pp);
#ifdef CONFIG_ARM
/* support old dtbs that incorrectly describe IRQs */
pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
#endif
pci_bus_size_bridges(bus);
pci_bus_assign_resources(bus);
@@ -431,7 +436,7 @@ int dw_pcie_host_init(struct pcie_port *pp)
return 0;
error:
pci_free_resource_list(&res);
pci_free_host_bridge(bridge);
return ret;
}
+15 -6
View File
@@ -886,12 +886,14 @@ static int advk_pcie_probe(struct platform_device *pdev)
struct advk_pcie *pcie;
struct resource *res;
struct pci_bus *bus, *child;
struct pci_host_bridge *bridge;
int ret, irq;
pcie = devm_kzalloc(dev, sizeof(struct advk_pcie), GFP_KERNEL);
if (!pcie)
bridge = devm_pci_alloc_host_bridge(dev, sizeof(struct advk_pcie));
if (!bridge)
return -ENOMEM;
pcie = pci_host_bridge_priv(bridge);
pcie->pdev = pdev;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -929,14 +931,21 @@ static int advk_pcie_probe(struct platform_device *pdev)
return ret;
}
bus = pci_scan_root_bus(dev, 0, &advk_pcie_ops,
pcie, &pcie->resources);
if (!bus) {
list_splice_init(&pcie->resources, &bridge->windows);
bridge->dev.parent = dev;
bridge->sysdata = pcie;
bridge->busnr = 0;
bridge->ops = &advk_pcie_ops;
ret = pci_scan_root_bus_bridge(bridge);
if (ret < 0) {
advk_pcie_remove_msi_irq_domain(pcie);
advk_pcie_remove_irq_domain(pcie);
return -ENOMEM;
return ret;
}
bus = bridge->bus;
pci_bus_assign_resources(bus);
list_for_each_entry(child, &bus->children, node)
+51 -36
View File
@@ -178,12 +178,11 @@ static int faraday_res_to_memcfg(resource_size_t mem_base,
return 0;
}
static int faraday_pci_read_config(struct pci_bus *bus, unsigned int fn,
int config, int size, u32 *value)
static int faraday_raw_pci_read_config(struct faraday_pci *p, int bus_number,
unsigned int fn, int config, int size,
u32 *value)
{
struct faraday_pci *p = bus->sysdata;
writel(PCI_CONF_BUS(bus->number) |
writel(PCI_CONF_BUS(bus_number) |
PCI_CONF_DEVICE(PCI_SLOT(fn)) |
PCI_CONF_FUNCTION(PCI_FUNC(fn)) |
PCI_CONF_WHERE(config) |
@@ -197,24 +196,28 @@ static int faraday_pci_read_config(struct pci_bus *bus, unsigned int fn,
else if (size == 2)
*value = (*value >> (8 * (config & 3))) & 0xFFFF;
return PCIBIOS_SUCCESSFUL;
}
static int faraday_pci_read_config(struct pci_bus *bus, unsigned int fn,
int config, int size, u32 *value)
{
struct faraday_pci *p = bus->sysdata;
dev_dbg(&bus->dev,
"[read] slt: %.2d, fnc: %d, cnf: 0x%.2X, val (%d bytes): 0x%.8X\n",
PCI_SLOT(fn), PCI_FUNC(fn), config, size, *value);
return PCIBIOS_SUCCESSFUL;
return faraday_raw_pci_read_config(p, bus->number, fn, config, size, value);
}
static int faraday_pci_write_config(struct pci_bus *bus, unsigned int fn,
int config, int size, u32 value)
static int faraday_raw_pci_write_config(struct faraday_pci *p, int bus_number,
unsigned int fn, int config, int size,
u32 value)
{
struct faraday_pci *p = bus->sysdata;
int ret = PCIBIOS_SUCCESSFUL;
dev_dbg(&bus->dev,
"[write] slt: %.2d, fnc: %d, cnf: 0x%.2X, val (%d bytes): 0x%.8X\n",
PCI_SLOT(fn), PCI_FUNC(fn), config, size, value);
writel(PCI_CONF_BUS(bus->number) |
writel(PCI_CONF_BUS(bus_number) |
PCI_CONF_DEVICE(PCI_SLOT(fn)) |
PCI_CONF_FUNCTION(PCI_FUNC(fn)) |
PCI_CONF_WHERE(config) |
@@ -238,6 +241,19 @@ static int faraday_pci_write_config(struct pci_bus *bus, unsigned int fn,
return ret;
}
static int faraday_pci_write_config(struct pci_bus *bus, unsigned int fn,
int config, int size, u32 value)
{
struct faraday_pci *p = bus->sysdata;
dev_dbg(&bus->dev,
"[write] slt: %.2d, fnc: %d, cnf: 0x%.2X, val (%d bytes): 0x%.8X\n",
PCI_SLOT(fn), PCI_FUNC(fn), config, size, value);
return faraday_raw_pci_write_config(p, bus->number, fn, config, size,
value);
}
static struct pci_ops faraday_pci_ops = {
.read = faraday_pci_read_config,
.write = faraday_pci_write_config,
@@ -248,10 +264,10 @@ static void faraday_pci_ack_irq(struct irq_data *d)
struct faraday_pci *p = irq_data_get_irq_chip_data(d);
unsigned int reg;
faraday_pci_read_config(p->bus, 0, FARADAY_PCI_CTRL2, 4, &reg);
faraday_raw_pci_read_config(p, 0, 0, FARADAY_PCI_CTRL2, 4, &reg);
reg &= ~(0xF << PCI_CTRL2_INTSTS_SHIFT);
reg |= BIT(irqd_to_hwirq(d) + PCI_CTRL2_INTSTS_SHIFT);
faraday_pci_write_config(p->bus, 0, FARADAY_PCI_CTRL2, 4, reg);
faraday_raw_pci_write_config(p, 0, 0, FARADAY_PCI_CTRL2, 4, reg);
}
static void faraday_pci_mask_irq(struct irq_data *d)
@@ -259,10 +275,10 @@ static void faraday_pci_mask_irq(struct irq_data *d)
struct faraday_pci *p = irq_data_get_irq_chip_data(d);
unsigned int reg;
faraday_pci_read_config(p->bus, 0, FARADAY_PCI_CTRL2, 4, &reg);
faraday_raw_pci_read_config(p, 0, 0, FARADAY_PCI_CTRL2, 4, &reg);
reg &= ~((0xF << PCI_CTRL2_INTSTS_SHIFT)
| BIT(irqd_to_hwirq(d) + PCI_CTRL2_INTMASK_SHIFT));
faraday_pci_write_config(p->bus, 0, FARADAY_PCI_CTRL2, 4, reg);
faraday_raw_pci_write_config(p, 0, 0, FARADAY_PCI_CTRL2, 4, reg);
}
static void faraday_pci_unmask_irq(struct irq_data *d)
@@ -270,10 +286,10 @@ static void faraday_pci_unmask_irq(struct irq_data *d)
struct faraday_pci *p = irq_data_get_irq_chip_data(d);
unsigned int reg;
faraday_pci_read_config(p->bus, 0, FARADAY_PCI_CTRL2, 4, &reg);
faraday_raw_pci_read_config(p, 0, 0, FARADAY_PCI_CTRL2, 4, &reg);
reg &= ~(0xF << PCI_CTRL2_INTSTS_SHIFT);
reg |= BIT(irqd_to_hwirq(d) + PCI_CTRL2_INTMASK_SHIFT);
faraday_pci_write_config(p->bus, 0, FARADAY_PCI_CTRL2, 4, reg);
faraday_raw_pci_write_config(p, 0, 0, FARADAY_PCI_CTRL2, 4, reg);
}
static void faraday_pci_irq_handler(struct irq_desc *desc)
@@ -282,7 +298,7 @@ static void faraday_pci_irq_handler(struct irq_desc *desc)
struct irq_chip *irqchip = irq_desc_get_chip(desc);
unsigned int irq_stat, reg, i;
faraday_pci_read_config(p->bus, 0, FARADAY_PCI_CTRL2, 4, &reg);
faraday_raw_pci_read_config(p, 0, 0, FARADAY_PCI_CTRL2, 4, &reg);
irq_stat = reg >> PCI_CTRL2_INTSTS_SHIFT;
chained_irq_enter(irqchip, desc);
@@ -403,8 +419,8 @@ static int faraday_pci_parse_map_dma_ranges(struct faraday_pci *p,
dev_info(dev, "DMA MEM%d BASE: 0x%016llx -> 0x%016llx config %08x\n",
i + 1, range.pci_addr, end, val);
if (i <= 2) {
faraday_pci_write_config(p->bus, 0, confreg[i],
4, val);
faraday_raw_pci_write_config(p, 0, 0, confreg[i],
4, val);
} else {
dev_err(dev, "ignore extraneous dma-range %d\n", i);
break;
@@ -432,7 +448,7 @@ static int faraday_pci_probe(struct platform_device *pdev)
u32 val;
LIST_HEAD(res);
host = pci_alloc_host_bridge(sizeof(*p));
host = devm_pci_alloc_host_bridge(dev, sizeof(*p));
if (!host)
return -ENOMEM;
@@ -440,6 +456,8 @@ static int faraday_pci_probe(struct platform_device *pdev)
host->ops = &faraday_pci_ops;
host->busnr = 0;
host->msi = NULL;
host->map_irq = of_irq_parse_and_map_pci;
host->swizzle_irq = pci_common_swizzle;
p = pci_host_bridge_priv(host);
host->sysdata = p;
p->dev = dev;
@@ -496,17 +514,8 @@ static int faraday_pci_probe(struct platform_device *pdev)
val |= PCI_COMMAND_MEMORY;
val |= PCI_COMMAND_MASTER;
writel(val, p->base + PCI_CTRL);
list_splice_init(&res, &host->windows);
ret = pci_register_host_bridge(host);
if (ret) {
dev_err(dev, "failed to register host: %d\n", ret);
return ret;
}
p->bus = host->bus;
/* Mask and clear all interrupts */
faraday_pci_write_config(p->bus, 0, FARADAY_PCI_CTRL2 + 2, 2, 0xF000);
faraday_raw_pci_write_config(p, 0, 0, FARADAY_PCI_CTRL2 + 2, 2, 0xF000);
if (variant->cascaded_irq) {
ret = faraday_pci_setup_cascaded_irq(p);
if (ret) {
@@ -519,8 +528,14 @@ static int faraday_pci_probe(struct platform_device *pdev)
if (ret)
return ret;
pci_scan_child_bus(p->bus);
pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
list_splice_init(&res, &host->windows);
ret = pci_scan_root_bus_bridge(host);
if (ret) {
dev_err(dev, "failed to scan host: %d\n", ret);
return ret;
}
p->bus = host->bus;
pci_bus_assign_resources(p->bus);
pci_bus_add_devices(p->bus);
pci_free_resource_list(&res);
+19 -8
View File
@@ -117,8 +117,14 @@ int pci_host_common_probe(struct platform_device *pdev,
struct device *dev = &pdev->dev;
struct device_node *np = dev->of_node;
struct pci_bus *bus, *child;
struct pci_host_bridge *bridge;
struct pci_config_window *cfg;
struct list_head resources;
int ret;
bridge = devm_pci_alloc_host_bridge(dev, 0);
if (!bridge)
return -ENOMEM;
type = of_get_property(np, "device_type", NULL);
if (!type || strcmp(type, "pci")) {
@@ -138,16 +144,21 @@ int pci_host_common_probe(struct platform_device *pdev,
if (!pci_has_flag(PCI_PROBE_ONLY))
pci_add_flags(PCI_REASSIGN_ALL_RSRC | PCI_REASSIGN_ALL_BUS);
bus = pci_scan_root_bus(dev, cfg->busr.start, &ops->pci_ops, cfg,
&resources);
if (!bus) {
dev_err(dev, "Scanning rootbus failed");
return -ENODEV;
list_splice_init(&resources, &bridge->windows);
bridge->dev.parent = dev;
bridge->sysdata = cfg;
bridge->busnr = cfg->busr.start;
bridge->ops = &ops->pci_ops;
bridge->map_irq = of_irq_parse_and_map_pci;
bridge->swizzle_irq = pci_common_swizzle;
ret = pci_scan_root_bus_bridge(bridge);
if (ret < 0) {
dev_err(dev, "Scanning root bridge failed");
return ret;
}
#ifdef CONFIG_ARM
pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
#endif
bus = bridge->bus;
/*
* We insert PCI resources into the iomem_resource and
+4 -5
View File
@@ -2238,7 +2238,7 @@ static int tegra_pcie_probe(struct platform_device *pdev)
struct pci_bus *child;
int err;
host = pci_alloc_host_bridge(sizeof(*pcie));
host = devm_pci_alloc_host_bridge(dev, sizeof(*pcie));
if (!host)
return -ENOMEM;
@@ -2284,16 +2284,15 @@ static int tegra_pcie_probe(struct platform_device *pdev)
host->busnr = pcie->busn.start;
host->dev.parent = &pdev->dev;
host->ops = &tegra_pcie_ops;
host->map_irq = tegra_pcie_map_irq;
host->swizzle_irq = pci_common_swizzle;
err = pci_register_host_bridge(host);
err = pci_scan_root_bus_bridge(host);
if (err < 0) {
dev_err(dev, "failed to register host: %d\n", err);
goto disable_msi;
}
pci_scan_child_bus(host->bus);
pci_fixup_irqs(pci_common_swizzle, tegra_pcie_map_irq);
pci_bus_size_bridges(host->bus);
pci_bus_assign_resources(host->bus);
+18 -4
View File
@@ -125,8 +125,13 @@ static int versatile_pci_probe(struct platform_device *pdev)
u32 val;
void __iomem *local_pci_cfg_base;
struct pci_bus *bus, *child;
struct pci_host_bridge *bridge;
LIST_HEAD(pci_res);
bridge = devm_pci_alloc_host_bridge(&pdev->dev, 0);
if (!bridge)
return -ENOMEM;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
versatile_pci_base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(versatile_pci_base))
@@ -199,11 +204,20 @@ static int versatile_pci_probe(struct platform_device *pdev)
pci_add_flags(PCI_ENABLE_PROC_DOMAINS);
pci_add_flags(PCI_REASSIGN_ALL_BUS | PCI_REASSIGN_ALL_RSRC);
bus = pci_scan_root_bus(&pdev->dev, 0, &pci_versatile_ops, NULL, &pci_res);
if (!bus)
return -ENOMEM;
list_splice_init(&pci_res, &bridge->windows);
bridge->dev.parent = &pdev->dev;
bridge->sysdata = NULL;
bridge->busnr = 0;
bridge->ops = &pci_versatile_ops;
bridge->map_irq = of_irq_parse_and_map_pci;
bridge->swizzle_irq = pci_common_swizzle;
ret = pci_scan_root_bus_bridge(bridge);
if (ret < 0)
return ret;
bus = bridge->bus;
pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
pci_assign_unassigned_bus_resources(bus);
list_for_each_entry(child, &bus->children, node)
pcie_bus_configure_settings(child);
+17 -6
View File
@@ -636,13 +636,16 @@ static int xgene_pcie_probe_bridge(struct platform_device *pdev)
struct xgene_pcie_port *port;
resource_size_t iobase = 0;
struct pci_bus *bus, *child;
struct pci_host_bridge *bridge;
int ret;
LIST_HEAD(res);
port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL);
if (!port)
bridge = devm_pci_alloc_host_bridge(dev, sizeof(*port));
if (!bridge)
return -ENOMEM;
port = pci_host_bridge_priv(bridge);
port->node = of_node_get(dn);
port->dev = dev;
@@ -670,11 +673,19 @@ static int xgene_pcie_probe_bridge(struct platform_device *pdev)
if (ret)
goto error;
bus = pci_create_root_bus(dev, 0, &xgene_pcie_ops, port, &res);
if (!bus) {
ret = -ENOMEM;
list_splice_init(&res, &bridge->windows);
bridge->dev.parent = dev;
bridge->sysdata = port;
bridge->busnr = 0;
bridge->ops = &xgene_pcie_ops;
bridge->map_irq = of_irq_parse_and_map_pci;
bridge->swizzle_irq = pci_common_swizzle;
ret = pci_scan_root_bus_bridge(bridge);
if (ret < 0)
goto error;
}
bus = bridge->bus;
pci_scan_child_bus(bus);
pci_assign_unassigned_bus_resources(bus);
+17 -7
View File
@@ -579,12 +579,14 @@ static int altera_pcie_probe(struct platform_device *pdev)
struct altera_pcie *pcie;
struct pci_bus *bus;
struct pci_bus *child;
struct pci_host_bridge *bridge;
int ret;
pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
if (!pcie)
bridge = devm_pci_alloc_host_bridge(dev, sizeof(*pcie));
if (!bridge)
return -ENOMEM;
pcie = pci_host_bridge_priv(bridge);
pcie->pdev = pdev;
ret = altera_pcie_parse_dt(pcie);
@@ -613,12 +615,20 @@ static int altera_pcie_probe(struct platform_device *pdev)
cra_writel(pcie, P2A_INT_ENA_ALL, P2A_INT_ENABLE);
altera_pcie_host_init(pcie);
bus = pci_scan_root_bus(dev, pcie->root_bus_nr, &altera_pcie_ops,
pcie, &pcie->resources);
if (!bus)
return -ENOMEM;
list_splice_init(&pcie->resources, &bridge->windows);
bridge->dev.parent = dev;
bridge->sysdata = pcie;
bridge->busnr = pcie->root_bus_nr;
bridge->ops = &altera_pcie_ops;
bridge->map_irq = of_irq_parse_and_map_pci;
bridge->swizzle_irq = pci_common_swizzle;
ret = pci_scan_root_bus_bridge(bridge);
if (ret < 0)
return ret;
bus = bridge->bus;
pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
pci_assign_unassigned_bus_resources(bus);
/* Configure PCI Express setting. */

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