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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6 into for-davem
This commit is contained in:
@@ -290,7 +290,7 @@ struct mib_mac_mgmt {
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u8 res;
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u8 multi_domain_capability_implemented;
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u8 multi_domain_capability_enabled;
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u8 country_string[3];
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u8 country_string[IEEE80211_COUNTRY_STRING_LEN];
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u8 reserved[3];
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} __packed;
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@@ -93,7 +93,7 @@ static int ath_ahb_probe(struct platform_device *pdev)
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goto err_out;
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}
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mem = ioremap_nocache(res->start, res->end - res->start + 1);
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mem = ioremap_nocache(res->start, resource_size(res));
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if (mem == NULL) {
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dev_err(&pdev->dev, "ioremap failed\n");
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ret = -ENOMEM;
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@@ -513,7 +513,7 @@ enum ath5k_tx_queue_id {
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AR5K_TX_QUEUE_ID_NOQCU_DATA = 0,
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AR5K_TX_QUEUE_ID_NOQCU_BEACON = 1,
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AR5K_TX_QUEUE_ID_DATA_MIN = 0, /*IEEE80211_TX_QUEUE_DATA0*/
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AR5K_TX_QUEUE_ID_DATA_MAX = 4, /*IEEE80211_TX_QUEUE_DATA4*/
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AR5K_TX_QUEUE_ID_DATA_MAX = 3, /*IEEE80211_TX_QUEUE_DATA3*/
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AR5K_TX_QUEUE_ID_DATA_SVP = 5, /*IEEE80211_TX_QUEUE_SVP - Spectralink Voice Protocol*/
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AR5K_TX_QUEUE_ID_CAB = 6, /*IEEE80211_TX_QUEUE_AFTER_BEACON*/
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AR5K_TX_QUEUE_ID_BEACON = 7, /*IEEE80211_TX_QUEUE_BEACON*/
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@@ -442,19 +442,9 @@ ath5k_chan_set(struct ath5k_softc *sc, struct ieee80211_channel *chan)
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return ath5k_reset(sc, chan, true);
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}
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struct ath_vif_iter_data {
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const u8 *hw_macaddr;
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u8 mask[ETH_ALEN];
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u8 active_mac[ETH_ALEN]; /* first active MAC */
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bool need_set_hw_addr;
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bool found_active;
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bool any_assoc;
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enum nl80211_iftype opmode;
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};
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static void ath_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
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void ath5k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
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{
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struct ath_vif_iter_data *iter_data = data;
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struct ath5k_vif_iter_data *iter_data = data;
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int i;
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struct ath5k_vif *avf = (void *)vif->drv_priv;
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@@ -484,9 +474,12 @@ static void ath_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
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*/
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if (avf->opmode == NL80211_IFTYPE_AP)
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iter_data->opmode = NL80211_IFTYPE_AP;
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else
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else {
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if (avf->opmode == NL80211_IFTYPE_STATION)
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iter_data->n_stas++;
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if (iter_data->opmode == NL80211_IFTYPE_UNSPECIFIED)
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iter_data->opmode = avf->opmode;
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}
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}
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void
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@@ -494,7 +487,8 @@ ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc,
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struct ieee80211_vif *vif)
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{
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struct ath_common *common = ath5k_hw_common(sc->ah);
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struct ath_vif_iter_data iter_data;
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struct ath5k_vif_iter_data iter_data;
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u32 rfilt;
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/*
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* Use the hardware MAC address as reference, the hardware uses it
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@@ -505,12 +499,13 @@ ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc,
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iter_data.found_active = false;
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iter_data.need_set_hw_addr = true;
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iter_data.opmode = NL80211_IFTYPE_UNSPECIFIED;
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iter_data.n_stas = 0;
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if (vif)
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ath_vif_iter(&iter_data, vif->addr, vif);
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ath5k_vif_iter(&iter_data, vif->addr, vif);
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/* Get list of all active MAC addresses */
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ieee80211_iterate_active_interfaces_atomic(sc->hw, ath_vif_iter,
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ieee80211_iterate_active_interfaces_atomic(sc->hw, ath5k_vif_iter,
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&iter_data);
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memcpy(sc->bssidmask, iter_data.mask, ETH_ALEN);
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@@ -528,20 +523,19 @@ ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc,
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if (ath5k_hw_hasbssidmask(sc->ah))
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ath5k_hw_set_bssid_mask(sc->ah, sc->bssidmask);
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}
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void
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ath5k_mode_setup(struct ath5k_softc *sc, struct ieee80211_vif *vif)
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{
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struct ath5k_hw *ah = sc->ah;
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u32 rfilt;
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/* Set up RX Filter */
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if (iter_data.n_stas > 1) {
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/* If you have multiple STA interfaces connected to
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* different APs, ARPs are not received (most of the time?)
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* Enabling PROMISC appears to fix that probem.
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*/
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sc->filter_flags |= AR5K_RX_FILTER_PROM;
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}
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/* configure rx filter */
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rfilt = sc->filter_flags;
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ath5k_hw_set_rx_filter(ah, rfilt);
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ath5k_hw_set_rx_filter(sc->ah, rfilt);
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ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "RX filter 0x%x\n", rfilt);
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ath5k_update_bssid_mask_and_opmode(sc, vif);
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}
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static inline int
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@@ -1117,7 +1111,7 @@ ath5k_rx_start(struct ath5k_softc *sc)
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spin_unlock_bh(&sc->rxbuflock);
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ath5k_hw_start_rx_dma(ah); /* enable recv descriptors */
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ath5k_mode_setup(sc, NULL); /* set filters, etc. */
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ath5k_update_bssid_mask_and_opmode(sc, NULL); /* set filters, etc. */
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ath5k_hw_start_rx_pcu(ah); /* re-enable PCU/DMA engine */
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return 0;
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@@ -2923,13 +2917,13 @@ ath5k_deinit_softc(struct ath5k_softc *sc)
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bool
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ath_any_vif_assoc(struct ath5k_softc *sc)
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{
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struct ath_vif_iter_data iter_data;
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struct ath5k_vif_iter_data iter_data;
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iter_data.hw_macaddr = NULL;
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iter_data.any_assoc = false;
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iter_data.need_set_hw_addr = false;
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iter_data.found_active = true;
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ieee80211_iterate_active_interfaces_atomic(sc->hw, ath_vif_iter,
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ieee80211_iterate_active_interfaces_atomic(sc->hw, ath5k_vif_iter,
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&iter_data);
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return iter_data.any_assoc;
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}
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@@ -259,6 +259,19 @@ struct ath5k_softc {
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struct survey_info survey; /* collected survey info */
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};
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struct ath5k_vif_iter_data {
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const u8 *hw_macaddr;
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u8 mask[ETH_ALEN];
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u8 active_mac[ETH_ALEN]; /* first active MAC */
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bool need_set_hw_addr;
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bool found_active;
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bool any_assoc;
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enum nl80211_iftype opmode;
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int n_stas;
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};
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void ath5k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif);
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#define ath5k_hw_hasbssidmask(_ah) \
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(ath5k_hw_get_capability(_ah, AR5K_CAP_BSSIDMASK, 0, NULL) == 0)
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#define ath5k_hw_hasveol(_ah) \
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@@ -158,8 +158,7 @@ ath5k_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
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memcpy(&avf->lladdr, vif->addr, ETH_ALEN);
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ath5k_mode_setup(sc, vif);
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ath5k_update_bssid_mask_and_opmode(sc, vif);
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ret = 0;
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end:
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mutex_unlock(&sc->lock);
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@@ -381,6 +380,7 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
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struct ath5k_softc *sc = hw->priv;
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struct ath5k_hw *ah = sc->ah;
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u32 mfilt[2], rfilt;
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struct ath5k_vif_iter_data iter_data; /* to count STA interfaces */
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mutex_lock(&sc->lock);
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@@ -454,6 +454,21 @@ ath5k_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
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break;
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}
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iter_data.hw_macaddr = NULL;
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iter_data.n_stas = 0;
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iter_data.need_set_hw_addr = false;
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ieee80211_iterate_active_interfaces_atomic(sc->hw, ath5k_vif_iter,
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&iter_data);
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/* Set up RX Filter */
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if (iter_data.n_stas > 1) {
|
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/* If you have multiple STA interfaces connected to
|
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* different APs, ARPs are not received (most of the time?)
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* Enabling PROMISC appears to fix that probem.
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*/
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rfilt |= AR5K_RX_FILTER_PROM;
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}
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/* Set filters */
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ath5k_hw_set_rx_filter(ah, rfilt);
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@@ -75,7 +75,7 @@ static int ath_ahb_probe(struct platform_device *pdev)
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goto err_out;
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}
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mem = ioremap_nocache(res->start, res->end - res->start + 1);
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mem = ioremap_nocache(res->start, resource_size(res));
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if (mem == NULL) {
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dev_err(&pdev->dev, "ioremap failed\n");
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ret = -ENOMEM;
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@@ -1020,28 +1020,29 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah,
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static void ar9003_hw_do_getnf(struct ath_hw *ah,
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int16_t nfarray[NUM_NF_READINGS])
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{
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#define AR_PHY_CH_MINCCA_PWR 0x1FF00000
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#define AR_PHY_CH_MINCCA_PWR_S 20
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#define AR_PHY_CH_EXT_MINCCA_PWR 0x01FF0000
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#define AR_PHY_CH_EXT_MINCCA_PWR_S 16
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int16_t nf;
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int i;
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||||
nf = MS(REG_READ(ah, AR_PHY_CCA_0), AR_PHY_MINCCA_PWR);
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nfarray[0] = sign_extend32(nf, 8);
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for (i = 0; i < AR9300_MAX_CHAINS; i++) {
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if (ah->rxchainmask & BIT(i)) {
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nf = MS(REG_READ(ah, ah->nf_regs[i]),
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AR_PHY_CH_MINCCA_PWR);
|
||||
nfarray[i] = sign_extend32(nf, 8);
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||||
nf = MS(REG_READ(ah, AR_PHY_CCA_1), AR_PHY_CH1_MINCCA_PWR);
|
||||
nfarray[1] = sign_extend32(nf, 8);
|
||||
if (IS_CHAN_HT40(ah->curchan)) {
|
||||
u8 ext_idx = AR9300_MAX_CHAINS + i;
|
||||
|
||||
nf = MS(REG_READ(ah, AR_PHY_CCA_2), AR_PHY_CH2_MINCCA_PWR);
|
||||
nfarray[2] = sign_extend32(nf, 8);
|
||||
|
||||
if (!IS_CHAN_HT40(ah->curchan))
|
||||
return;
|
||||
|
||||
nf = MS(REG_READ(ah, AR_PHY_EXT_CCA), AR_PHY_EXT_MINCCA_PWR);
|
||||
nfarray[3] = sign_extend32(nf, 8);
|
||||
|
||||
nf = MS(REG_READ(ah, AR_PHY_EXT_CCA_1), AR_PHY_CH1_EXT_MINCCA_PWR);
|
||||
nfarray[4] = sign_extend32(nf, 8);
|
||||
|
||||
nf = MS(REG_READ(ah, AR_PHY_EXT_CCA_2), AR_PHY_CH2_EXT_MINCCA_PWR);
|
||||
nfarray[5] = sign_extend32(nf, 8);
|
||||
nf = MS(REG_READ(ah, ah->nf_regs[ext_idx]),
|
||||
AR_PHY_CH_EXT_MINCCA_PWR);
|
||||
nfarray[ext_idx] = sign_extend32(nf, 8);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void ar9003_hw_set_nf_limits(struct ath_hw *ah)
|
||||
|
||||
@@ -15,6 +15,7 @@
|
||||
*/
|
||||
|
||||
#include <linux/slab.h>
|
||||
#include <linux/vmalloc.h>
|
||||
#include <asm/unaligned.h>
|
||||
|
||||
#include "ath9k.h"
|
||||
@@ -30,6 +31,19 @@ static int ath9k_debugfs_open(struct inode *inode, struct file *file)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static ssize_t ath9k_debugfs_read_buf(struct file *file, char __user *user_buf,
|
||||
size_t count, loff_t *ppos)
|
||||
{
|
||||
u8 *buf = file->private_data;
|
||||
return simple_read_from_buffer(user_buf, count, ppos, buf, strlen(buf));
|
||||
}
|
||||
|
||||
static int ath9k_debugfs_release_buf(struct inode *inode, struct file *file)
|
||||
{
|
||||
vfree(file->private_data);
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ATH_DEBUG
|
||||
|
||||
static ssize_t read_file_debug(struct file *file, char __user *user_buf,
|
||||
@@ -548,10 +562,10 @@ static ssize_t read_file_xmit(struct file *file, char __user *user_buf,
|
||||
PR("hw-tx-proc-desc: ", txprocdesc);
|
||||
len += snprintf(buf + len, size - len,
|
||||
"%s%11p%11p%10p%10p\n", "txq-memory-address:",
|
||||
&(sc->tx.txq_map[WME_AC_BE]),
|
||||
&(sc->tx.txq_map[WME_AC_BK]),
|
||||
&(sc->tx.txq_map[WME_AC_VI]),
|
||||
&(sc->tx.txq_map[WME_AC_VO]));
|
||||
sc->tx.txq_map[WME_AC_BE],
|
||||
sc->tx.txq_map[WME_AC_BK],
|
||||
sc->tx.txq_map[WME_AC_VI],
|
||||
sc->tx.txq_map[WME_AC_VO]);
|
||||
if (len >= size)
|
||||
goto done;
|
||||
|
||||
@@ -1027,6 +1041,42 @@ static const struct file_operations fops_regval = {
|
||||
.llseek = default_llseek,
|
||||
};
|
||||
|
||||
#define REGDUMP_LINE_SIZE 20
|
||||
|
||||
static int open_file_regdump(struct inode *inode, struct file *file)
|
||||
{
|
||||
struct ath_softc *sc = inode->i_private;
|
||||
unsigned int len = 0;
|
||||
u8 *buf;
|
||||
int i;
|
||||
unsigned long num_regs, regdump_len, max_reg_offset;
|
||||
|
||||
max_reg_offset = AR_SREV_9300_20_OR_LATER(sc->sc_ah) ? 0x16bd4 : 0xb500;
|
||||
num_regs = max_reg_offset / 4 + 1;
|
||||
regdump_len = num_regs * REGDUMP_LINE_SIZE + 1;
|
||||
buf = vmalloc(regdump_len);
|
||||
if (!buf)
|
||||
return -ENOMEM;
|
||||
|
||||
ath9k_ps_wakeup(sc);
|
||||
for (i = 0; i < num_regs; i++)
|
||||
len += scnprintf(buf + len, regdump_len - len,
|
||||
"0x%06x 0x%08x\n", i << 2, REG_READ(sc->sc_ah, i << 2));
|
||||
ath9k_ps_restore(sc);
|
||||
|
||||
file->private_data = buf;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct file_operations fops_regdump = {
|
||||
.open = open_file_regdump,
|
||||
.read = ath9k_debugfs_read_buf,
|
||||
.release = ath9k_debugfs_release_buf,
|
||||
.owner = THIS_MODULE,
|
||||
.llseek = default_llseek,/* read accesses f_pos */
|
||||
};
|
||||
|
||||
int ath9k_init_debug(struct ath_hw *ah)
|
||||
{
|
||||
struct ath_common *common = ath9k_hw_common(ah);
|
||||
@@ -1091,6 +1141,10 @@ int ath9k_init_debug(struct ath_hw *ah)
|
||||
sc->debug.debugfs_phy, &ah->config.cwm_ignore_extcca))
|
||||
goto err;
|
||||
|
||||
if (!debugfs_create_file("regdump", S_IRUSR, sc->debug.debugfs_phy,
|
||||
sc, &fops_regdump))
|
||||
goto err;
|
||||
|
||||
sc->debug.regidx = 0;
|
||||
return 0;
|
||||
err:
|
||||
|
||||
@@ -92,7 +92,7 @@ config B43_PHY_N
|
||||
---help---
|
||||
Support for the N-PHY.
|
||||
|
||||
This enables support for devices with N-PHY revision up to 2.
|
||||
This enables support for devices with N-PHY.
|
||||
|
||||
Say N if you expect high stability and performance. Saying Y will not
|
||||
affect other devices support and may provide support for basic needs.
|
||||
|
||||
@@ -1168,23 +1168,98 @@ static void b43_nphy_adjust_lna_gain_table(struct b43_wldev *dev)
|
||||
static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
|
||||
{
|
||||
struct b43_phy_n *nphy = dev->phy.n;
|
||||
struct ssb_sprom *sprom = &(dev->dev->bus->sprom);
|
||||
|
||||
/* PHY rev 0, 1, 2 */
|
||||
u8 i, j;
|
||||
u8 code;
|
||||
u16 tmp;
|
||||
|
||||
/* TODO: for PHY >= 3
|
||||
s8 *lna1_gain, *lna2_gain;
|
||||
u8 *gain_db, *gain_bits;
|
||||
u16 *rfseq_init;
|
||||
u8 lpf_gain[6] = { 0x00, 0x06, 0x0C, 0x12, 0x12, 0x12 };
|
||||
u8 lpf_bits[6] = { 0, 1, 2, 3, 3, 3 };
|
||||
*/
|
||||
|
||||
u8 rfseq_events[3] = { 6, 8, 7 };
|
||||
u8 rfseq_delays[3] = { 10, 30, 1 };
|
||||
|
||||
/* PHY rev >= 3 */
|
||||
bool ghz5;
|
||||
bool ext_lna;
|
||||
u16 rssi_gain;
|
||||
struct nphy_gain_ctl_workaround_entry *e;
|
||||
u8 lpf_gain[6] = { 0x00, 0x06, 0x0C, 0x12, 0x12, 0x12 };
|
||||
u8 lpf_bits[6] = { 0, 1, 2, 3, 3, 3 };
|
||||
|
||||
if (dev->phy.rev >= 3) {
|
||||
/* TODO */
|
||||
/* Prepare values */
|
||||
ghz5 = b43_phy_read(dev, B43_NPHY_BANDCTL)
|
||||
& B43_NPHY_BANDCTL_5GHZ;
|
||||
ext_lna = sprom->boardflags_lo & B43_BFL_EXTLNA;
|
||||
e = b43_nphy_get_gain_ctl_workaround_ent(dev, ghz5, ext_lna);
|
||||
if (ghz5 && dev->phy.rev >= 5)
|
||||
rssi_gain = 0x90;
|
||||
else
|
||||
rssi_gain = 0x50;
|
||||
|
||||
b43_phy_set(dev, B43_NPHY_RXCTL, 0x0040);
|
||||
|
||||
/* Set Clip 2 detect */
|
||||
b43_phy_set(dev, B43_NPHY_C1_CGAINI,
|
||||
B43_NPHY_C1_CGAINI_CL2DETECT);
|
||||
b43_phy_set(dev, B43_NPHY_C2_CGAINI,
|
||||
B43_NPHY_C2_CGAINI_CL2DETECT);
|
||||
|
||||
b43_radio_write(dev, B2056_RX0 | B2056_RX_BIASPOLE_LNAG1_IDAC,
|
||||
0x17);
|
||||
b43_radio_write(dev, B2056_RX1 | B2056_RX_BIASPOLE_LNAG1_IDAC,
|
||||
0x17);
|
||||
b43_radio_write(dev, B2056_RX0 | B2056_RX_LNAG2_IDAC, 0xF0);
|
||||
b43_radio_write(dev, B2056_RX1 | B2056_RX_LNAG2_IDAC, 0xF0);
|
||||
b43_radio_write(dev, B2056_RX0 | B2056_RX_RSSI_POLE, 0x00);
|
||||
b43_radio_write(dev, B2056_RX1 | B2056_RX_RSSI_POLE, 0x00);
|
||||
b43_radio_write(dev, B2056_RX0 | B2056_RX_RSSI_GAIN,
|
||||
rssi_gain);
|
||||
b43_radio_write(dev, B2056_RX1 | B2056_RX_RSSI_GAIN,
|
||||
rssi_gain);
|
||||
b43_radio_write(dev, B2056_RX0 | B2056_RX_BIASPOLE_LNAA1_IDAC,
|
||||
0x17);
|
||||
b43_radio_write(dev, B2056_RX1 | B2056_RX_BIASPOLE_LNAA1_IDAC,
|
||||
0x17);
|
||||
b43_radio_write(dev, B2056_RX0 | B2056_RX_LNAA2_IDAC, 0xFF);
|
||||
b43_radio_write(dev, B2056_RX1 | B2056_RX_LNAA2_IDAC, 0xFF);
|
||||
|
||||
b43_ntab_write_bulk(dev, B43_NTAB8(0, 8), 4, e->lna1_gain);
|
||||
b43_ntab_write_bulk(dev, B43_NTAB8(1, 8), 4, e->lna1_gain);
|
||||
b43_ntab_write_bulk(dev, B43_NTAB8(0, 16), 4, e->lna2_gain);
|
||||
b43_ntab_write_bulk(dev, B43_NTAB8(1, 16), 4, e->lna2_gain);
|
||||
b43_ntab_write_bulk(dev, B43_NTAB8(0, 32), 10, e->gain_db);
|
||||
b43_ntab_write_bulk(dev, B43_NTAB8(1, 32), 10, e->gain_db);
|
||||
b43_ntab_write_bulk(dev, B43_NTAB8(2, 32), 10, e->gain_bits);
|
||||
b43_ntab_write_bulk(dev, B43_NTAB8(3, 32), 10, e->gain_bits);
|
||||
b43_ntab_write_bulk(dev, B43_NTAB8(0, 0x40), 6, lpf_gain);
|
||||
b43_ntab_write_bulk(dev, B43_NTAB8(1, 0x40), 6, lpf_gain);
|
||||
b43_ntab_write_bulk(dev, B43_NTAB8(2, 0x40), 6, lpf_bits);
|
||||
b43_ntab_write_bulk(dev, B43_NTAB8(3, 0x40), 6, lpf_bits);
|
||||
|
||||
b43_phy_write(dev, B43_NPHY_C1_INITGAIN, e->init_gain);
|
||||
b43_phy_write(dev, 0x2A7, e->init_gain);
|
||||
b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x106), 2,
|
||||
e->rfseq_init);
|
||||
b43_phy_write(dev, B43_NPHY_C1_INITGAIN, e->init_gain);
|
||||
|
||||
/* TODO: check defines. Do not match variables names */
|
||||
b43_phy_write(dev, B43_NPHY_C1_CLIP1_MEDGAIN, e->cliphi_gain);
|
||||
b43_phy_write(dev, 0x2A9, e->cliphi_gain);
|
||||
b43_phy_write(dev, B43_NPHY_C1_CLIP2_GAIN, e->clipmd_gain);
|
||||
b43_phy_write(dev, 0x2AB, e->clipmd_gain);
|
||||
b43_phy_write(dev, B43_NPHY_C2_CLIP1_HIGAIN, e->cliplo_gain);
|
||||
b43_phy_write(dev, 0x2AD, e->cliplo_gain);
|
||||
|
||||
b43_phy_maskset(dev, 0x27D, 0xFF00, e->crsmin);
|
||||
b43_phy_maskset(dev, 0x280, 0xFF00, e->crsminl);
|
||||
b43_phy_maskset(dev, 0x283, 0xFF00, e->crsminu);
|
||||
b43_phy_write(dev, B43_NPHY_C1_NBCLIPTHRES, e->nbclip);
|
||||
b43_phy_write(dev, B43_NPHY_C2_NBCLIPTHRES, e->nbclip);
|
||||
b43_phy_maskset(dev, B43_NPHY_C1_CLIPWBTHRES,
|
||||
~B43_NPHY_C1_CLIPWBTHRES_CLIP2, e->wlclip);
|
||||
b43_phy_maskset(dev, B43_NPHY_C2_CLIPWBTHRES,
|
||||
~B43_NPHY_C2_CLIPWBTHRES_CLIP2, e->wlclip);
|
||||
b43_phy_write(dev, B43_NPHY_CCK_SHIFTB_REF, 0x809C);
|
||||
} else {
|
||||
/* Set Clip 2 detect */
|
||||
b43_phy_set(dev, B43_NPHY_C1_CGAINI,
|
||||
@@ -1308,6 +1383,9 @@ static void b43_nphy_workarounds(struct b43_wldev *dev)
|
||||
u8 events2[7] = { 0x0, 0x3, 0x5, 0x4, 0x2, 0x1, 0x8 };
|
||||
u8 delays2[7] = { 0x8, 0x6, 0x2, 0x4, 0x4, 0x6, 0x1 };
|
||||
|
||||
u16 tmp16;
|
||||
u32 tmp32;
|
||||
|
||||
if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
|
||||
b43_nphy_classifier(dev, 1, 0);
|
||||
else
|
||||
@@ -1320,7 +1398,82 @@ static void b43_nphy_workarounds(struct b43_wldev *dev)
|
||||
B43_NPHY_IQFLIP_ADC1 | B43_NPHY_IQFLIP_ADC2);
|
||||
|
||||
if (dev->phy.rev >= 3) {
|
||||
tmp32 = b43_ntab_read(dev, B43_NTAB32(30, 0));
|
||||
tmp32 &= 0xffffff;
|
||||
b43_ntab_write(dev, B43_NTAB32(30, 0), tmp32);
|
||||
|
||||
b43_phy_write(dev, B43_NPHY_PHASETR_A0, 0x0125);
|
||||
b43_phy_write(dev, B43_NPHY_PHASETR_A1, 0x01B3);
|
||||
b43_phy_write(dev, B43_NPHY_PHASETR_A2, 0x0105);
|
||||
b43_phy_write(dev, B43_NPHY_PHASETR_B0, 0x016E);
|
||||
b43_phy_write(dev, B43_NPHY_PHASETR_B1, 0x00CD);
|
||||
b43_phy_write(dev, B43_NPHY_PHASETR_B2, 0x0020);
|
||||
|
||||
b43_phy_write(dev, B43_NPHY_C2_CLIP1_MEDGAIN, 0x000C);
|
||||
b43_phy_write(dev, 0x2AE, 0x000C);
|
||||
|
||||
/* TODO */
|
||||
|
||||
tmp16 = (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) ?
|
||||
0x2 : 0x9C40;
|
||||
b43_phy_write(dev, B43_NPHY_ENDROP_TLEN, tmp16);
|
||||
|
||||
b43_phy_maskset(dev, 0x294, 0xF0FF, 0x0700);
|
||||
|
||||
b43_ntab_write(dev, B43_NTAB32(16, 3), 0x18D);
|
||||
b43_ntab_write(dev, B43_NTAB32(16, 127), 0x18D);
|
||||
|
||||
b43_nphy_gain_ctrl_workarounds(dev);
|
||||
|
||||
b43_ntab_write(dev, B43_NTAB32(8, 0), 2);
|
||||
b43_ntab_write(dev, B43_NTAB32(8, 16), 2);
|
||||
|
||||
/* TODO */
|
||||
|
||||
b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXA_MAST_BIAS, 0x00);
|
||||
b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXA_MAST_BIAS, 0x00);
|
||||
b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXA_BIAS_MAIN, 0x06);
|
||||
b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXA_BIAS_MAIN, 0x06);
|
||||
b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXA_BIAS_AUX, 0x07);
|
||||
b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXA_BIAS_AUX, 0x07);
|
||||
b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXA_LOB_BIAS, 0x88);
|
||||
b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXA_LOB_BIAS, 0x88);
|
||||
b43_radio_write(dev, B2056_RX0 | B2056_RX_MIXG_CMFB_IDAC, 0x00);
|
||||
b43_radio_write(dev, B2056_RX1 | B2056_RX_MIXG_CMFB_IDAC, 0x00);
|
||||
|
||||
/* N PHY WAR TX Chain Update with hw_phytxchain as argument */
|
||||
|
||||
if ((bus->sprom.boardflags2_lo & B43_BFL2_APLL_WAR &&
|
||||
b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ||
|
||||
(bus->sprom.boardflags2_lo & B43_BFL2_GPLL_WAR &&
|
||||
b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ))
|
||||
tmp32 = 0x00088888;
|
||||
else
|
||||
tmp32 = 0x88888888;
|
||||
b43_ntab_write(dev, B43_NTAB32(30, 1), tmp32);
|
||||
b43_ntab_write(dev, B43_NTAB32(30, 2), tmp32);
|
||||
b43_ntab_write(dev, B43_NTAB32(30, 3), tmp32);
|
||||
|
||||
if (dev->phy.rev == 4 &&
|
||||
b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
|
||||
b43_radio_write(dev, B2056_TX0 | B2056_TX_GMBB_IDAC,
|
||||
0x70);
|
||||
b43_radio_write(dev, B2056_TX1 | B2056_TX_GMBB_IDAC,
|
||||
0x70);
|
||||
}
|
||||
|
||||
b43_phy_write(dev, 0x224, 0x039C);
|
||||
b43_phy_write(dev, 0x225, 0x0357);
|
||||
b43_phy_write(dev, 0x226, 0x0317);
|
||||
b43_phy_write(dev, 0x227, 0x02D7);
|
||||
b43_phy_write(dev, 0x228, 0x039C);
|
||||
b43_phy_write(dev, 0x229, 0x0357);
|
||||
b43_phy_write(dev, 0x22A, 0x0317);
|
||||
b43_phy_write(dev, 0x22B, 0x02D7);
|
||||
b43_phy_write(dev, 0x22C, 0x039C);
|
||||
b43_phy_write(dev, 0x22D, 0x0357);
|
||||
b43_phy_write(dev, 0x22E, 0x0317);
|
||||
b43_phy_write(dev, 0x22F, 0x02D7);
|
||||
} else {
|
||||
if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ &&
|
||||
nphy->band5g_pwrgain) {
|
||||
@@ -3878,10 +4031,14 @@ static void b43_nphy_op_software_rfkill(struct b43_wldev *dev,
|
||||
}
|
||||
}
|
||||
|
||||
/* http://bcm-v4.sipsolutions.net/802.11/PHY/Anacore */
|
||||
static void b43_nphy_op_switch_analog(struct b43_wldev *dev, bool on)
|
||||
{
|
||||
b43_phy_write(dev, B43_NPHY_AFECTL_OVER,
|
||||
on ? 0 : 0x7FFF);
|
||||
u16 val = on ? 0 : 0x7FFF;
|
||||
|
||||
if (dev->phy.rev >= 3)
|
||||
b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, val);
|
||||
b43_phy_write(dev, B43_NPHY_AFECTL_OVER, val);
|
||||
}
|
||||
|
||||
static int b43_nphy_op_switch_channel(struct b43_wldev *dev,
|
||||
|
||||
@@ -2709,6 +2709,79 @@ const struct nphy_rf_control_override_rev3 tbl_rf_control_override_rev3[] = {
|
||||
{ 0x00C0, 6, 0xE7, 0xF9, 0xEC, 0xFB } /* field == 0x4000 (fls 15) */
|
||||
};
|
||||
|
||||
struct nphy_gain_ctl_workaround_entry nphy_gain_ctl_workaround[2][3] = {
|
||||
{ /* 2GHz */
|
||||
{ /* PHY rev 3 */
|
||||
{ 7, 11, 16, 23 },
|
||||
{ -5, 6, 10, 14 },
|
||||
{ 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA },
|
||||
{ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 },
|
||||
0x627E,
|
||||
{ 0x613F, 0x613F, 0x613F, 0x613F },
|
||||
0x107E, 0x0066, 0x0074,
|
||||
0x18, 0x18, 0x18,
|
||||
0x020D, 0x5,
|
||||
},
|
||||
{ /* PHY rev 4 */
|
||||
{ 8, 12, 17, 25 },
|
||||
{ -5, 6, 10, 14 },
|
||||
{ 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA },
|
||||
{ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 },
|
||||
0x527E,
|
||||
{ 0x513F, 0x513F, 0x513F, 0x513F },
|
||||
0x007E, 0x0066, 0x0074,
|
||||
0x18, 0x18, 0x18,
|
||||
0x01A1, 0x5,
|
||||
},
|
||||
{ /* PHY rev 5+ */
|
||||
{ 9, 13, 18, 26 },
|
||||
{ -3, 7, 11, 16 },
|
||||
{ 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA, 0xA },
|
||||
{ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3 },
|
||||
0x427E, /* invalid for external LNA! */
|
||||
{ 0x413F, 0x413F, 0x413F, 0x413F }, /* invalid for external LNA! */
|
||||
0x1076, 0x0066, 0x106A,
|
||||
0xC, 0xC, 0xC,
|
||||
0x01D0, 0x5,
|
||||
},
|
||||
},
|
||||
{ /* 5GHz */
|
||||
{ /* PHY rev 3 */
|
||||
{ 7, 11, 17, 23 },
|
||||
{ -6, 2, 6, 10 },
|
||||
{ 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13, 0x13 },
|
||||
{ 6, 6, 6, 6, 6, 6, 6, 6, 6, 6 },
|
||||
0x52DE,
|
||||
{ 0x516F, 0x516F, 0x516F, 0x516F },
|
||||
0x00DE, 0x00CA, 0x00CC,
|
||||
0x1E, 0x1E, 0x1E,
|
||||
0x01A1, 25,
|
||||
},
|
||||
{ /* PHY rev 4 */
|
||||
{ 8, 12, 18, 23 },
|
||||
{ -5, 2, 6, 10 },
|
||||
{ 0xD, 0xD, 0xD, 0xD, 0xD, 0xD, 0xD, 0xD, 0xD, 0xD },
|
||||
{ 4, 4, 4, 4, 4, 4, 4, 4, 4, 4 },
|
||||
0x629E,
|
||||
{ 0x614F, 0x614F, 0x614F, 0x614F },
|
||||
0x029E, 0x1084, 0x0086,
|
||||
0x24, 0x24, 0x24,
|
||||
0x0107, 25,
|
||||
},
|
||||
{ /* PHY rev 5+ */
|
||||
{ 6, 10, 16, 21 },
|
||||
{ -7, 0, 4, 8 },
|
||||
{ 0xD, 0xD, 0xD, 0xD, 0xD, 0xD, 0xD, 0xD, 0xD, 0xD },
|
||||
{ 4, 4, 4, 4, 4, 4, 4, 4, 4, 4 },
|
||||
0x729E,
|
||||
{ 0x714F, 0x714F, 0x714F, 0x714F },
|
||||
0x029E, 0x2084, 0x2086,
|
||||
0x24, 0x24, 0x24,
|
||||
0x00A9, 25,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
static inline void assert_ntab_array_sizes(void)
|
||||
{
|
||||
#undef check
|
||||
@@ -2957,3 +3030,33 @@ void b43_nphy_rev3plus_tables_init(struct b43_wldev *dev)
|
||||
/* Volatile tables */
|
||||
/* TODO */
|
||||
}
|
||||
|
||||
struct nphy_gain_ctl_workaround_entry *b43_nphy_get_gain_ctl_workaround_ent(
|
||||
struct b43_wldev *dev, bool ghz5, bool ext_lna)
|
||||
{
|
||||
struct nphy_gain_ctl_workaround_entry *e;
|
||||
u8 phy_idx;
|
||||
|
||||
B43_WARN_ON(dev->phy.rev < 3);
|
||||
if (dev->phy.rev >= 5)
|
||||
phy_idx = 2;
|
||||
else if (dev->phy.rev == 4)
|
||||
phy_idx = 1;
|
||||
else
|
||||
phy_idx = 0;
|
||||
|
||||
e = &nphy_gain_ctl_workaround[ghz5][phy_idx];
|
||||
|
||||
/* Only one entry differs for external LNA, so instead making whole
|
||||
* table 2 times bigger, hack is here
|
||||
*/
|
||||
if (!ghz5 && dev->phy.rev >= 5 && ext_lna) {
|
||||
e->rfseq_init[0] &= 0x0FFF;
|
||||
e->rfseq_init[1] &= 0x0FFF;
|
||||
e->rfseq_init[2] &= 0x0FFF;
|
||||
e->rfseq_init[3] &= 0x0FFF;
|
||||
e->init_gain &= 0x0FFF;
|
||||
}
|
||||
|
||||
return e;
|
||||
}
|
||||
|
||||
@@ -35,6 +35,31 @@ struct nphy_rf_control_override_rev3 {
|
||||
u8 val_addr1;
|
||||
};
|
||||
|
||||
struct nphy_gain_ctl_workaround_entry {
|
||||
s8 lna1_gain[4];
|
||||
s8 lna2_gain[4];
|
||||
u8 gain_db[10];
|
||||
u8 gain_bits[10];
|
||||
|
||||
u16 init_gain;
|
||||
u16 rfseq_init[4];
|
||||
|
||||
u16 cliphi_gain;
|
||||
u16 clipmd_gain;
|
||||
u16 cliplo_gain;
|
||||
|
||||
u16 crsmin;
|
||||
u16 crsminl;
|
||||
u16 crsminu;
|
||||
|
||||
u16 nbclip;
|
||||
u16 wlclip;
|
||||
};
|
||||
|
||||
/* Get entry with workaround values for gain ctl. Does not return NULL. */
|
||||
struct nphy_gain_ctl_workaround_entry *b43_nphy_get_gain_ctl_workaround_ent(
|
||||
struct b43_wldev *dev, bool ghz5, bool ext_lna);
|
||||
|
||||
/* Get the NPHY Channel Switch Table entry for a channel.
|
||||
* Returns NULL on failure to find an entry. */
|
||||
const struct b43_nphy_channeltab_entry_rev2 *
|
||||
|
||||
@@ -961,7 +961,7 @@ struct ipw_country_channel_info {
|
||||
struct ipw_country_info {
|
||||
u8 id;
|
||||
u8 length;
|
||||
u8 country_str[3];
|
||||
u8 country_str[IEEE80211_COUNTRY_STRING_LEN];
|
||||
struct ipw_country_channel_info groups[7];
|
||||
} __packed;
|
||||
|
||||
|
||||
@@ -533,9 +533,10 @@ int iwlagn_send_tx_power(struct iwl_priv *priv)
|
||||
|
||||
void iwlagn_temperature(struct iwl_priv *priv)
|
||||
{
|
||||
/* store temperature from statistics (in Celsius) */
|
||||
priv->temperature =
|
||||
le32_to_cpu(priv->_agn.statistics.general.common.temperature);
|
||||
/* store temperature from correct statistics (in Celsius) */
|
||||
priv->temperature = le32_to_cpu((iwl_bt_statistics(priv)) ?
|
||||
priv->_agn.statistics_bt.general.common.temperature :
|
||||
priv->_agn.statistics.general.common.temperature);
|
||||
iwl_tt_handler(priv);
|
||||
}
|
||||
|
||||
@@ -994,241 +995,6 @@ int iwlagn_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band)
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* Calc max signal level (dBm) among 3 possible receivers */
|
||||
static inline int iwlagn_calc_rssi(struct iwl_priv *priv,
|
||||
struct iwl_rx_phy_res *rx_resp)
|
||||
{
|
||||
return priv->cfg->ops->utils->calc_rssi(priv, rx_resp);
|
||||
}
|
||||
|
||||
static u32 iwlagn_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
|
||||
{
|
||||
u32 decrypt_out = 0;
|
||||
|
||||
if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
|
||||
RX_RES_STATUS_STATION_FOUND)
|
||||
decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
|
||||
RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
|
||||
|
||||
decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
|
||||
|
||||
/* packet was not encrypted */
|
||||
if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
|
||||
RX_RES_STATUS_SEC_TYPE_NONE)
|
||||
return decrypt_out;
|
||||
|
||||
/* packet was encrypted with unknown alg */
|
||||
if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
|
||||
RX_RES_STATUS_SEC_TYPE_ERR)
|
||||
return decrypt_out;
|
||||
|
||||
/* decryption was not done in HW */
|
||||
if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
|
||||
RX_MPDU_RES_STATUS_DEC_DONE_MSK)
|
||||
return decrypt_out;
|
||||
|
||||
switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
|
||||
|
||||
case RX_RES_STATUS_SEC_TYPE_CCMP:
|
||||
/* alg is CCM: check MIC only */
|
||||
if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
|
||||
/* Bad MIC */
|
||||
decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
|
||||
else
|
||||
decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
|
||||
|
||||
break;
|
||||
|
||||
case RX_RES_STATUS_SEC_TYPE_TKIP:
|
||||
if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
|
||||
/* Bad TTAK */
|
||||
decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
|
||||
break;
|
||||
}
|
||||
/* fall through if TTAK OK */
|
||||
default:
|
||||
if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
|
||||
decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
|
||||
else
|
||||
decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
|
||||
break;
|
||||
}
|
||||
|
||||
IWL_DEBUG_RX(priv, "decrypt_in:0x%x decrypt_out = 0x%x\n",
|
||||
decrypt_in, decrypt_out);
|
||||
|
||||
return decrypt_out;
|
||||
}
|
||||
|
||||
static void iwlagn_pass_packet_to_mac80211(struct iwl_priv *priv,
|
||||
struct ieee80211_hdr *hdr,
|
||||
u16 len,
|
||||
u32 ampdu_status,
|
||||
struct iwl_rx_mem_buffer *rxb,
|
||||
struct ieee80211_rx_status *stats)
|
||||
{
|
||||
struct sk_buff *skb;
|
||||
__le16 fc = hdr->frame_control;
|
||||
|
||||
/* We only process data packets if the interface is open */
|
||||
if (unlikely(!priv->is_open)) {
|
||||
IWL_DEBUG_DROP_LIMIT(priv,
|
||||
"Dropping packet while interface is not open.\n");
|
||||
return;
|
||||
}
|
||||
|
||||
/* In case of HW accelerated crypto and bad decryption, drop */
|
||||
if (!priv->cfg->mod_params->sw_crypto &&
|
||||
iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
|
||||
return;
|
||||
|
||||
skb = dev_alloc_skb(128);
|
||||
if (!skb) {
|
||||
IWL_ERR(priv, "dev_alloc_skb failed\n");
|
||||
return;
|
||||
}
|
||||
|
||||
skb_add_rx_frag(skb, 0, rxb->page, (void *)hdr - rxb_addr(rxb), len);
|
||||
|
||||
iwl_update_stats(priv, false, fc, len);
|
||||
memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
|
||||
|
||||
ieee80211_rx(priv->hw, skb);
|
||||
priv->alloc_rxb_page--;
|
||||
rxb->page = NULL;
|
||||
}
|
||||
|
||||
/* Called for REPLY_RX (legacy ABG frames), or
|
||||
* REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
|
||||
void iwlagn_rx_reply_rx(struct iwl_priv *priv,
|
||||
struct iwl_rx_mem_buffer *rxb)
|
||||
{
|
||||
struct ieee80211_hdr *header;
|
||||
struct ieee80211_rx_status rx_status;
|
||||
struct iwl_rx_packet *pkt = rxb_addr(rxb);
|
||||
struct iwl_rx_phy_res *phy_res;
|
||||
__le32 rx_pkt_status;
|
||||
struct iwl_rx_mpdu_res_start *amsdu;
|
||||
u32 len;
|
||||
u32 ampdu_status;
|
||||
u32 rate_n_flags;
|
||||
|
||||
/**
|
||||
* REPLY_RX and REPLY_RX_MPDU_CMD are handled differently.
|
||||
* REPLY_RX: physical layer info is in this buffer
|
||||
* REPLY_RX_MPDU_CMD: physical layer info was sent in separate
|
||||
* command and cached in priv->last_phy_res
|
||||
*
|
||||
* Here we set up local variables depending on which command is
|
||||
* received.
|
||||
*/
|
||||
if (pkt->hdr.cmd == REPLY_RX) {
|
||||
phy_res = (struct iwl_rx_phy_res *)pkt->u.raw;
|
||||
header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*phy_res)
|
||||
+ phy_res->cfg_phy_cnt);
|
||||
|
||||
len = le16_to_cpu(phy_res->byte_count);
|
||||
rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*phy_res) +
|
||||
phy_res->cfg_phy_cnt + len);
|
||||
ampdu_status = le32_to_cpu(rx_pkt_status);
|
||||
} else {
|
||||
if (!priv->_agn.last_phy_res_valid) {
|
||||
IWL_ERR(priv, "MPDU frame without cached PHY data\n");
|
||||
return;
|
||||
}
|
||||
phy_res = &priv->_agn.last_phy_res;
|
||||
amsdu = (struct iwl_rx_mpdu_res_start *)pkt->u.raw;
|
||||
header = (struct ieee80211_hdr *)(pkt->u.raw + sizeof(*amsdu));
|
||||
len = le16_to_cpu(amsdu->byte_count);
|
||||
rx_pkt_status = *(__le32 *)(pkt->u.raw + sizeof(*amsdu) + len);
|
||||
ampdu_status = iwlagn_translate_rx_status(priv,
|
||||
le32_to_cpu(rx_pkt_status));
|
||||
}
|
||||
|
||||
if ((unlikely(phy_res->cfg_phy_cnt > 20))) {
|
||||
IWL_DEBUG_DROP(priv, "dsp size out of range [0,20]: %d/n",
|
||||
phy_res->cfg_phy_cnt);
|
||||
return;
|
||||
}
|
||||
|
||||
if (!(rx_pkt_status & RX_RES_STATUS_NO_CRC32_ERROR) ||
|
||||
!(rx_pkt_status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
|
||||
IWL_DEBUG_RX(priv, "Bad CRC or FIFO: 0x%08X.\n",
|
||||
le32_to_cpu(rx_pkt_status));
|
||||
return;
|
||||
}
|
||||
|
||||
/* This will be used in several places later */
|
||||
rate_n_flags = le32_to_cpu(phy_res->rate_n_flags);
|
||||
|
||||
/* rx_status carries information about the packet to mac80211 */
|
||||
rx_status.mactime = le64_to_cpu(phy_res->timestamp);
|
||||
rx_status.band = (phy_res->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
|
||||
IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
|
||||
rx_status.freq =
|
||||
ieee80211_channel_to_frequency(le16_to_cpu(phy_res->channel),
|
||||
rx_status.band);
|
||||
rx_status.rate_idx =
|
||||
iwlagn_hwrate_to_mac80211_idx(rate_n_flags, rx_status.band);
|
||||
rx_status.flag = 0;
|
||||
|
||||
/* TSF isn't reliable. In order to allow smooth user experience,
|
||||
* this W/A doesn't propagate it to the mac80211 */
|
||||
/*rx_status.flag |= RX_FLAG_MACTIME_MPDU;*/
|
||||
|
||||
priv->ucode_beacon_time = le32_to_cpu(phy_res->beacon_time_stamp);
|
||||
|
||||
/* Find max signal strength (dBm) among 3 antenna/receiver chains */
|
||||
rx_status.signal = iwlagn_calc_rssi(priv, phy_res);
|
||||
|
||||
iwl_dbg_log_rx_data_frame(priv, len, header);
|
||||
IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, TSF %llu\n",
|
||||
rx_status.signal, (unsigned long long)rx_status.mactime);
|
||||
|
||||
/*
|
||||
* "antenna number"
|
||||
*
|
||||
* It seems that the antenna field in the phy flags value
|
||||
* is actually a bit field. This is undefined by radiotap,
|
||||
* it wants an actual antenna number but I always get "7"
|
||||
* for most legacy frames I receive indicating that the
|
||||
* same frame was received on all three RX chains.
|
||||
*
|
||||
* I think this field should be removed in favor of a
|
||||
* new 802.11n radiotap field "RX chains" that is defined
|
||||
* as a bitmask.
|
||||
*/
|
||||
rx_status.antenna =
|
||||
(le16_to_cpu(phy_res->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK)
|
||||
>> RX_RES_PHY_FLAGS_ANTENNA_POS;
|
||||
|
||||
/* set the preamble flag if appropriate */
|
||||
if (phy_res->phy_flags & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
|
||||
rx_status.flag |= RX_FLAG_SHORTPRE;
|
||||
|
||||
/* Set up the HT phy flags */
|
||||
if (rate_n_flags & RATE_MCS_HT_MSK)
|
||||
rx_status.flag |= RX_FLAG_HT;
|
||||
if (rate_n_flags & RATE_MCS_HT40_MSK)
|
||||
rx_status.flag |= RX_FLAG_40MHZ;
|
||||
if (rate_n_flags & RATE_MCS_SGI_MSK)
|
||||
rx_status.flag |= RX_FLAG_SHORT_GI;
|
||||
|
||||
iwlagn_pass_packet_to_mac80211(priv, header, len, ampdu_status,
|
||||
rxb, &rx_status);
|
||||
}
|
||||
|
||||
/* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
|
||||
* This will be used later in iwl_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
|
||||
void iwlagn_rx_reply_rx_phy(struct iwl_priv *priv,
|
||||
struct iwl_rx_mem_buffer *rxb)
|
||||
{
|
||||
struct iwl_rx_packet *pkt = rxb_addr(rxb);
|
||||
priv->_agn.last_phy_res_valid = true;
|
||||
memcpy(&priv->_agn.last_phy_res, pkt->u.raw,
|
||||
sizeof(struct iwl_rx_phy_res));
|
||||
}
|
||||
|
||||
static int iwl_get_single_channel_for_scan(struct iwl_priv *priv,
|
||||
struct ieee80211_vif *vif,
|
||||
enum ieee80211_band band,
|
||||
|
||||
@@ -424,60 +424,6 @@ int iwl_hw_tx_queue_init(struct iwl_priv *priv,
|
||||
return 0;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* Generic RX handler implementations
|
||||
*
|
||||
******************************************************************************/
|
||||
static void iwl_rx_reply_alive(struct iwl_priv *priv,
|
||||
struct iwl_rx_mem_buffer *rxb)
|
||||
{
|
||||
struct iwl_rx_packet *pkt = rxb_addr(rxb);
|
||||
struct iwl_alive_resp *palive;
|
||||
struct delayed_work *pwork;
|
||||
|
||||
palive = &pkt->u.alive_frame;
|
||||
|
||||
IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
|
||||
"0x%01X 0x%01X\n",
|
||||
palive->is_valid, palive->ver_type,
|
||||
palive->ver_subtype);
|
||||
|
||||
if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
|
||||
IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
|
||||
memcpy(&priv->card_alive_init,
|
||||
&pkt->u.alive_frame,
|
||||
sizeof(struct iwl_init_alive_resp));
|
||||
pwork = &priv->init_alive_start;
|
||||
} else {
|
||||
IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
|
||||
memcpy(&priv->card_alive, &pkt->u.alive_frame,
|
||||
sizeof(struct iwl_alive_resp));
|
||||
pwork = &priv->alive_start;
|
||||
}
|
||||
|
||||
/* We delay the ALIVE response by 5ms to
|
||||
* give the HW RF Kill time to activate... */
|
||||
if (palive->is_valid == UCODE_VALID_OK)
|
||||
queue_delayed_work(priv->workqueue, pwork,
|
||||
msecs_to_jiffies(5));
|
||||
else {
|
||||
IWL_WARN(priv, "%s uCode did not respond OK.\n",
|
||||
(palive->ver_subtype == INITIALIZE_SUBTYPE) ?
|
||||
"init" : "runtime");
|
||||
/*
|
||||
* If fail to load init uCode,
|
||||
* let's try to load the init uCode again.
|
||||
* We should not get into this situation, but if it
|
||||
* does happen, we should not move on and loading "runtime"
|
||||
* without proper calibrate the device.
|
||||
*/
|
||||
if (palive->ver_subtype == INITIALIZE_SUBTYPE)
|
||||
priv->ucode_type = UCODE_NONE;
|
||||
queue_work(priv->workqueue, &priv->restart);
|
||||
}
|
||||
}
|
||||
|
||||
static void iwl_bg_beacon_update(struct work_struct *work)
|
||||
{
|
||||
struct iwl_priv *priv =
|
||||
@@ -712,83 +658,6 @@ static void iwl_bg_ucode_trace(unsigned long data)
|
||||
}
|
||||
}
|
||||
|
||||
static void iwlagn_rx_beacon_notif(struct iwl_priv *priv,
|
||||
struct iwl_rx_mem_buffer *rxb)
|
||||
{
|
||||
struct iwl_rx_packet *pkt = rxb_addr(rxb);
|
||||
struct iwlagn_beacon_notif *beacon = (void *)pkt->u.raw;
|
||||
#ifdef CONFIG_IWLWIFI_DEBUG
|
||||
u16 status = le16_to_cpu(beacon->beacon_notify_hdr.status.status);
|
||||
u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
|
||||
|
||||
IWL_DEBUG_RX(priv, "beacon status %#x, retries:%d ibssmgr:%d "
|
||||
"tsf:0x%.8x%.8x rate:%d\n",
|
||||
status & TX_STATUS_MSK,
|
||||
beacon->beacon_notify_hdr.failure_frame,
|
||||
le32_to_cpu(beacon->ibss_mgr_status),
|
||||
le32_to_cpu(beacon->high_tsf),
|
||||
le32_to_cpu(beacon->low_tsf), rate);
|
||||
#endif
|
||||
|
||||
priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
|
||||
|
||||
if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
|
||||
queue_work(priv->workqueue, &priv->beacon_update);
|
||||
}
|
||||
|
||||
/* Handle notification from uCode that card's power state is changing
|
||||
* due to software, hardware, or critical temperature RFKILL */
|
||||
static void iwl_rx_card_state_notif(struct iwl_priv *priv,
|
||||
struct iwl_rx_mem_buffer *rxb)
|
||||
{
|
||||
struct iwl_rx_packet *pkt = rxb_addr(rxb);
|
||||
u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
|
||||
unsigned long status = priv->status;
|
||||
|
||||
IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
|
||||
(flags & HW_CARD_DISABLED) ? "Kill" : "On",
|
||||
(flags & SW_CARD_DISABLED) ? "Kill" : "On",
|
||||
(flags & CT_CARD_DISABLED) ?
|
||||
"Reached" : "Not reached");
|
||||
|
||||
if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
|
||||
CT_CARD_DISABLED)) {
|
||||
|
||||
iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
|
||||
CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
|
||||
|
||||
iwl_write_direct32(priv, HBUS_TARG_MBX_C,
|
||||
HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
|
||||
|
||||
if (!(flags & RXON_CARD_DISABLED)) {
|
||||
iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
|
||||
CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
|
||||
iwl_write_direct32(priv, HBUS_TARG_MBX_C,
|
||||
HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
|
||||
}
|
||||
if (flags & CT_CARD_DISABLED)
|
||||
iwl_tt_enter_ct_kill(priv);
|
||||
}
|
||||
if (!(flags & CT_CARD_DISABLED))
|
||||
iwl_tt_exit_ct_kill(priv);
|
||||
|
||||
if (flags & HW_CARD_DISABLED)
|
||||
set_bit(STATUS_RF_KILL_HW, &priv->status);
|
||||
else
|
||||
clear_bit(STATUS_RF_KILL_HW, &priv->status);
|
||||
|
||||
|
||||
if (!(flags & RXON_CARD_DISABLED))
|
||||
iwl_scan_cancel(priv);
|
||||
|
||||
if ((test_bit(STATUS_RF_KILL_HW, &status) !=
|
||||
test_bit(STATUS_RF_KILL_HW, &priv->status)))
|
||||
wiphy_rfkill_set_hw_state(priv->hw->wiphy,
|
||||
test_bit(STATUS_RF_KILL_HW, &priv->status));
|
||||
else
|
||||
wake_up_interruptible(&priv->wait_command_queue);
|
||||
}
|
||||
|
||||
static void iwl_bg_tx_flush(struct work_struct *work)
|
||||
{
|
||||
struct iwl_priv *priv =
|
||||
@@ -807,51 +676,6 @@ static void iwl_bg_tx_flush(struct work_struct *work)
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* iwl_setup_rx_handlers - Initialize Rx handler callbacks
|
||||
*
|
||||
* Setup the RX handlers for each of the reply types sent from the uCode
|
||||
* to the host.
|
||||
*
|
||||
* This function chains into the hardware specific files for them to setup
|
||||
* any hardware specific handlers as well.
|
||||
*/
|
||||
static void iwl_setup_rx_handlers(struct iwl_priv *priv)
|
||||
{
|
||||
priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
|
||||
priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
|
||||
priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
|
||||
priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
|
||||
iwl_rx_spectrum_measure_notif;
|
||||
priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
|
||||
priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
|
||||
iwl_rx_pm_debug_statistics_notif;
|
||||
priv->rx_handlers[BEACON_NOTIFICATION] = iwlagn_rx_beacon_notif;
|
||||
|
||||
/*
|
||||
* The same handler is used for both the REPLY to a discrete
|
||||
* statistics request from the host as well as for the periodic
|
||||
* statistics notifications (after received beacons) from the uCode.
|
||||
*/
|
||||
priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
|
||||
priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
|
||||
|
||||
iwl_setup_rx_scan_handlers(priv);
|
||||
|
||||
/* status change handler */
|
||||
priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
|
||||
|
||||
priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
|
||||
iwl_rx_missed_beacon_notif;
|
||||
/* Rx handlers */
|
||||
priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
|
||||
priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
|
||||
/* block ack */
|
||||
priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
|
||||
/* Set up hardware specific Rx handlers */
|
||||
priv->cfg->ops->lib->rx_handler_setup(priv);
|
||||
}
|
||||
|
||||
/**
|
||||
* iwl_rx_handle - Main entry function for receiving responses from uCode
|
||||
*
|
||||
@@ -3913,6 +3737,8 @@ static int iwl_init_drv(struct iwl_priv *priv)
|
||||
priv->force_reset[IWL_FW_RESET].reset_duration =
|
||||
IWL_DELAY_NEXT_FORCE_FW_RELOAD;
|
||||
|
||||
priv->rx_statistics_jiffies = jiffies;
|
||||
|
||||
/* Choose which receivers/antennas to use */
|
||||
if (priv->cfg->ops->hcmd->set_rxon_chain)
|
||||
priv->cfg->ops->hcmd->set_rxon_chain(priv,
|
||||
|
||||
@@ -190,10 +190,7 @@ void iwlagn_rx_replenish_now(struct iwl_priv *priv);
|
||||
void iwlagn_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq);
|
||||
int iwlagn_rxq_stop(struct iwl_priv *priv);
|
||||
int iwlagn_hwrate_to_mac80211_idx(u32 rate_n_flags, enum ieee80211_band band);
|
||||
void iwlagn_rx_reply_rx(struct iwl_priv *priv,
|
||||
struct iwl_rx_mem_buffer *rxb);
|
||||
void iwlagn_rx_reply_rx_phy(struct iwl_priv *priv,
|
||||
struct iwl_rx_mem_buffer *rxb);
|
||||
void iwl_setup_rx_handlers(struct iwl_priv *priv);
|
||||
|
||||
/* tx */
|
||||
void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq);
|
||||
@@ -243,14 +240,6 @@ static inline bool iwl_is_tx_success(u32 status)
|
||||
|
||||
u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant_idx, u8 valid);
|
||||
|
||||
/* rx */
|
||||
void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
|
||||
struct iwl_rx_mem_buffer *rxb);
|
||||
void iwl_rx_statistics(struct iwl_priv *priv,
|
||||
struct iwl_rx_mem_buffer *rxb);
|
||||
void iwl_reply_statistics(struct iwl_priv *priv,
|
||||
struct iwl_rx_mem_buffer *rxb);
|
||||
|
||||
/* scan */
|
||||
int iwlagn_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif);
|
||||
void iwlagn_post_scan(struct iwl_priv *priv);
|
||||
|
||||
@@ -869,33 +869,6 @@ void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)
|
||||
}
|
||||
}
|
||||
|
||||
void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
|
||||
{
|
||||
struct iwl_rx_packet *pkt = rxb_addr(rxb);
|
||||
struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
|
||||
/*
|
||||
* MULTI-FIXME
|
||||
* See iwl_mac_channel_switch.
|
||||
*/
|
||||
struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
|
||||
struct iwl_rxon_cmd *rxon = (void *)&ctx->active;
|
||||
|
||||
if (priv->switch_rxon.switch_in_progress) {
|
||||
if (!le32_to_cpu(csa->status) &&
|
||||
(csa->channel == priv->switch_rxon.channel)) {
|
||||
rxon->channel = csa->channel;
|
||||
ctx->staging.channel = csa->channel;
|
||||
IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
|
||||
le16_to_cpu(csa->channel));
|
||||
iwl_chswitch_done(priv, true);
|
||||
} else {
|
||||
IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
|
||||
le16_to_cpu(csa->channel));
|
||||
iwl_chswitch_done(priv, false);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_IWLWIFI_DEBUG
|
||||
void iwl_print_rx_config_cmd(struct iwl_priv *priv,
|
||||
struct iwl_rxon_context *ctx)
|
||||
@@ -1245,42 +1218,6 @@ int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
|
||||
&statistics_cmd);
|
||||
}
|
||||
|
||||
void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
|
||||
struct iwl_rx_mem_buffer *rxb)
|
||||
{
|
||||
#ifdef CONFIG_IWLWIFI_DEBUG
|
||||
struct iwl_rx_packet *pkt = rxb_addr(rxb);
|
||||
struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
|
||||
IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
|
||||
sleep->pm_sleep_mode, sleep->pm_wakeup_src);
|
||||
#endif
|
||||
}
|
||||
|
||||
void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
|
||||
struct iwl_rx_mem_buffer *rxb)
|
||||
{
|
||||
struct iwl_rx_packet *pkt = rxb_addr(rxb);
|
||||
u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
|
||||
IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
|
||||
"notification for %s:\n", len,
|
||||
get_cmd_string(pkt->hdr.cmd));
|
||||
iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
|
||||
}
|
||||
|
||||
void iwl_rx_reply_error(struct iwl_priv *priv,
|
||||
struct iwl_rx_mem_buffer *rxb)
|
||||
{
|
||||
struct iwl_rx_packet *pkt = rxb_addr(rxb);
|
||||
|
||||
IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
|
||||
"seq 0x%04X ser 0x%08X\n",
|
||||
le32_to_cpu(pkt->u.err_resp.error_type),
|
||||
get_cmd_string(pkt->u.err_resp.cmd_id),
|
||||
pkt->u.err_resp.cmd_id,
|
||||
le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
|
||||
le32_to_cpu(pkt->u.err_resp.error_info));
|
||||
}
|
||||
|
||||
void iwl_clear_isr_stats(struct iwl_priv *priv)
|
||||
{
|
||||
memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
|
||||
|
||||
@@ -441,10 +441,6 @@ bool iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
|
||||
void iwl_connection_init_rx_config(struct iwl_priv *priv,
|
||||
struct iwl_rxon_context *ctx);
|
||||
void iwl_set_rate(struct iwl_priv *priv);
|
||||
int iwl_set_decrypted_flag(struct iwl_priv *priv,
|
||||
struct ieee80211_hdr *hdr,
|
||||
u32 decrypt_res,
|
||||
struct ieee80211_rx_status *stats);
|
||||
void iwl_irq_handle_error(struct iwl_priv *priv);
|
||||
int iwl_mac_add_interface(struct ieee80211_hw *hw,
|
||||
struct ieee80211_vif *vif);
|
||||
@@ -493,15 +489,6 @@ static inline void iwl_update_stats(struct iwl_priv *priv, bool is_tx,
|
||||
{
|
||||
}
|
||||
#endif
|
||||
/*****************************************************
|
||||
* RX handlers.
|
||||
* **************************************************/
|
||||
void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
|
||||
struct iwl_rx_mem_buffer *rxb);
|
||||
void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
|
||||
struct iwl_rx_mem_buffer *rxb);
|
||||
void iwl_rx_reply_error(struct iwl_priv *priv,
|
||||
struct iwl_rx_mem_buffer *rxb);
|
||||
|
||||
/*****************************************************
|
||||
* RX
|
||||
@@ -513,11 +500,8 @@ void iwl_rx_queue_update_write_ptr(struct iwl_priv *priv,
|
||||
struct iwl_rx_queue *q);
|
||||
int iwl_rx_queue_space(const struct iwl_rx_queue *q);
|
||||
void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb);
|
||||
/* Handlers */
|
||||
void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
|
||||
struct iwl_rx_mem_buffer *rxb);
|
||||
|
||||
void iwl_chswitch_done(struct iwl_priv *priv, bool is_success);
|
||||
void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb);
|
||||
|
||||
/* TX helpers */
|
||||
|
||||
|
||||
@@ -1261,8 +1261,8 @@ struct iwl_priv {
|
||||
/* track IBSS manager (last beacon) status */
|
||||
u32 ibss_manager;
|
||||
|
||||
/* storing the jiffies when the plcp error rate is received */
|
||||
unsigned long plcp_jiffies;
|
||||
/* jiffies when last recovery from statistics was performed */
|
||||
unsigned long rx_statistics_jiffies;
|
||||
|
||||
/* force reset */
|
||||
struct iwl_force_reset force_reset[IWL_MAX_FORCE_RESET];
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user