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Merge branch 'linus' into perf/core, to pick up fixes before merging new changes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@@ -7,6 +7,7 @@ Required properties:
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- "ti,ina220" for ina220
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- "ti,ina226" for ina226
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- "ti,ina230" for ina230
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- "ti,ina231" for ina231
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- reg: I2C address
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Optional properties:
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@@ -44,8 +44,8 @@ Required properties:
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- our-claim-gpio: The GPIO that we use to claim the bus.
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- their-claim-gpios: The GPIOs that the other sides use to claim the bus.
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Note that some implementations may only support a single other master.
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- Standard I2C mux properties. See mux.txt in this directory.
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- Single I2C child bus node at reg 0. See mux.txt in this directory.
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- Standard I2C mux properties. See i2c-mux.txt in this directory.
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- Single I2C child bus node at reg 0. See i2c-mux.txt in this directory.
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Optional properties:
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- slew-delay-us: microseconds to wait for a GPIO to go high. Default is 10 us.
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@@ -27,7 +27,8 @@ Required properties:
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- i2c-bus-name: The name of this bus. Also needed as pinctrl-name for the I2C
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parents.
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Furthermore, I2C mux properties and child nodes. See mux.txt in this directory.
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Furthermore, I2C mux properties and child nodes. See i2c-mux.txt in this
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directory.
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Example:
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@@ -22,8 +22,8 @@ Required properties:
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- i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
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port is connected to.
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- mux-gpios: list of gpios used to control the muxer
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* Standard I2C mux properties. See mux.txt in this directory.
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* I2C child bus nodes. See mux.txt in this directory.
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* Standard I2C mux properties. See i2c-mux.txt in this directory.
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* I2C child bus nodes. See i2c-mux.txt in this directory.
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Optional properties:
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- idle-state: value to set the muxer to when idle. When no value is
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@@ -33,7 +33,7 @@ For each i2c child node, an I2C child bus will be created. They will
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be numbered based on their order in the device tree.
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Whenever an access is made to a device on a child bus, the value set
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in the revelant node's reg property will be output using the list of
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in the relevant node's reg property will be output using the list of
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GPIOs, the first in the list holding the least-significant value.
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If an idle state is defined, using the idle-state (optional) property,
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@@ -28,9 +28,9 @@ Also required are:
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* Standard pinctrl properties that specify the pin mux state for each child
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bus. See ../pinctrl/pinctrl-bindings.txt.
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* Standard I2C mux properties. See mux.txt in this directory.
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* Standard I2C mux properties. See i2c-mux.txt in this directory.
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* I2C child bus nodes. See mux.txt in this directory.
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* I2C child bus nodes. See i2c-mux.txt in this directory.
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For each named state defined in the pinctrl-names property, an I2C child bus
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will be created. I2C child bus numbers are assigned based on the index into
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@@ -7,8 +7,8 @@ Required properties:
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- compatible: i2c-mux-reg
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- i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
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port is connected to.
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* Standard I2C mux properties. See mux.txt in this directory.
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* I2C child bus nodes. See mux.txt in this directory.
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* Standard I2C mux properties. See i2c-mux.txt in this directory.
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* I2C child bus nodes. See i2c-mux.txt in this directory.
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Optional properties:
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- reg: this pair of <offset size> specifies the register to control the mux.
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@@ -24,7 +24,7 @@ Optional properties:
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given, it defaults to the last value used.
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Whenever an access is made to a device on a child bus, the value set
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in the revelant node's reg property will be output to the register.
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in the relevant node's reg property will be output to the register.
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If an idle state is defined, using the idle-state (optional) property,
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whenever an access is not being made to a device on a child bus, the
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@@ -13,10 +13,10 @@ Optional properties:
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initialization. This is an array of 28 values(u8).
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- marvell,wakeup-pin: It represents wakeup pin number of the bluetooth chip.
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firmware will use the pin to wakeup host system.
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firmware will use the pin to wakeup host system (u16).
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- marvell,wakeup-gap-ms: wakeup gap represents wakeup latency of the host
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platform. The value will be configured to firmware. This
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is needed to work chip's sleep feature as expected.
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is needed to work chip's sleep feature as expected (u16).
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- interrupt-parent: phandle of the parent interrupt controller
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- interrupts : interrupt pin number to the cpu. Driver will request an irq based
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on this interrupt number. During system suspend, the irq will be
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@@ -50,7 +50,7 @@ calibration data is also available in below example.
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0x37 0x01 0x1c 0x00 0xff 0xff 0xff 0xff 0x01 0x7f 0x04 0x02
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0x00 0x00 0xba 0xce 0xc0 0xc6 0x2d 0x00 0x00 0x00 0x00 0x00
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0x00 0x00 0xf0 0x00>;
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marvell,wakeup-pin = <0x0d>;
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marvell,wakeup-gap-ms = <0x64>;
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marvell,wakeup-pin = /bits/ 16 <0x0d>;
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marvell,wakeup-gap-ms = /bits/ 16 <0x64>;
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};
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};
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@@ -255,6 +255,7 @@ synology Synology, Inc.
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SUNW Sun Microsystems, Inc
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tbs TBS Technologies
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tcl Toby Churchill Ltd.
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technexion TechNexion
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technologic Technologic Systems
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thine THine Electronics, Inc.
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ti Texas Instruments
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@@ -269,6 +270,7 @@ tronsmart Tronsmart
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truly Truly Semiconductors Limited
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tyan Tyan Computer Corporation
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upisemi uPI Semiconductor Corp.
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uniwest United Western Technologies Corp (UniWest)
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urt United Radiant Technology Corporation
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usi Universal Scientific Industrial Co., Ltd.
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v3 V3 Semiconductor
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+3
-5
@@ -8009,6 +8009,7 @@ Q: http://patchwork.kernel.org/project/linux-wireless/list/
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers.git
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/wireless-drivers-next.git
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S: Maintained
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F: Documentation/devicetree/bindings/net/wireless/
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F: drivers/net/wireless/
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NETXEN (1/10) GbE SUPPORT
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@@ -8406,10 +8407,9 @@ F: drivers/i2c/busses/i2c-ocores.c
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OPEN FIRMWARE AND FLATTENED DEVICE TREE
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M: Rob Herring <robh+dt@kernel.org>
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M: Frank Rowand <frowand.list@gmail.com>
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M: Grant Likely <grant.likely@linaro.org>
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L: devicetree@vger.kernel.org
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W: http://www.devicetree.org/
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux.git
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git
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S: Maintained
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F: drivers/of/
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F: include/linux/of*.h
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@@ -8417,12 +8417,10 @@ F: scripts/dtc/
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OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS
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M: Rob Herring <robh+dt@kernel.org>
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M: Pawel Moll <pawel.moll@arm.com>
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M: Mark Rutland <mark.rutland@arm.com>
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M: Ian Campbell <ijc+devicetree@hellion.org.uk>
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M: Kumar Gala <galak@codeaurora.org>
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L: devicetree@vger.kernel.org
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git
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Q: http://patchwork.ozlabs.org/project/devicetree-bindings/list/
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S: Maintained
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F: Documentation/devicetree/
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F: arch/*/boot/dts/
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@@ -1,7 +1,7 @@
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VERSION = 4
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PATCHLEVEL = 7
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SUBLEVEL = 0
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EXTRAVERSION = -rc2
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EXTRAVERSION = -rc3
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NAME = Psychotic Stoned Sheep
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# *DOCUMENTATION*
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+4
-27
@@ -61,7 +61,7 @@ config RWSEM_GENERIC_SPINLOCK
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def_bool y
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config ARCH_DISCONTIGMEM_ENABLE
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def_bool y
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def_bool n
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config ARCH_FLATMEM_ENABLE
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def_bool y
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@@ -186,9 +186,6 @@ if SMP
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config ARC_HAS_COH_CACHES
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def_bool n
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config ARC_HAS_REENTRANT_IRQ_LV2
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def_bool n
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config ARC_MCIP
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bool "ARConnect Multicore IP (MCIP) Support "
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depends on ISA_ARCV2
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@@ -366,25 +363,10 @@ config NODES_SHIFT
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if ISA_ARCOMPACT
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config ARC_COMPACT_IRQ_LEVELS
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bool "ARCompact IRQ Priorities: High(2)/Low(1)"
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bool "Setup Timer IRQ as high Priority"
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default n
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# Timer HAS to be high priority, for any other high priority config
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select ARC_IRQ3_LV2
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# if SMP, LV2 enabled ONLY if ARC implementation has LV2 re-entrancy
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depends on !SMP || ARC_HAS_REENTRANT_IRQ_LV2
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if ARC_COMPACT_IRQ_LEVELS
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config ARC_IRQ3_LV2
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bool
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config ARC_IRQ5_LV2
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bool
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config ARC_IRQ6_LV2
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bool
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endif #ARC_COMPACT_IRQ_LEVELS
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depends on !SMP
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config ARC_FPU_SAVE_RESTORE
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bool "Enable FPU state persistence across context switch"
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@@ -407,11 +389,6 @@ config ARC_HAS_LLSC
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default y
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depends on !ARC_CANT_LLSC
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config ARC_STAR_9000923308
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bool "Workaround for llock/scond livelock"
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default n
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depends on ISA_ARCV2 && SMP && ARC_HAS_LLSC
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config ARC_HAS_SWAPE
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bool "Insn: SWAPE (endian-swap)"
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default y
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@@ -471,7 +448,7 @@ config LINUX_LINK_BASE
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config HIGHMEM
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bool "High Memory Support"
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select DISCONTIGMEM
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select ARCH_DISCONTIGMEM_ENABLE
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help
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With ARC 2G:2G address split, only upper 2G is directly addressable by
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kernel. Enable this to potentially allow access to rest of 2G and PAE
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+1
-1
@@ -127,7 +127,7 @@ libs-y += arch/arc/lib/ $(LIBGCC)
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boot := arch/arc/boot
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#default target for make without any arguements.
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#default target for make without any arguments.
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KBUILD_IMAGE := bootpImage
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all: $(KBUILD_IMAGE)
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@@ -23,8 +23,6 @@
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/ {
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clock-frequency = <500000000>; /* 500 MHZ */
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soc100 {
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bus-frequency = <166666666>;
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@@ -23,8 +23,6 @@
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/ {
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clock-frequency = <500000000>; /* 500 MHZ */
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soc100 {
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bus-frequency = <166666666>;
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@@ -15,7 +15,6 @@
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/ {
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compatible = "snps,arc";
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clock-frequency = <750000000>; /* 750 MHZ */
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#address-cells = <1>;
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#size-cells = <1>;
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@@ -14,7 +14,6 @@
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/ {
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compatible = "snps,arc";
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clock-frequency = <90000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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@@ -14,7 +14,6 @@
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/ {
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compatible = "snps,arc";
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clock-frequency = <90000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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@@ -18,7 +18,6 @@
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/ {
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compatible = "ezchip,arc-nps";
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clock-frequency = <83333333>; /* 83.333333 MHZ */
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&intc>;
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@@ -11,7 +11,6 @@
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/ {
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compatible = "snps,nsim";
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clock-frequency = <80000000>; /* 80 MHZ */
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&core_intc>;
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@@ -11,7 +11,6 @@
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/ {
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compatible = "snps,nsimosci";
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clock-frequency = <20000000>; /* 20 MHZ */
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#address-cells = <1>;
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#size-cells = <1>;
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interrupt-parent = <&core_intc>;
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