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Merge branch 'for-linus' of git://www.atmel.no/~hskinnemoen/linux/kernel/avr32
* 'for-linus' of git://www.atmel.no/~hskinnemoen/linux/kernel/avr32: (21 commits)
[AVR32] Fix compile error with gcc 4.1
avr32: remove unneeded cast in atomic.h
AVR32: Remove useless config option "GENERIC_BUST_SPINLOCK".
[AVR32] Optimize the TLB miss handler
[AVR32] Board code for ATNGW100
[AVR32] Use memcpy/memset in memcpy_{from,to}_io and memset_io
[AVR32] Get rid of board_setup_fbmem()
[AVR32] Reserve framebuffer memory in early_parse_fbmem()
[AVR32] Simplify early handling of memory regions
[AVR32] Move setup_bootmem() from mm/init.c to kernel/setup.c
[AVR32] Make I/O access macros work with external devices
[AVR32] Fix NMI handler
[AVR32] Clean up exception handling code
[AVR32] Clean up cpu identification and add features bitmap
[AVR32] Clean up asm/sysreg.h
[AVR32] Don't enable clocks with no users
[AVR32] Put cpu in sleep 0 when idle.
[AVR32] Change system timer from count-compare to Timer/Counter 0
[AVR32] Add mach-specific Kconfig
[AVR32] Add nwait and tdf parameters to SMC configuration
...
This commit is contained in:
Linus Torvalds
+10
-3
@@ -57,9 +57,6 @@ config ARCH_HAS_ILOG2_U64
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bool
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default n
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config GENERIC_BUST_SPINLOCK
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bool
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config GENERIC_HWEIGHT
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bool
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default y
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@@ -68,6 +65,11 @@ config GENERIC_CALIBRATE_DELAY
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bool
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default y
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config GENERIC_BUG
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bool
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default y
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depends on BUG
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source "init/Kconfig"
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menu "System Type and features"
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@@ -106,6 +108,9 @@ choice
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config BOARD_ATSTK1000
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bool "ATSTK1000 evaluation board"
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select BOARD_ATSTK1002 if CPU_AT32AP7000
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config BOARD_ATNGW100
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bool "ATNGW100 Network Gateway"
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endchoice
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choice
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@@ -116,6 +121,8 @@ config LOADER_U_BOOT
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bool "U-Boot (or similar) bootloader"
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endchoice
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source "arch/avr32/mach-at32ap/Kconfig"
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config LOAD_ADDRESS
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hex
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default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y
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@@ -27,6 +27,7 @@ head-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/head.o
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head-y += arch/avr32/kernel/head.o
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core-$(CONFIG_PLATFORM_AT32AP) += arch/avr32/mach-at32ap/
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core-$(CONFIG_BOARD_ATSTK1000) += arch/avr32/boards/atstk1000/
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core-$(CONFIG_BOARD_ATNGW100) += arch/avr32/boards/atngw100/
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core-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/
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core-y += arch/avr32/kernel/
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core-y += arch/avr32/mm/
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@@ -0,0 +1 @@
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obj-y += setup.o flash.o
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@@ -0,0 +1,95 @@
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/*
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* ATNGW100 board-specific flash initialization
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*
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* Copyright (C) 2005-2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/physmap.h>
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#include <asm/arch/smc.h>
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static struct smc_config flash_config __initdata = {
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.ncs_read_setup = 0,
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.nrd_setup = 40,
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.ncs_write_setup = 0,
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.nwe_setup = 10,
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.ncs_read_pulse = 80,
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.nrd_pulse = 40,
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.ncs_write_pulse = 65,
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.nwe_pulse = 55,
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.read_cycle = 120,
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.write_cycle = 120,
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.bus_width = 2,
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.nrd_controlled = 1,
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.nwe_controlled = 1,
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.byte_write = 1,
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};
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static struct mtd_partition flash_parts[] = {
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{
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.name = "u-boot",
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.offset = 0x00000000,
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.size = 0x00020000, /* 128 KiB */
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.mask_flags = MTD_WRITEABLE,
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},
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{
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.name = "root",
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.offset = 0x00020000,
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.size = 0x007d0000,
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},
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{
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.name = "env",
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.offset = 0x007f0000,
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.size = 0x00010000,
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.mask_flags = MTD_WRITEABLE,
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},
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};
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static struct physmap_flash_data flash_data = {
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.width = 2,
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.nr_parts = ARRAY_SIZE(flash_parts),
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.parts = flash_parts,
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};
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static struct resource flash_resource = {
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.start = 0x00000000,
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.end = 0x007fffff,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device flash_device = {
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.name = "physmap-flash",
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.id = 0,
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.resource = &flash_resource,
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.num_resources = 1,
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.dev = {
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.platform_data = &flash_data,
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},
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};
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/* This needs to be called after the SMC has been initialized */
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static int __init atngw100_flash_init(void)
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{
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int ret;
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ret = smc_set_configuration(0, &flash_config);
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if (ret < 0) {
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printk(KERN_ERR "atngw100: failed to set NOR flash timing\n");
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return ret;
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}
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platform_device_register(&flash_device);
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return 0;
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}
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device_initcall(atngw100_flash_init);
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@@ -0,0 +1,124 @@
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/*
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* Board-specific setup code for the ATNGW100 Network Gateway
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*
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* Copyright (C) 2005-2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/clk.h>
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#include <linux/etherdevice.h>
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#include <linux/init.h>
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#include <linux/linkage.h>
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#include <linux/platform_device.h>
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#include <linux/types.h>
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#include <linux/spi/spi.h>
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#include <asm/io.h>
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#include <asm/setup.h>
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#include <asm/arch/at32ap7000.h>
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#include <asm/arch/board.h>
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#include <asm/arch/init.h>
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/* Initialized by bootloader-specific startup code. */
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struct tag *bootloader_tags __initdata;
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struct eth_addr {
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u8 addr[6];
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};
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static struct eth_addr __initdata hw_addr[2];
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static struct eth_platform_data __initdata eth_data[2];
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static struct spi_board_info spi0_board_info[] __initdata = {
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{
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.modalias = "mtd_dataflash",
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.max_speed_hz = 10000000,
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.chip_select = 0,
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},
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};
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/*
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* The next two functions should go away as the boot loader is
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* supposed to initialize the macb address registers with a valid
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* ethernet address. But we need to keep it around for a while until
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* we can be reasonably sure the boot loader does this.
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*
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* The phy_id is ignored as the driver will probe for it.
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*/
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static int __init parse_tag_ethernet(struct tag *tag)
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{
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int i;
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i = tag->u.ethernet.mac_index;
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if (i < ARRAY_SIZE(hw_addr))
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memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
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sizeof(hw_addr[i].addr));
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return 0;
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}
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__tagtable(ATAG_ETHERNET, parse_tag_ethernet);
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static void __init set_hw_addr(struct platform_device *pdev)
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{
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struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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const u8 *addr;
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void __iomem *regs;
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struct clk *pclk;
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if (!res)
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return;
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if (pdev->id >= ARRAY_SIZE(hw_addr))
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return;
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addr = hw_addr[pdev->id].addr;
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if (!is_valid_ether_addr(addr))
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return;
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/*
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* Since this is board-specific code, we'll cheat and use the
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* physical address directly as we happen to know that it's
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* the same as the virtual address.
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*/
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regs = (void __iomem __force *)res->start;
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pclk = clk_get(&pdev->dev, "pclk");
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if (!pclk)
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return;
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clk_enable(pclk);
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__raw_writel((addr[3] << 24) | (addr[2] << 16)
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| (addr[1] << 8) | addr[0], regs + 0x98);
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__raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
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clk_disable(pclk);
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clk_put(pclk);
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}
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struct platform_device *at32_usart_map[1];
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unsigned int at32_nr_usarts = 1;
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void __init setup_board(void)
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{
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at32_map_usart(1, 0); /* USART 1: /dev/ttyS0, DB9 */
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at32_setup_serial_console(0);
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}
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static int __init atngw100_init(void)
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{
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/*
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* ATNGW100 uses 16-bit SDRAM interface, so we don't need to
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* reserve any pins for it.
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*/
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at32_add_system_devices();
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at32_add_device_usart(0);
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set_hw_addr(at32_add_device_eth(0, ð_data[0]));
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set_hw_addr(at32_add_device_eth(1, ð_data[1]));
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at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
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return 0;
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}
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postcore_initcall(atngw100_init);
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@@ -33,7 +33,7 @@ struct eth_addr {
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static struct eth_addr __initdata hw_addr[2];
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static struct eth_platform_data __initdata eth_data[2];
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extern struct lcdc_platform_data atstk1000_fb0_data;
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static struct lcdc_platform_data atstk1000_fb0_data;
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static struct spi_board_info spi0_board_info[] __initdata = {
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{
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@@ -148,6 +148,8 @@ static int __init atstk1002_init(void)
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set_hw_addr(at32_add_device_eth(0, ð_data[0]));
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at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
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atstk1000_fb0_data.fbmem_start = fbmem_start;
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atstk1000_fb0_data.fbmem_size = fbmem_size;
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at32_add_device_lcdc(0, &atstk1000_fb0_data);
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return 0;
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@@ -18,33 +18,3 @@
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/* Initialized by bootloader-specific startup code. */
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struct tag *bootloader_tags __initdata;
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struct lcdc_platform_data __initdata atstk1000_fb0_data;
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void __init board_setup_fbmem(unsigned long fbmem_start,
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unsigned long fbmem_size)
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{
|
||||
if (!fbmem_size)
|
||||
return;
|
||||
|
||||
if (!fbmem_start) {
|
||||
void *fbmem;
|
||||
|
||||
fbmem = alloc_bootmem_low_pages(fbmem_size);
|
||||
fbmem_start = __pa(fbmem);
|
||||
} else {
|
||||
pg_data_t *pgdat;
|
||||
|
||||
for_each_online_pgdat(pgdat) {
|
||||
if (fbmem_start >= pgdat->bdata->node_boot_start
|
||||
&& fbmem_start <= pgdat->bdata->node_low_pfn)
|
||||
reserve_bootmem_node(pgdat, fbmem_start,
|
||||
fbmem_size);
|
||||
}
|
||||
}
|
||||
|
||||
printk("%luKiB framebuffer memory at address 0x%08lx\n",
|
||||
fbmem_size >> 10, fbmem_start);
|
||||
atstk1000_fb0_data.fbmem_start = fbmem_start;
|
||||
atstk1000_fb0_data.fbmem_size = fbmem_size;
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
+44
-20
@@ -209,16 +209,17 @@ static const char *mmu_types[] = {
|
||||
void __init setup_processor(void)
|
||||
{
|
||||
unsigned long config0, config1;
|
||||
unsigned long features;
|
||||
unsigned cpu_id, cpu_rev, arch_id, arch_rev, mmu_type;
|
||||
unsigned tmp;
|
||||
|
||||
config0 = sysreg_read(CONFIG0); /* 0x0000013e; */
|
||||
config1 = sysreg_read(CONFIG1); /* 0x01f689a2; */
|
||||
cpu_id = config0 >> 24;
|
||||
cpu_rev = (config0 >> 16) & 0xff;
|
||||
arch_id = (config0 >> 13) & 0x07;
|
||||
arch_rev = (config0 >> 10) & 0x07;
|
||||
mmu_type = (config0 >> 7) & 0x03;
|
||||
config0 = sysreg_read(CONFIG0);
|
||||
config1 = sysreg_read(CONFIG1);
|
||||
cpu_id = SYSREG_BFEXT(PROCESSORID, config0);
|
||||
cpu_rev = SYSREG_BFEXT(PROCESSORREVISION, config0);
|
||||
arch_id = SYSREG_BFEXT(AT, config0);
|
||||
arch_rev = SYSREG_BFEXT(AR, config0);
|
||||
mmu_type = SYSREG_BFEXT(MMUT, config0);
|
||||
|
||||
boot_cpu_data.arch_type = arch_id;
|
||||
boot_cpu_data.cpu_type = cpu_id;
|
||||
@@ -226,16 +227,16 @@ void __init setup_processor(void)
|
||||
boot_cpu_data.cpu_revision = cpu_rev;
|
||||
boot_cpu_data.tlb_config = mmu_type;
|
||||
|
||||
tmp = (config1 >> 13) & 0x07;
|
||||
tmp = SYSREG_BFEXT(ILSZ, config1);
|
||||
if (tmp) {
|
||||
boot_cpu_data.icache.ways = 1 << ((config1 >> 10) & 0x07);
|
||||
boot_cpu_data.icache.sets = 1 << ((config1 >> 16) & 0x0f);
|
||||
boot_cpu_data.icache.ways = 1 << SYSREG_BFEXT(IASS, config1);
|
||||
boot_cpu_data.icache.sets = 1 << SYSREG_BFEXT(ISET, config1);
|
||||
boot_cpu_data.icache.linesz = 1 << (tmp + 1);
|
||||
}
|
||||
tmp = (config1 >> 3) & 0x07;
|
||||
tmp = SYSREG_BFEXT(DLSZ, config1);
|
||||
if (tmp) {
|
||||
boot_cpu_data.dcache.ways = 1 << (config1 & 0x07);
|
||||
boot_cpu_data.dcache.sets = 1 << ((config1 >> 6) & 0x0f);
|
||||
boot_cpu_data.dcache.ways = 1 << SYSREG_BFEXT(DASS, config1);
|
||||
boot_cpu_data.dcache.sets = 1 << SYSREG_BFEXT(DSET, config1);
|
||||
boot_cpu_data.dcache.linesz = 1 << (tmp + 1);
|
||||
}
|
||||
|
||||
@@ -250,16 +251,39 @@ void __init setup_processor(void)
|
||||
cpu_names[cpu_id], cpu_id, cpu_rev,
|
||||
arch_names[arch_id], arch_rev);
|
||||
printk ("CPU: MMU configuration: %s\n", mmu_types[mmu_type]);
|
||||
|
||||
printk ("CPU: features:");
|
||||
if (config0 & (1 << 6))
|
||||
printk(" fpu");
|
||||
if (config0 & (1 << 5))
|
||||
printk(" java");
|
||||
if (config0 & (1 << 4))
|
||||
printk(" perfctr");
|
||||
if (config0 & (1 << 3))
|
||||
features = 0;
|
||||
if (config0 & SYSREG_BIT(CONFIG0_R)) {
|
||||
features |= AVR32_FEATURE_RMW;
|
||||
printk(" rmw");
|
||||
}
|
||||
if (config0 & SYSREG_BIT(CONFIG0_D)) {
|
||||
features |= AVR32_FEATURE_DSP;
|
||||
printk(" dsp");
|
||||
}
|
||||
if (config0 & SYSREG_BIT(CONFIG0_S)) {
|
||||
features |= AVR32_FEATURE_SIMD;
|
||||
printk(" simd");
|
||||
}
|
||||
if (config0 & SYSREG_BIT(CONFIG0_O)) {
|
||||
features |= AVR32_FEATURE_OCD;
|
||||
printk(" ocd");
|
||||
}
|
||||
if (config0 & SYSREG_BIT(CONFIG0_P)) {
|
||||
features |= AVR32_FEATURE_PCTR;
|
||||
printk(" perfctr");
|
||||
}
|
||||
if (config0 & SYSREG_BIT(CONFIG0_J)) {
|
||||
features |= AVR32_FEATURE_JAVA;
|
||||
printk(" java");
|
||||
}
|
||||
if (config0 & SYSREG_BIT(CONFIG0_F)) {
|
||||
features |= AVR32_FEATURE_FPU;
|
||||
printk(" fpu");
|
||||
}
|
||||
printk("\n");
|
||||
boot_cpu_data.features = features;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PROC_FS
|
||||
|
||||
@@ -100,55 +100,49 @@ dtlb_miss_write:
|
||||
|
||||
.global tlb_miss_common
|
||||
tlb_miss_common:
|
||||
mfsr r0, SYSREG_PTBR
|
||||
mfsr r1, SYSREG_TLBEAR
|
||||
mfsr r0, SYSREG_TLBEAR
|
||||
mfsr r1, SYSREG_PTBR
|
||||
|
||||
/* Is it the vmalloc space? */
|
||||
bld r1, 31
|
||||
bld r0, 31
|
||||
brcs handle_vmalloc_miss
|
||||
|
||||
/* First level lookup */
|
||||
pgtbl_lookup:
|
||||
lsr r2, r1, PGDIR_SHIFT
|
||||
ld.w r0, r0[r2 << 2]
|
||||
bld r0, _PAGE_BIT_PRESENT
|
||||
lsr r2, r0, PGDIR_SHIFT
|
||||
ld.w r3, r1[r2 << 2]
|
||||
bfextu r1, r0, PAGE_SHIFT, PGDIR_SHIFT - PAGE_SHIFT
|
||||
bld r3, _PAGE_BIT_PRESENT
|
||||
brcc page_table_not_present
|
||||
|
||||
/* TODO: Check access rights on page table if necessary */
|
||||
|
||||
/* Translate to virtual address in P1. */
|
||||
andl r0, 0xf000
|
||||
sbr r0, 31
|
||||
andl r3, 0xf000
|
||||
sbr r3, 31
|
||||
|
||||
/* Second level lookup */
|
||||
lsl r1, (32 - PGDIR_SHIFT)
|
||||
lsr r1, (32 - PGDIR_SHIFT) + PAGE_SHIFT
|
||||
add r2, r0, r1 << 2
|
||||
ld.w r1, r2[0]
|
||||
bld r1, _PAGE_BIT_PRESENT
|
||||
ld.w r2, r3[r1 << 2]
|
||||
mfsr r0, SYSREG_TLBARLO
|
||||
bld r2, _PAGE_BIT_PRESENT
|
||||
brcc page_not_present
|
||||
|
||||
/* Mark the page as accessed */
|
||||
sbr r1, _PAGE_BIT_ACCESSED
|
||||
st.w r2[0], r1
|
||||
sbr r2, _PAGE_BIT_ACCESSED
|
||||
st.w r3[r1 << 2], r2
|
||||
|
||||
/* Drop software flags */
|
||||
andl r1, _PAGE_FLAGS_HARDWARE_MASK & 0xffff
|
||||
mtsr SYSREG_TLBELO, r1
|
||||
andl r2, _PAGE_FLAGS_HARDWARE_MASK & 0xffff
|
||||
mtsr SYSREG_TLBELO, r2
|
||||
|
||||
/* Figure out which entry we want to replace */
|
||||
mfsr r0, SYSREG_TLBARLO
|
||||
mfsr r1, SYSREG_MMUCR
|
||||
clz r2, r0
|
||||
brcc 1f
|
||||
mov r1, -1 /* All entries have been accessed, */
|
||||
mtsr SYSREG_TLBARLO, r1 /* so reset TLBAR */
|
||||
mov r2, 0 /* and start at 0 */
|
||||
1: mfsr r1, SYSREG_MMUCR
|
||||
lsl r2, 14
|
||||
andl r1, 0x3fff, COH
|
||||
or r1, r2
|
||||
mtsr SYSREG_MMUCR, r1
|
||||
mov r3, -1 /* All entries have been accessed, */
|
||||
mov r2, 0 /* so start at 0 */
|
||||
mtsr SYSREG_TLBARLO, r3 /* and reset TLBAR */
|
||||
|
||||
1: bfins r1, r2, SYSREG_DRP_OFFSET, SYSREG_DRP_SIZE
|
||||
mtsr SYSREG_MMUCR, r1
|
||||
tlbw
|
||||
|
||||
tlbmiss_restore
|
||||
@@ -156,8 +150,8 @@ pgtbl_lookup:
|
||||
|
||||
handle_vmalloc_miss:
|
||||
/* Simply do the lookup in init's page table */
|
||||
mov r0, lo(swapper_pg_dir)
|
||||
orh r0, hi(swapper_pg_dir)
|
||||
mov r1, lo(swapper_pg_dir)
|
||||
orh r1, hi(swapper_pg_dir)
|
||||
rjmp pgtbl_lookup
|
||||
|
||||
|
||||
@@ -340,12 +334,34 @@ do_bus_error_read:
|
||||
do_nmi_ll:
|
||||
sub sp, 4
|
||||
stmts --sp, r0-lr
|
||||
/* FIXME: Make sure RAR_NMI and RSR_NMI are pushed instead of *_EX */
|
||||
rcall save_full_context_ex
|
||||
mfsr r9, SYSREG_RSR_NMI
|
||||
mfsr r8, SYSREG_RAR_NMI
|
||||
bfextu r0, r9, MODE_SHIFT, 3
|
||||
brne 2f
|
||||
|
||||
1: pushm r8, r9 /* PC and SR */
|
||||
mfsr r12, SYSREG_ECR
|
||||
mov r11, sp
|
||||
rcall do_nmi
|
||||
rjmp bad_return
|
||||
popm r8-r9
|
||||
mtsr SYSREG_RAR_NMI, r8
|
||||
tst r0, r0
|
||||
mtsr SYSREG_RSR_NMI, r9
|
||||
brne 3f
|
||||
|
||||
ldmts sp++, r0-lr
|
||||
sub sp, -4 /* skip r12_orig */
|
||||
rete
|
||||
|
||||
2: sub r10, sp, -(FRAME_SIZE_FULL - REG_LR)
|
||||
stdsp sp[4], r10 /* replace saved SP */
|
||||
rjmp 1b
|
||||
|
||||
3: popm lr
|
||||
sub sp, -4 /* skip sp */
|
||||
popm r0-r12
|
||||
sub sp, -4 /* skip r12_orig */
|
||||
rete
|
||||
|
||||
handle_address_fault:
|
||||
sub sp, 4
|
||||
@@ -630,9 +646,12 @@ irq_level\level:
|
||||
rcall do_IRQ
|
||||
|
||||
lddsp r4, sp[REG_SR]
|
||||
andh r4, (MODE_MASK >> 16), COH
|
||||
bfextu r4, r4, SYSREG_M0_OFFSET, 3
|
||||
cp.w r4, MODE_SUPERVISOR >> SYSREG_M0_OFFSET
|
||||
breq 2f
|
||||
cp.w r4, MODE_USER >> SYSREG_M0_OFFSET
|
||||
#ifdef CONFIG_PREEMPT
|
||||
brne 2f
|
||||
brne 3f
|
||||
#else
|
||||
brne 1f
|
||||
#endif
|
||||
@@ -649,9 +668,18 @@ irq_level\level:
|
||||
sub sp, -4 /* ignore r12_orig */
|
||||
rete
|
||||
|
||||
2: get_thread_info r0
|
||||
ld.w r1, r0[TI_flags]
|
||||
bld r1, TIF_CPU_GOING_TO_SLEEP
|
||||
#ifdef CONFIG_PREEMPT
|
||||
2:
|
||||
get_thread_info r0
|
||||
brcc 3f
|
||||
#else
|
||||
brcc 1b
|
||||
#endif
|
||||
sub r1, pc, . - cpu_idle_skip_sleep
|
||||
stdsp sp[REG_PC], r1
|
||||
#ifdef CONFIG_PREEMPT
|
||||
3: get_thread_info r0
|
||||
ld.w r2, r0[TI_preempt_count]
|
||||
cp.w r2, 0
|
||||
brne 1b
|
||||
@@ -662,12 +690,32 @@ irq_level\level:
|
||||
bld r4, SYSREG_GM_OFFSET
|
||||
brcs 1b
|
||||
rcall preempt_schedule_irq
|
||||
rjmp 1b
|
||||
#endif
|
||||
rjmp 1b
|
||||
.endm
|
||||
|
||||
.section .irq.text,"ax",@progbits
|
||||
|
||||
.global cpu_idle_sleep
|
||||
cpu_idle_sleep:
|
||||
mask_interrupts
|
||||
get_thread_info r8
|
||||
ld.w r9, r8[TI_flags]
|
||||
bld r9, TIF_NEED_RESCHED
|
||||
brcs cpu_idle_enable_int_and_exit
|
||||
sbr r9, TIF_CPU_GOING_TO_SLEEP
|
||||
st.w r8[TI_flags], r9
|
||||
unmask_interrupts
|
||||
sleep 0
|
||||
cpu_idle_skip_sleep:
|
||||
mask_interrupts
|
||||
ld.w r9, r8[TI_flags]
|
||||
cbr r9, TIF_CPU_GOING_TO_SLEEP
|
||||
st.w r8[TI_flags], r9
|
||||
cpu_idle_enable_int_and_exit:
|
||||
unmask_interrupts
|
||||
retal r12
|
||||
|
||||
.global irq_level0
|
||||
.global irq_level1
|
||||
.global irq_level2
|
||||
|
||||
@@ -12,10 +12,11 @@
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/moduleloader.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/bug.h>
|
||||
#include <linux/elf.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/moduleloader.h>
|
||||
#include <linux/vmalloc.h>
|
||||
|
||||
void *module_alloc(unsigned long size)
|
||||
@@ -315,10 +316,10 @@ int module_finalize(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs,
|
||||
vfree(module->arch.syminfo);
|
||||
module->arch.syminfo = NULL;
|
||||
|
||||
return 0;
|
||||
return module_bug_finalize(hdr, sechdrs, module);
|
||||
}
|
||||
|
||||
void module_arch_cleanup(struct module *module)
|
||||
{
|
||||
|
||||
module_bug_cleanup(module);
|
||||
}
|
||||
|
||||
+173
-20
@@ -11,6 +11,7 @@
|
||||
#include <linux/fs.h>
|
||||
#include <linux/ptrace.h>
|
||||
#include <linux/reboot.h>
|
||||
#include <linux/uaccess.h>
|
||||
#include <linux/unistd.h>
|
||||
|
||||
#include <asm/sysreg.h>
|
||||
@@ -19,6 +20,8 @@
|
||||
void (*pm_power_off)(void) = NULL;
|
||||
EXPORT_SYMBOL(pm_power_off);
|
||||
|
||||
extern void cpu_idle_sleep(void);
|
||||
|
||||
/*
|
||||
* This file handles the architecture-dependent parts of process handling..
|
||||
*/
|
||||
@@ -27,9 +30,8 @@ void cpu_idle(void)
|
||||
{
|
||||
/* endless idle loop with no priority at all */
|
||||
while (1) {
|
||||
/* TODO: Enter sleep mode */
|
||||
while (!need_resched())
|
||||
cpu_relax();
|
||||
cpu_idle_sleep();
|
||||
preempt_enable_no_resched();
|
||||
schedule();
|
||||
preempt_disable();
|
||||
@@ -114,39 +116,178 @@ void release_thread(struct task_struct *dead_task)
|
||||
/* do nothing */
|
||||
}
|
||||
|
||||
static void dump_mem(const char *str, const char *log_lvl,
|
||||
unsigned long bottom, unsigned long top)
|
||||
{
|
||||
unsigned long p;
|
||||
int i;
|
||||
|
||||
printk("%s%s(0x%08lx to 0x%08lx)\n", log_lvl, str, bottom, top);
|
||||
|
||||
for (p = bottom & ~31; p < top; ) {
|
||||
printk("%s%04lx: ", log_lvl, p & 0xffff);
|
||||
|
||||
for (i = 0; i < 8; i++, p += 4) {
|
||||
unsigned int val;
|
||||
|
||||
if (p < bottom || p >= top)
|
||||
printk(" ");
|
||||
else {
|
||||
if (__get_user(val, (unsigned int __user *)p)) {
|
||||
printk("\n");
|
||||
goto out;
|
||||
}
|
||||
printk("%08x ", val);
|
||||
}
|
||||
}
|
||||
printk("\n");
|
||||
}
|
||||
|
||||
out:
|
||||
return;
|
||||
}
|
||||
|
||||
static inline int valid_stack_ptr(struct thread_info *tinfo, unsigned long p)
|
||||
{
|
||||
return (p > (unsigned long)tinfo)
|
||||
&& (p < (unsigned long)tinfo + THREAD_SIZE - 3);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_FRAME_POINTER
|
||||
static void show_trace_log_lvl(struct task_struct *tsk, unsigned long *sp,
|
||||
struct pt_regs *regs, const char *log_lvl)
|
||||
{
|
||||
unsigned long lr, fp;
|
||||
struct thread_info *tinfo;
|
||||
|
||||
if (regs)
|
||||
fp = regs->r7;
|
||||
else if (tsk == current)
|
||||
asm("mov %0, r7" : "=r"(fp));
|
||||
else
|
||||
fp = tsk->thread.cpu_context.r7;
|
||||
|
||||
/*
|
||||
* Walk the stack as long as the frame pointer (a) is within
|
||||
* the kernel stack of the task, and (b) it doesn't move
|
||||
* downwards.
|
||||
*/
|
||||
tinfo = task_thread_info(tsk);
|
||||
printk("%sCall trace:\n", log_lvl);
|
||||
while (valid_stack_ptr(tinfo, fp)) {
|
||||
unsigned long new_fp;
|
||||
|
||||
lr = *(unsigned long *)fp;
|
||||
#ifdef CONFIG_KALLSYMS
|
||||
printk("%s [<%08lx>] ", log_lvl, lr);
|
||||
#else
|
||||
printk(" [<%08lx>] ", lr);
|
||||
#endif
|
||||
print_symbol("%s\n", lr);
|
||||
|
||||
new_fp = *(unsigned long *)(fp + 4);
|
||||
if (new_fp <= fp)
|
||||
break;
|
||||
fp = new_fp;
|
||||
}
|
||||
printk("\n");
|
||||
}
|
||||
#else
|
||||
static void show_trace_log_lvl(struct task_struct *tsk, unsigned long *sp,
|
||||
struct pt_regs *regs, const char *log_lvl)
|
||||
{
|
||||
unsigned long addr;
|
||||
|
||||
printk("%sCall trace:\n", log_lvl);
|
||||
|
||||
while (!kstack_end(sp)) {
|
||||
addr = *sp++;
|
||||
if (kernel_text_address(addr)) {
|
||||
#ifdef CONFIG_KALLSYMS
|
||||
printk("%s [<%08lx>] ", log_lvl, addr);
|
||||
#else
|
||||
printk(" [<%08lx>] ", addr);
|
||||
#endif
|
||||
print_symbol("%s\n", addr);
|
||||
}
|
||||
}
|
||||
printk("\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
void show_stack_log_lvl(struct task_struct *tsk, unsigned long sp,
|
||||
struct pt_regs *regs, const char *log_lvl)
|
||||
{
|
||||
struct thread_info *tinfo;
|
||||
|
||||
if (sp == 0) {
|
||||
if (tsk)
|
||||
sp = tsk->thread.cpu_context.ksp;
|
||||
else
|
||||
sp = (unsigned long)&tinfo;
|
||||
}
|
||||
if (!tsk)
|
||||
tsk = current;
|
||||
|
||||
tinfo = task_thread_info(tsk);
|
||||
|
||||
if (valid_stack_ptr(tinfo, sp)) {
|
||||
dump_mem("Stack: ", log_lvl, sp,
|
||||
THREAD_SIZE + (unsigned long)tinfo);
|
||||
show_trace_log_lvl(tsk, (unsigned long *)sp, regs, log_lvl);
|
||||
}
|
||||
}
|
||||
|
||||
void show_stack(struct task_struct *tsk, unsigned long *stack)
|
||||
{
|
||||
show_stack_log_lvl(tsk, (unsigned long)stack, NULL, "");
|
||||
}
|
||||
|
||||
void dump_stack(void)
|
||||
{
|
||||
unsigned long stack;
|
||||
|
||||
show_trace_log_lvl(current, &stack, NULL, "");
|
||||
}
|
||||
EXPORT_SYMBOL(dump_stack);
|
||||
|
||||
static const char *cpu_modes[] = {
|
||||
"Application", "Supervisor", "Interrupt level 0", "Interrupt level 1",
|
||||
"Interrupt level 2", "Interrupt level 3", "Exception", "NMI"
|
||||
};
|
||||
|
||||
void show_regs(struct pt_regs *regs)
|
||||
void show_regs_log_lvl(struct pt_regs *regs, const char *log_lvl)
|
||||
{
|
||||
unsigned long sp = regs->sp;
|
||||
unsigned long lr = regs->lr;
|
||||
unsigned long mode = (regs->sr & MODE_MASK) >> MODE_SHIFT;
|
||||
|
||||
if (!user_mode(regs))
|
||||
if (!user_mode(regs)) {
|
||||
sp = (unsigned long)regs + FRAME_SIZE_FULL;
|
||||
|
||||
print_symbol("PC is at %s\n", instruction_pointer(regs));
|
||||
print_symbol("LR is at %s\n", lr);
|
||||
printk("pc : [<%08lx>] lr : [<%08lx>] %s\n"
|
||||
"sp : %08lx r12: %08lx r11: %08lx\n",
|
||||
instruction_pointer(regs),
|
||||
lr, print_tainted(), sp, regs->r12, regs->r11);
|
||||
printk("r10: %08lx r9 : %08lx r8 : %08lx\n",
|
||||
regs->r10, regs->r9, regs->r8);
|
||||
printk("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
|
||||
regs->r7, regs->r6, regs->r5, regs->r4);
|
||||
printk("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
|
||||
regs->r3, regs->r2, regs->r1, regs->r0);
|
||||
printk("Flags: %c%c%c%c%c\n",
|
||||
printk("%s", log_lvl);
|
||||
print_symbol("PC is at %s\n", instruction_pointer(regs));
|
||||
printk("%s", log_lvl);
|
||||
print_symbol("LR is at %s\n", lr);
|
||||
}
|
||||
|
||||
printk("%spc : [<%08lx>] lr : [<%08lx>] %s\n"
|
||||
"%ssp : %08lx r12: %08lx r11: %08lx\n",
|
||||
log_lvl, instruction_pointer(regs), lr, print_tainted(),
|
||||
log_lvl, sp, regs->r12, regs->r11);
|
||||
printk("%sr10: %08lx r9 : %08lx r8 : %08lx\n",
|
||||
log_lvl, regs->r10, regs->r9, regs->r8);
|
||||
printk("%sr7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
|
||||
log_lvl, regs->r7, regs->r6, regs->r5, regs->r4);
|
||||
printk("%sr3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
|
||||
log_lvl, regs->r3, regs->r2, regs->r1, regs->r0);
|
||||
printk("%sFlags: %c%c%c%c%c\n", log_lvl,
|
||||
regs->sr & SR_Q ? 'Q' : 'q',
|
||||
regs->sr & SR_V ? 'V' : 'v',
|
||||
regs->sr & SR_N ? 'N' : 'n',
|
||||
regs->sr & SR_Z ? 'Z' : 'z',
|
||||
regs->sr & SR_C ? 'C' : 'c');
|
||||
printk("Mode bits: %c%c%c%c%c%c%c%c%c\n",
|
||||
printk("%sMode bits: %c%c%c%c%c%c%c%c%c\n", log_lvl,
|
||||
regs->sr & SR_H ? 'H' : 'h',
|
||||
regs->sr & SR_R ? 'R' : 'r',
|
||||
regs->sr & SR_J ? 'J' : 'j',
|
||||
@@ -156,9 +297,21 @@ void show_regs(struct pt_regs *regs)
|
||||
regs->sr & SR_I1M ? '1' : '.',
|
||||
regs->sr & SR_I0M ? '0' : '.',
|
||||
regs->sr & SR_GM ? 'G' : 'g');
|
||||
printk("CPU Mode: %s\n", cpu_modes[mode]);
|
||||
printk("%sCPU Mode: %s\n", log_lvl, cpu_modes[mode]);
|
||||
printk("%sProcess: %s [%d] (task: %p thread: %p)\n",
|
||||
log_lvl, current->comm, current->pid, current,
|
||||
task_thread_info(current));
|
||||
}
|
||||
|
||||
show_trace(NULL, (unsigned long *)sp, regs);
|
||||
void show_regs(struct pt_regs *regs)
|
||||
{
|
||||
unsigned long sp = regs->sp;
|
||||
|
||||
if (!user_mode(regs))
|
||||
sp = (unsigned long)regs + FRAME_SIZE_FULL;
|
||||
|
||||
show_regs_log_lvl(regs, "");
|
||||
show_trace_log_lvl(current, (unsigned long *)sp, regs, "");
|
||||
}
|
||||
EXPORT_SYMBOL(show_regs);
|
||||
|
||||
|
||||
+372
-114
File diff suppressed because it is too large
Load Diff
+77
-73
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (C) 2004-2006 Atmel Corporation
|
||||
* Copyright (C) 2004-2007 Atmel Corporation
|
||||
*
|
||||
* Based on MIPS implementation arch/mips/kernel/time.c
|
||||
* Copyright 2001 MontaVista Software Inc.
|
||||
@@ -20,18 +20,25 @@
|
||||
#include <linux/init.h>
|
||||
#include <linux/profile.h>
|
||||
#include <linux/sysdev.h>
|
||||
#include <linux/err.h>
|
||||
|
||||
#include <asm/div64.h>
|
||||
#include <asm/sysreg.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/sections.h>
|
||||
|
||||
static cycle_t read_cycle_count(void)
|
||||
/* how many counter cycles in a jiffy? */
|
||||
static u32 cycles_per_jiffy;
|
||||
|
||||
/* the count value for the next timer interrupt */
|
||||
static u32 expirelo;
|
||||
|
||||
cycle_t __weak read_cycle_count(void)
|
||||
{
|
||||
return (cycle_t)sysreg_read(COUNT);
|
||||
}
|
||||
|
||||
static struct clocksource clocksource_avr32 = {
|
||||
struct clocksource __weak clocksource_avr32 = {
|
||||
.name = "avr32",
|
||||
.rating = 350,
|
||||
.read = read_cycle_count,
|
||||
@@ -40,12 +47,20 @@ static struct clocksource clocksource_avr32 = {
|
||||
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
||||
};
|
||||
|
||||
irqreturn_t __weak timer_interrupt(int irq, void *dev_id);
|
||||
|
||||
struct irqaction timer_irqaction = {
|
||||
.handler = timer_interrupt,
|
||||
.flags = IRQF_DISABLED,
|
||||
.name = "timer",
|
||||
};
|
||||
|
||||
/*
|
||||
* By default we provide the null RTC ops
|
||||
*/
|
||||
static unsigned long null_rtc_get_time(void)
|
||||
{
|
||||
return mktime(2004, 1, 1, 0, 0, 0);
|
||||
return mktime(2007, 1, 1, 0, 0, 0);
|
||||
}
|
||||
|
||||
static int null_rtc_set_time(unsigned long sec)
|
||||
@@ -56,23 +71,14 @@ static int null_rtc_set_time(unsigned long sec)
|
||||
static unsigned long (*rtc_get_time)(void) = null_rtc_get_time;
|
||||
static int (*rtc_set_time)(unsigned long) = null_rtc_set_time;
|
||||
|
||||
/* how many counter cycles in a jiffy? */
|
||||
static unsigned long cycles_per_jiffy;
|
||||
|
||||
/* cycle counter value at the previous timer interrupt */
|
||||
static unsigned int timerhi, timerlo;
|
||||
|
||||
/* the count value for the next timer interrupt */
|
||||
static unsigned int expirelo;
|
||||
|
||||
static void avr32_timer_ack(void)
|
||||
{
|
||||
unsigned int count;
|
||||
u32 count;
|
||||
|
||||
/* Ack this timer interrupt and set the next one */
|
||||
expirelo += cycles_per_jiffy;
|
||||
/* setting COMPARE to 0 stops the COUNT-COMPARE */
|
||||
if (expirelo == 0) {
|
||||
printk(KERN_DEBUG "expirelo == 0\n");
|
||||
sysreg_write(COMPARE, expirelo + 1);
|
||||
} else {
|
||||
sysreg_write(COMPARE, expirelo);
|
||||
@@ -86,27 +92,56 @@ static void avr32_timer_ack(void)
|
||||
}
|
||||
}
|
||||
|
||||
static unsigned int avr32_hpt_read(void)
|
||||
int __weak avr32_hpt_init(void)
|
||||
{
|
||||
return sysreg_read(COUNT);
|
||||
int ret;
|
||||
unsigned long mult, shift, count_hz;
|
||||
|
||||
count_hz = clk_get_rate(boot_cpu_data.clk);
|
||||
shift = clocksource_avr32.shift;
|
||||
mult = clocksource_hz2mult(count_hz, shift);
|
||||
clocksource_avr32.mult = mult;
|
||||
|
||||
{
|
||||
u64 tmp;
|
||||
|
||||
tmp = TICK_NSEC;
|
||||
tmp <<= shift;
|
||||
tmp += mult / 2;
|
||||
do_div(tmp, mult);
|
||||
|
||||
cycles_per_jiffy = tmp;
|
||||
}
|
||||
|
||||
ret = setup_irq(0, &timer_irqaction);
|
||||
if (ret) {
|
||||
pr_debug("timer: could not request IRQ 0: %d\n", ret);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
printk(KERN_INFO "timer: AT32AP COUNT-COMPARE at irq 0, "
|
||||
"%lu.%03lu MHz\n",
|
||||
((count_hz + 500) / 1000) / 1000,
|
||||
((count_hz + 500) / 1000) % 1000);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Taken from MIPS c0_hpt_timer_init().
|
||||
*
|
||||
* Why is it so complicated, and what is "count"? My assumption is
|
||||
* that `count' specifies the "reference cycle", i.e. the cycle since
|
||||
* reset that should mean "zero". The reason COUNT is written twice is
|
||||
* probably to make sure we don't get any timer interrupts while we
|
||||
* are messing with the counter.
|
||||
* The reason COUNT is written twice is probably to make sure we don't get any
|
||||
* timer interrupts while we are messing with the counter.
|
||||
*/
|
||||
static void avr32_hpt_init(unsigned int count)
|
||||
int __weak avr32_hpt_start(void)
|
||||
{
|
||||
count = sysreg_read(COUNT) - count;
|
||||
u32 count = sysreg_read(COUNT);
|
||||
expirelo = (count / cycles_per_jiffy + 1) * cycles_per_jiffy;
|
||||
sysreg_write(COUNT, expirelo - cycles_per_jiffy);
|
||||
sysreg_write(COMPARE, expirelo);
|
||||
sysreg_write(COUNT, count);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -115,26 +150,18 @@ static void avr32_hpt_init(unsigned int count)
|
||||
*
|
||||
* In UP mode, it is invoked from the (global) timer_interrupt.
|
||||
*/
|
||||
static void local_timer_interrupt(int irq, void *dev_id)
|
||||
void local_timer_interrupt(int irq, void *dev_id)
|
||||
{
|
||||
if (current->pid)
|
||||
profile_tick(CPU_PROFILING);
|
||||
update_process_times(user_mode(get_irq_regs()));
|
||||
}
|
||||
|
||||
static irqreturn_t
|
||||
timer_interrupt(int irq, void *dev_id)
|
||||
irqreturn_t __weak timer_interrupt(int irq, void *dev_id)
|
||||
{
|
||||
unsigned int count;
|
||||
|
||||
/* ack timer interrupt and try to set next interrupt */
|
||||
count = avr32_hpt_read();
|
||||
avr32_timer_ack();
|
||||
|
||||
/* Update timerhi/timerlo for intra-jiffy calibration */
|
||||
timerhi += count < timerlo; /* Wrap around */
|
||||
timerlo = count;
|
||||
|
||||
/*
|
||||
* Call the generic timer interrupt handler
|
||||
*/
|
||||
@@ -153,60 +180,37 @@ timer_interrupt(int irq, void *dev_id)
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static struct irqaction timer_irqaction = {
|
||||
.handler = timer_interrupt,
|
||||
.flags = IRQF_DISABLED,
|
||||
.name = "timer",
|
||||
};
|
||||
|
||||
void __init time_init(void)
|
||||
{
|
||||
unsigned long mult, shift, count_hz;
|
||||
int ret;
|
||||
|
||||
/*
|
||||
* Make sure we don't get any COMPARE interrupts before we can
|
||||
* handle them.
|
||||
*/
|
||||
sysreg_write(COMPARE, 0);
|
||||
|
||||
xtime.tv_sec = rtc_get_time();
|
||||
xtime.tv_nsec = 0;
|
||||
|
||||
set_normalized_timespec(&wall_to_monotonic,
|
||||
-xtime.tv_sec, -xtime.tv_nsec);
|
||||
|
||||
printk("Before time_init: count=%08lx, compare=%08lx\n",
|
||||
(unsigned long)sysreg_read(COUNT),
|
||||
(unsigned long)sysreg_read(COMPARE));
|
||||
|
||||
count_hz = clk_get_rate(boot_cpu_data.clk);
|
||||
shift = clocksource_avr32.shift;
|
||||
mult = clocksource_hz2mult(count_hz, shift);
|
||||
clocksource_avr32.mult = mult;
|
||||
|
||||
printk("Cycle counter: mult=%lu, shift=%lu\n", mult, shift);
|
||||
|
||||
{
|
||||
u64 tmp;
|
||||
|
||||
tmp = TICK_NSEC;
|
||||
tmp <<= shift;
|
||||
tmp += mult / 2;
|
||||
do_div(tmp, mult);
|
||||
|
||||
cycles_per_jiffy = tmp;
|
||||
ret = avr32_hpt_init();
|
||||
if (ret) {
|
||||
pr_debug("timer: failed setup: %d\n", ret);
|
||||
return;
|
||||
}
|
||||
|
||||
/* This sets up the high precision timer for the first interrupt. */
|
||||
avr32_hpt_init(avr32_hpt_read());
|
||||
|
||||
printk("After time_init: count=%08lx, compare=%08lx\n",
|
||||
(unsigned long)sysreg_read(COUNT),
|
||||
(unsigned long)sysreg_read(COMPARE));
|
||||
|
||||
ret = clocksource_register(&clocksource_avr32);
|
||||
if (ret)
|
||||
printk(KERN_ERR
|
||||
"timer: could not register clocksource: %d\n", ret);
|
||||
pr_debug("timer: could not register clocksource: %d\n", ret);
|
||||
|
||||
ret = setup_irq(0, &timer_irqaction);
|
||||
if (ret)
|
||||
printk("timer: could not request IRQ 0: %d\n", ret);
|
||||
ret = avr32_hpt_start();
|
||||
if (ret) {
|
||||
pr_debug("timer: failed starting: %d\n", ret);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
static struct sysdev_class timer_class = {
|
||||
|
||||
+126
-293
File diff suppressed because it is too large
Load Diff
@@ -26,6 +26,12 @@ SECTIONS
|
||||
_sinittext = .;
|
||||
*(.text.reset)
|
||||
*(.init.text)
|
||||
/*
|
||||
* .exit.text is discarded at runtime, not
|
||||
* link time, to deal with references from
|
||||
* __bug_table
|
||||
*/
|
||||
*(.exit.text)
|
||||
_einittext = .;
|
||||
. = ALIGN(4);
|
||||
__tagtable_begin = .;
|
||||
@@ -86,6 +92,8 @@ SECTIONS
|
||||
__stop___ex_table = .;
|
||||
}
|
||||
|
||||
BUG_TABLE
|
||||
|
||||
RODATA
|
||||
|
||||
. = ALIGN(8192);
|
||||
@@ -126,7 +134,6 @@ SECTIONS
|
||||
* thrown away, as cleanup code is never called unless it's a module.
|
||||
*/
|
||||
/DISCARD/ : {
|
||||
*(.exit.text)
|
||||
*(.exit.data)
|
||||
*(.exitcall.exit)
|
||||
}
|
||||
|
||||
@@ -0,0 +1,31 @@
|
||||
if PLATFORM_AT32AP
|
||||
|
||||
menu "Atmel AVR32 AP options"
|
||||
|
||||
choice
|
||||
prompt "AT32AP7000 static memory bus width"
|
||||
depends on CPU_AT32AP7000
|
||||
default AP7000_16_BIT_SMC
|
||||
help
|
||||
Define the width of the AP7000 external static memory interface.
|
||||
This is used to determine how to mangle the address and/or data
|
||||
when doing little-endian port access.
|
||||
|
||||
The current code can only support a single external memory bus
|
||||
width for all chip selects, excluding the flash (which is using
|
||||
raw access and is thus not affected by any of this.)
|
||||
|
||||
config AP7000_32_BIT_SMC
|
||||
bool "32 bit"
|
||||
|
||||
config AP7000_16_BIT_SMC
|
||||
bool "16 bit"
|
||||
|
||||
config AP7000_8_BIT_SMC
|
||||
bool "8 bit"
|
||||
|
||||
endchoice
|
||||
|
||||
endmenu
|
||||
|
||||
endif # PLATFORM_AT32AP
|
||||
@@ -1,2 +1,3 @@
|
||||
obj-y += at32ap.o clock.o intc.o extint.o pio.o hsmc.o
|
||||
obj-$(CONFIG_CPU_AT32AP7000) += at32ap7000.o
|
||||
obj-$(CONFIG_CPU_AT32AP7000) += time-tc.o
|
||||
|
||||
@@ -18,6 +18,7 @@
|
||||
#include <asm/arch/sm.h>
|
||||
|
||||
#include "clock.h"
|
||||
#include "hmatrix.h"
|
||||
#include "pio.h"
|
||||
#include "sm.h"
|
||||
|
||||
@@ -416,7 +417,15 @@ struct platform_device at32_sm_device = {
|
||||
.resource = sm_resource,
|
||||
.num_resources = ARRAY_SIZE(sm_resource),
|
||||
};
|
||||
DEV_CLK(pclk, at32_sm, pbb, 0);
|
||||
static struct clk at32_sm_pclk = {
|
||||
.name = "pclk",
|
||||
.dev = &at32_sm_device.dev,
|
||||
.parent = &pbb_clk,
|
||||
.mode = pbb_clk_mode,
|
||||
.get_rate = pbb_clk_get_rate,
|
||||
.users = 1,
|
||||
.index = 0,
|
||||
};
|
||||
|
||||
static struct resource intc0_resource[] = {
|
||||
PBMEM(0xfff00400),
|
||||
@@ -442,6 +451,7 @@ static struct clk hramc_clk = {
|
||||
.mode = hsb_clk_mode,
|
||||
.get_rate = hsb_clk_get_rate,
|
||||
.users = 1,
|
||||
.index = 3,
|
||||
};
|
||||
|
||||
static struct resource smc0_resource[] = {
|
||||
@@ -466,6 +476,57 @@ static struct clk pico_clk = {
|
||||
.users = 1,
|
||||
};
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* HMATRIX
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
static struct clk hmatrix_clk = {
|
||||
.name = "hmatrix_clk",
|
||||
.parent = &pbb_clk,
|
||||
.mode = pbb_clk_mode,
|
||||
.get_rate = pbb_clk_get_rate,
|
||||
.index = 2,
|
||||
.users = 1,
|
||||
};
|
||||
#define HMATRIX_BASE ((void __iomem *)0xfff00800)
|
||||
|
||||
#define hmatrix_readl(reg) \
|
||||
__raw_readl((HMATRIX_BASE) + HMATRIX_##reg)
|
||||
#define hmatrix_writel(reg,value) \
|
||||
__raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg)
|
||||
|
||||
/*
|
||||
* Set bits in the HMATRIX Special Function Register (SFR) used by the
|
||||
* External Bus Interface (EBI). This can be used to enable special
|
||||
* features like CompactFlash support, NAND Flash support, etc. on
|
||||
* certain chipselects.
|
||||
*/
|
||||
static inline void set_ebi_sfr_bits(u32 mask)
|
||||
{
|
||||
u32 sfr;
|
||||
|
||||
clk_enable(&hmatrix_clk);
|
||||
sfr = hmatrix_readl(SFR4);
|
||||
sfr |= mask;
|
||||
hmatrix_writel(SFR4, sfr);
|
||||
clk_disable(&hmatrix_clk);
|
||||
}
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* System Timer/Counter (TC)
|
||||
* -------------------------------------------------------------------- */
|
||||
static struct resource at32_systc0_resource[] = {
|
||||
PBMEM(0xfff00c00),
|
||||
IRQ(22),
|
||||
};
|
||||
struct platform_device at32_systc0_device = {
|
||||
.name = "systc",
|
||||
.id = 0,
|
||||
.resource = at32_systc0_resource,
|
||||
.num_resources = ARRAY_SIZE(at32_systc0_resource),
|
||||
};
|
||||
DEV_CLK(pclk, at32_systc0, pbb, 3);
|
||||
|
||||
/* --------------------------------------------------------------------
|
||||
* PIO
|
||||
* -------------------------------------------------------------------- */
|
||||
@@ -514,6 +575,8 @@ void __init at32_add_system_devices(void)
|
||||
platform_device_register(&smc0_device);
|
||||
platform_device_register(&pdc_device);
|
||||
|
||||
platform_device_register(&at32_systc0_device);
|
||||
|
||||
platform_device_register(&pio0_device);
|
||||
platform_device_register(&pio1_device);
|
||||
platform_device_register(&pio2_device);
|
||||
@@ -950,6 +1013,7 @@ struct clk *at32_clock_list[] = {
|
||||
&pbb_clk,
|
||||
&at32_sm_pclk,
|
||||
&at32_intc0_pclk,
|
||||
&hmatrix_clk,
|
||||
&ebi_clk,
|
||||
&hramc_clk,
|
||||
&smc0_pclk,
|
||||
@@ -962,6 +1026,7 @@ struct clk *at32_clock_list[] = {
|
||||
&pio2_mck,
|
||||
&pio3_mck,
|
||||
&pio4_mck,
|
||||
&at32_systc0_pclk,
|
||||
&atmel_usart0_usart,
|
||||
&atmel_usart1_usart,
|
||||
&atmel_usart2_usart,
|
||||
@@ -1024,6 +1089,9 @@ void __init at32_clock_init(void)
|
||||
for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) {
|
||||
struct clk *clk = at32_clock_list[i];
|
||||
|
||||
if (clk->users == 0)
|
||||
continue;
|
||||
|
||||
if (clk->mode == &cpu_clk_mode)
|
||||
cpu_mask |= 1 << clk->index;
|
||||
else if (clk->mode == &hsb_clk_mode)
|
||||
|
||||
@@ -0,0 +1,182 @@
|
||||
/*
|
||||
* Register definitions for High-Speed Bus Matrix
|
||||
*/
|
||||
#ifndef __HMATRIX_H
|
||||
#define __HMATRIX_H
|
||||
|
||||
/* HMATRIX register offsets */
|
||||
#define HMATRIX_MCFG0 0x0000
|
||||
#define HMATRIX_MCFG1 0x0004
|
||||
#define HMATRIX_MCFG2 0x0008
|
||||
#define HMATRIX_MCFG3 0x000c
|
||||
#define HMATRIX_MCFG4 0x0010
|
||||
#define HMATRIX_MCFG5 0x0014
|
||||
#define HMATRIX_MCFG6 0x0018
|
||||
#define HMATRIX_MCFG7 0x001c
|
||||
#define HMATRIX_MCFG8 0x0020
|
||||
#define HMATRIX_MCFG9 0x0024
|
||||
#define HMATRIX_MCFG10 0x0028
|
||||
#define HMATRIX_MCFG11 0x002c
|
||||
#define HMATRIX_MCFG12 0x0030
|
||||
#define HMATRIX_MCFG13 0x0034
|
||||
#define HMATRIX_MCFG14 0x0038
|
||||
#define HMATRIX_MCFG15 0x003c
|
||||
#define HMATRIX_SCFG0 0x0040
|
||||
#define HMATRIX_SCFG1 0x0044
|
||||
#define HMATRIX_SCFG2 0x0048
|
||||
#define HMATRIX_SCFG3 0x004c
|
||||
#define HMATRIX_SCFG4 0x0050
|
||||
#define HMATRIX_SCFG5 0x0054
|
||||
#define HMATRIX_SCFG6 0x0058
|
||||
#define HMATRIX_SCFG7 0x005c
|
||||
#define HMATRIX_SCFG8 0x0060
|
||||
#define HMATRIX_SCFG9 0x0064
|
||||
#define HMATRIX_SCFG10 0x0068
|
||||
#define HMATRIX_SCFG11 0x006c
|
||||
#define HMATRIX_SCFG12 0x0070
|
||||
#define HMATRIX_SCFG13 0x0074
|
||||
#define HMATRIX_SCFG14 0x0078
|
||||
#define HMATRIX_SCFG15 0x007c
|
||||
#define HMATRIX_PRAS0 0x0080
|
||||
#define HMATRIX_PRBS0 0x0084
|
||||
#define HMATRIX_PRAS1 0x0088
|
||||
#define HMATRIX_PRBS1 0x008c
|
||||
#define HMATRIX_PRAS2 0x0090
|
||||
#define HMATRIX_PRBS2 0x0094
|
||||
#define HMATRIX_PRAS3 0x0098
|
||||
#define HMATRIX_PRBS3 0x009c
|
||||
#define HMATRIX_PRAS4 0x00a0
|
||||
#define HMATRIX_PRBS4 0x00a4
|
||||
#define HMATRIX_PRAS5 0x00a8
|
||||
#define HMATRIX_PRBS5 0x00ac
|
||||
#define HMATRIX_PRAS6 0x00b0
|
||||
#define HMATRIX_PRBS6 0x00b4
|
||||
#define HMATRIX_PRAS7 0x00b8
|
||||
#define HMATRIX_PRBS7 0x00bc
|
||||
#define HMATRIX_PRAS8 0x00c0
|
||||
#define HMATRIX_PRBS8 0x00c4
|
||||
#define HMATRIX_PRAS9 0x00c8
|
||||
#define HMATRIX_PRBS9 0x00cc
|
||||
#define HMATRIX_PRAS10 0x00d0
|
||||
#define HMATRIX_PRBS10 0x00d4
|
||||
#define HMATRIX_PRAS11 0x00d8
|
||||
#define HMATRIX_PRBS11 0x00dc
|
||||
#define HMATRIX_PRAS12 0x00e0
|
||||
#define HMATRIX_PRBS12 0x00e4
|
||||
#define HMATRIX_PRAS13 0x00e8
|
||||
#define HMATRIX_PRBS13 0x00ec
|
||||
#define HMATRIX_PRAS14 0x00f0
|
||||
#define HMATRIX_PRBS14 0x00f4
|
||||
#define HMATRIX_PRAS15 0x00f8
|
||||
#define HMATRIX_PRBS15 0x00fc
|
||||
#define HMATRIX_MRCR 0x0100
|
||||
#define HMATRIX_SFR0 0x0110
|
||||
#define HMATRIX_SFR1 0x0114
|
||||
#define HMATRIX_SFR2 0x0118
|
||||
#define HMATRIX_SFR3 0x011c
|
||||
#define HMATRIX_SFR4 0x0120
|
||||
#define HMATRIX_SFR5 0x0124
|
||||
#define HMATRIX_SFR6 0x0128
|
||||
#define HMATRIX_SFR7 0x012c
|
||||
#define HMATRIX_SFR8 0x0130
|
||||
#define HMATRIX_SFR9 0x0134
|
||||
#define HMATRIX_SFR10 0x0138
|
||||
#define HMATRIX_SFR11 0x013c
|
||||
#define HMATRIX_SFR12 0x0140
|
||||
#define HMATRIX_SFR13 0x0144
|
||||
#define HMATRIX_SFR14 0x0148
|
||||
#define HMATRIX_SFR15 0x014c
|
||||
|
||||
/* Bitfields in MCFGx */
|
||||
#define HMATRIX_ULBT_OFFSET 0
|
||||
#define HMATRIX_ULBT_SIZE 3
|
||||
|
||||
/* Bitfields in SCFGx */
|
||||
#define HMATRIX_SLOT_CYCLE_OFFSET 0
|
||||
#define HMATRIX_SLOT_CYCLE_SIZE 8
|
||||
#define HMATRIX_DEFMSTR_TYPE_OFFSET 16
|
||||
#define HMATRIX_DEFMSTR_TYPE_SIZE 2
|
||||
#define HMATRIX_FIXED_DEFMSTR_OFFSET 18
|
||||
#define HMATRIX_FIXED_DEFMSTR_SIZE 4
|
||||
#define HMATRIX_ARBT_OFFSET 24
|
||||
#define HMATRIX_ARBT_SIZE 2
|
||||
|
||||
/* Bitfields in PRASx */
|
||||
#define HMATRIX_M0PR_OFFSET 0
|
||||
#define HMATRIX_M0PR_SIZE 4
|
||||
#define HMATRIX_M1PR_OFFSET 4
|
||||
#define HMATRIX_M1PR_SIZE 4
|
||||
#define HMATRIX_M2PR_OFFSET 8
|
||||
#define HMATRIX_M2PR_SIZE 4
|
||||
#define HMATRIX_M3PR_OFFSET 12
|
||||
#define HMATRIX_M3PR_SIZE 4
|
||||
#define HMATRIX_M4PR_OFFSET 16
|
||||
#define HMATRIX_M4PR_SIZE 4
|
||||
#define HMATRIX_M5PR_OFFSET 20
|
||||
#define HMATRIX_M5PR_SIZE 4
|
||||
#define HMATRIX_M6PR_OFFSET 24
|
||||
#define HMATRIX_M6PR_SIZE 4
|
||||
#define HMATRIX_M7PR_OFFSET 28
|
||||
#define HMATRIX_M7PR_SIZE 4
|
||||
|
||||
/* Bitfields in PRBSx */
|
||||
#define HMATRIX_M8PR_OFFSET 0
|
||||
#define HMATRIX_M8PR_SIZE 4
|
||||
#define HMATRIX_M9PR_OFFSET 4
|
||||
#define HMATRIX_M9PR_SIZE 4
|
||||
#define HMATRIX_M10PR_OFFSET 8
|
||||
#define HMATRIX_M10PR_SIZE 4
|
||||
#define HMATRIX_M11PR_OFFSET 12
|
||||
#define HMATRIX_M11PR_SIZE 4
|
||||
#define HMATRIX_M12PR_OFFSET 16
|
||||
#define HMATRIX_M12PR_SIZE 4
|
||||
#define HMATRIX_M13PR_OFFSET 20
|
||||
#define HMATRIX_M13PR_SIZE 4
|
||||
#define HMATRIX_M14PR_OFFSET 24
|
||||
#define HMATRIX_M14PR_SIZE 4
|
||||
#define HMATRIX_M15PR_OFFSET 28
|
||||
#define HMATRIX_M15PR_SIZE 4
|
||||
|
||||
/* Bitfields in SFR4 */
|
||||
#define HMATRIX_CS1A_OFFSET 1
|
||||
#define HMATRIX_CS1A_SIZE 1
|
||||
#define HMATRIX_CS3A_OFFSET 3
|
||||
#define HMATRIX_CS3A_SIZE 1
|
||||
#define HMATRIX_CS4A_OFFSET 4
|
||||
#define HMATRIX_CS4A_SIZE 1
|
||||
#define HMATRIX_CS5A_OFFSET 5
|
||||
#define HMATRIX_CS5A_SIZE 1
|
||||
#define HMATRIX_DBPUC_OFFSET 8
|
||||
#define HMATRIX_DBPUC_SIZE 1
|
||||
|
||||
/* Constants for ULBT */
|
||||
#define HMATRIX_ULBT_INFINITE 0
|
||||
#define HMATRIX_ULBT_SINGLE 1
|
||||
#define HMATRIX_ULBT_FOUR_BEAT 2
|
||||
#define HMATRIX_ULBT_EIGHT_BEAT 3
|
||||
#define HMATRIX_ULBT_SIXTEEN_BEAT 4
|
||||
|
||||
/* Constants for DEFMSTR_TYPE */
|
||||
#define HMATRIX_DEFMSTR_TYPE_NO_DEFAULT 0
|
||||
#define HMATRIX_DEFMSTR_TYPE_LAST_DEFAULT 1
|
||||
#define HMATRIX_DEFMSTR_TYPE_FIXED_DEFAULT 2
|
||||
|
||||
/* Constants for ARBT */
|
||||
#define HMATRIX_ARBT_ROUND_ROBIN 0
|
||||
#define HMATRIX_ARBT_FIXED_PRIORITY 1
|
||||
|
||||
/* Bit manipulation macros */
|
||||
#define HMATRIX_BIT(name) \
|
||||
(1 << HMATRIX_##name##_OFFSET)
|
||||
#define HMATRIX_BF(name,value) \
|
||||
(((value) & ((1 << HMATRIX_##name##_SIZE) - 1)) \
|
||||
<< HMATRIX_##name##_OFFSET)
|
||||
#define HMATRIX_BFEXT(name,value) \
|
||||
(((value) >> HMATRIX_##name##_OFFSET) \
|
||||
& ((1 << HMATRIX_##name##_SIZE) - 1))
|
||||
#define HMATRIX_BFINS(name,value,old) \
|
||||
(((old) & ~(((1 << HMATRIX_##name##_SIZE) - 1) \
|
||||
<< HMATRIX_##name##_OFFSET)) \
|
||||
| HMATRIX_BF(name,value))
|
||||
|
||||
#endif /* __HMATRIX_H */
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user