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drm/i915: dev_priv cleanup in i915_gem_gtt.c
Started with removing INTEL_INFO(dev) and cascaded into a quite big trickle of function prototype changes. Still, I think it is for the better. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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@@ -1442,7 +1442,7 @@ static int i915_drm_suspend(struct drm_device *dev)
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intel_suspend_hw(dev_priv);
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i915_gem_suspend_gtt_mappings(dev);
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i915_gem_suspend_gtt_mappings(dev_priv);
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i915_save_state(dev);
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@@ -4230,7 +4230,7 @@ void i915_gem_resume(struct drm_device *dev)
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WARN_ON(dev_priv->gt.awake);
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mutex_lock(&dev->struct_mutex);
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i915_gem_restore_gtt_mappings(dev);
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i915_gem_restore_gtt_mappings(dev_priv);
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/* As we didn't flush the kernel context before suspend, we cannot
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* guarantee that the context image is complete. So let's just reset
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+125
-123
File diff suppressed because it is too large
Load Diff
@@ -120,8 +120,8 @@ typedef uint64_t gen8_ppgtt_pml4e_t;
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#define GEN8_LEGACY_PDPES 4
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#define GEN8_PTES I915_PTES(sizeof(gen8_pte_t))
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#define I915_PDPES_PER_PDP(dev) (USES_FULL_48BIT_PPGTT(dev) ?\
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GEN8_PML4ES_PER_PML4 : GEN8_LEGACY_PDPES)
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#define I915_PDPES_PER_PDP(dev_priv) (USES_FULL_48BIT_PPGTT(dev_priv) ?\
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GEN8_PML4ES_PER_PML4 : GEN8_LEGACY_PDPES)
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#define PPAT_UNCACHED_INDEX (_PAGE_PWT | _PAGE_PCD)
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#define PPAT_CACHED_PDE_INDEX 0 /* WB LLC */
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@@ -512,8 +512,8 @@ static inline void i915_ppgtt_put(struct i915_hw_ppgtt *ppgtt)
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}
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void i915_check_and_clear_faults(struct drm_i915_private *dev_priv);
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void i915_gem_suspend_gtt_mappings(struct drm_device *dev);
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void i915_gem_restore_gtt_mappings(struct drm_device *dev);
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void i915_gem_suspend_gtt_mappings(struct drm_i915_private *dev_priv);
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void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv);
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int __must_check i915_gem_gtt_prepare_pages(struct drm_i915_gem_object *obj,
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struct sg_table *pages);
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