apfs/linux-apfs
0
0
Fork 0
mirror of https://github.com/linux-apfs/linux-apfs.git synced 2026-05-01 15:00:59 -07:00
Code Issues Packages Projects Releases Wiki Activity

[S390] Whitespace cleanup.

Browse Source 
Huge s390 assembly files whitespace cleanup.

Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
This commit is contained in:
Heiko Carstens
2006-09-28 16:56:37 +02:00
committed by Martin Schwidefsky
parent 52149ba6b0
commit 25d83cbfaa
9 changed files with 1357 additions and 1363 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/s390/kernel/compat_wrapper.S
+221 -221
View File
File diff suppressed because it is too large Load Diff
arch/s390/kernel/entry.S
+229 -230
View File
File diff suppressed because it is too large Load Diff
arch/s390/kernel/entry64.S
+219 -220
View File
File diff suppressed because it is too large Load Diff
arch/s390/kernel/head.S
+312 -312
View File
File diff suppressed because it is too large Load Diff
arch/s390/kernel/head64.S
+216 -216
View File
File diff suppressed because it is too large Load Diff
arch/s390/kernel/reipl.S
+36 -39
View File
@@ -32,58 +32,58 @@ do_reipl_asm: basr %r13,0
st %r13, __LC_PSW_SAVE_AREA+4 st %r13, __LC_PSW_SAVE_AREA+4
lctl %c6,%c6,.Lall-.Lpg0(%r13) lctl %c6,%c6,.Lall-.Lpg0(%r13)
lr %r1,%r2 lr %r1,%r2
mvc __LC_PGM_NEW_PSW(8),.Lpcnew-.Lpg0(%r13) mvc __LC_PGM_NEW_PSW(8),.Lpcnew-.Lpg0(%r13)
stsch .Lschib-.Lpg0(%r13) stsch .Lschib-.Lpg0(%r13)
oi .Lschib+5-.Lpg0(%r13),0x84 oi .Lschib+5-.Lpg0(%r13),0x84
.Lecs: xi .Lschib+27-.Lpg0(%r13),0x01 .Lecs: xi .Lschib+27-.Lpg0(%r13),0x01
msch .Lschib-.Lpg0(%r13) msch .Lschib-.Lpg0(%r13)
lhi %r0,5 lhi %r0,5
.Lssch: ssch .Liplorb-.Lpg0(%r13) .Lssch: ssch .Liplorb-.Lpg0(%r13)
jz .L001 jz .L001
brct %r0,.Lssch brct %r0,.Lssch
bas %r14,.Ldisab-.Lpg0(%r13) bas %r14,.Ldisab-.Lpg0(%r13)
.L001: mvc __LC_IO_NEW_PSW(8),.Lionew-.Lpg0(%r13) .L001: mvc __LC_IO_NEW_PSW(8),.Lionew-.Lpg0(%r13)
.Ltpi: lpsw .Lwaitpsw-.Lpg0(%r13) .Ltpi: lpsw .Lwaitpsw-.Lpg0(%r13)
.Lcont: c %r1,__LC_SUBCHANNEL_ID .Lcont: c %r1,__LC_SUBCHANNEL_ID
jnz .Ltpi jnz .Ltpi
clc __LC_IO_INT_PARM(4),.Liplorb-.Lpg0(%r13) clc __LC_IO_INT_PARM(4),.Liplorb-.Lpg0(%r13)
jnz .Ltpi jnz .Ltpi
tsch .Liplirb-.Lpg0(%r13) tsch .Liplirb-.Lpg0(%r13)
tm .Liplirb+9-.Lpg0(%r13),0xbf tm .Liplirb+9-.Lpg0(%r13),0xbf
jz .L002 jz .L002
bas %r14,.Ldisab-.Lpg0(%r13) bas %r14,.Ldisab-.Lpg0(%r13)
.L002: tm .Liplirb+8-.Lpg0(%r13),0xf3 .L002: tm .Liplirb+8-.Lpg0(%r13),0xf3
jz .L003 jz .L003
bas %r14,.Ldisab-.Lpg0(%r13) bas %r14,.Ldisab-.Lpg0(%r13)
.L003: spx .Lnull-.Lpg0(%r13) .L003: spx .Lnull-.Lpg0(%r13)
st %r1,__LC_SUBCHANNEL_ID st %r1,__LC_SUBCHANNEL_ID
lpsw 0 lpsw 0
sigp 0,0,0(6) sigp 0,0,0(6)
.Ldisab: st %r14,.Ldispsw+4-.Lpg0(%r13) .Ldisab: st %r14,.Ldispsw+4-.Lpg0(%r13)
lpsw .Ldispsw-.Lpg0(%r13) lpsw .Ldispsw-.Lpg0(%r13)
.align 8 .align 8
.Lclkcmp: .quad 0x0000000000000000 .Lclkcmp: .quad 0x0000000000000000
.Lall: .long 0xff000000 .Lall: .long 0xff000000
.Lnull: .long 0x00000000 .Lnull: .long 0x00000000
.Lctlsave1: .long 0x00000000 .Lctlsave1: .long 0x00000000
.Lctlsave2: .long 0x00000000 .Lctlsave2: .long 0x00000000
.align 8 .align 8
.Lnewpsw: .long 0x00080000,0x80000000+.Lpg1 .Lnewpsw: .long 0x00080000,0x80000000+.Lpg1
.Lpcnew: .long 0x00080000,0x80000000+.Lecs .Lpcnew: .long 0x00080000,0x80000000+.Lecs
.Lionew: .long 0x00080000,0x80000000+.Lcont .Lionew: .long 0x00080000,0x80000000+.Lcont
.Lwaitpsw: .long 0x020a0000,0x00000000+.Ltpi .Lwaitpsw: .long 0x020a0000,0x00000000+.Ltpi
.Ldispsw: .long 0x000a0000,0x00000000 .Ldispsw: .long 0x000a0000,0x00000000
.Liplccws: .long 0x02000000,0x60000018 .Liplccws: .long 0x02000000,0x60000018
.long 0x08000008,0x20000001 .long 0x08000008,0x20000001
.Liplorb: .long 0x0049504c,0x0040ff80 .Liplorb: .long 0x0049504c,0x0040ff80
.long 0x00000000+.Liplccws .long 0x00000000+.Liplccws
.Lschib: .long 0x00000000,0x00000000 .Lschib: .long 0x00000000,0x00000000
.long 0x00000000,0x00000000 .long 0x00000000,0x00000000
.long 0x00000000,0x00000000 .long 0x00000000,0x00000000
.long 0x00000000,0x00000000 .long 0x00000000,0x00000000
.long 0x00000000,0x00000000 .long 0x00000000,0x00000000
.long 0x00000000,0x00000000 .long 0x00000000,0x00000000
.Liplirb: .long 0x00000000,0x00000000 .Liplirb: .long 0x00000000,0x00000000
.long 0x00000000,0x00000000 .long 0x00000000,0x00000000
.long 0x00000000,0x00000000 .long 0x00000000,0x00000000
@@ -92,6 +92,3 @@ do_reipl_asm: basr %r13,0
.long 0x00000000,0x00000000 .long 0x00000000,0x00000000
.long 0x00000000,0x00000000 .long 0x00000000,0x00000000
.long 0x00000000,0x00000000 .long 0x00000000,0x00000000
arch/s390/kernel/reipl64.S
+46 -47
View File
@@ -4,7 +4,7 @@
* S390 version * S390 version
* Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation * Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
* Author(s): Holger Smolinski (Holger.Smolinski@de.ibm.com) * Author(s): Holger Smolinski (Holger.Smolinski@de.ibm.com)
Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
*/ */
#include <asm/lowcore.h> #include <asm/lowcore.h>
@@ -32,46 +32,46 @@ do_reipl_asm: basr %r13,0
stctg %c0,%c0,.Lregsave-.Lpg0(%r13) stctg %c0,%c0,.Lregsave-.Lpg0(%r13)
ni .Lregsave+4-.Lpg0(%r13),0xef ni .Lregsave+4-.Lpg0(%r13),0xef
lctlg %c0,%c0,.Lregsave-.Lpg0(%r13) lctlg %c0,%c0,.Lregsave-.Lpg0(%r13)
lgr %r1,%r2 lgr %r1,%r2
mvc __LC_PGM_NEW_PSW(16),.Lpcnew-.Lpg0(%r13) mvc __LC_PGM_NEW_PSW(16),.Lpcnew-.Lpg0(%r13)
stsch .Lschib-.Lpg0(%r13) stsch .Lschib-.Lpg0(%r13)
oi .Lschib+5-.Lpg0(%r13),0x84 oi .Lschib+5-.Lpg0(%r13),0x84
.Lecs: xi .Lschib+27-.Lpg0(%r13),0x01 .Lecs: xi .Lschib+27-.Lpg0(%r13),0x01
msch .Lschib-.Lpg0(%r13) msch .Lschib-.Lpg0(%r13)
lghi %r0,5 lghi %r0,5
.Lssch: ssch .Liplorb-.Lpg0(%r13) .Lssch: ssch .Liplorb-.Lpg0(%r13)
jz .L001 jz .L001
brct %r0,.Lssch brct %r0,.Lssch
bas %r14,.Ldisab-.Lpg0(%r13) bas %r14,.Ldisab-.Lpg0(%r13)
.L001: mvc __LC_IO_NEW_PSW(16),.Lionew-.Lpg0(%r13) .L001: mvc __LC_IO_NEW_PSW(16),.Lionew-.Lpg0(%r13)
.Ltpi: lpswe .Lwaitpsw-.Lpg0(%r13) .Ltpi: lpswe .Lwaitpsw-.Lpg0(%r13)
.Lcont: c %r1,__LC_SUBCHANNEL_ID .Lcont: c %r1,__LC_SUBCHANNEL_ID
jnz .Ltpi jnz .Ltpi
clc __LC_IO_INT_PARM(4),.Liplorb-.Lpg0(%r13) clc __LC_IO_INT_PARM(4),.Liplorb-.Lpg0(%r13)
jnz .Ltpi jnz .Ltpi
tsch .Liplirb-.Lpg0(%r13) tsch .Liplirb-.Lpg0(%r13)
tm .Liplirb+9-.Lpg0(%r13),0xbf tm .Liplirb+9-.Lpg0(%r13),0xbf
jz .L002 jz .L002
bas %r14,.Ldisab-.Lpg0(%r13) bas %r14,.Ldisab-.Lpg0(%r13)
.L002: tm .Liplirb+8-.Lpg0(%r13),0xf3 .L002: tm .Liplirb+8-.Lpg0(%r13),0xf3
jz .L003 jz .L003
bas %r14,.Ldisab-.Lpg0(%r13) bas %r14,.Ldisab-.Lpg0(%r13)
.L003: spx .Lnull-.Lpg0(%r13) .L003: spx .Lnull-.Lpg0(%r13)
st %r1,__LC_SUBCHANNEL_ID st %r1,__LC_SUBCHANNEL_ID
lhi %r1,0 # mode 0 = esa lhi %r1,0 # mode 0 = esa
slr %r0,%r0 # set cpuid to zero slr %r0,%r0 # set cpuid to zero
sigp %r1,%r0,0x12 # switch to esa mode sigp %r1,%r0,0x12 # switch to esa mode
lpsw 0 lpsw 0
.Ldisab: sll %r14,1 .Ldisab: sll %r14,1
srl %r14,1 # need to kill hi bit to avoid specification exceptions. srl %r14,1 # need to kill hi bit to avoid specification exceptions.
st %r14,.Ldispsw+12-.Lpg0(%r13) st %r14,.Ldispsw+12-.Lpg0(%r13)
lpswe .Ldispsw-.Lpg0(%r13) lpswe .Ldispsw-.Lpg0(%r13)
.align 8 .align 8
.Lclkcmp: .quad 0x0000000000000000 .Lclkcmp: .quad 0x0000000000000000
.Lall: .quad 0x00000000ff000000 .Lall: .quad 0x00000000ff000000
.Lregsave: .quad 0x0000000000000000 .Lregsave: .quad 0x0000000000000000
.Lnull: .long 0x0000000000000000 .Lnull: .long 0x0000000000000000
.align 16 .align 16
/* /*
* These addresses have to be 31 bit otherwise * These addresses have to be 31 bit otherwise
* the sigp will throw a specifcation exception * the sigp will throw a specifcation exception
@@ -81,26 +81,26 @@ do_reipl_asm: basr %r13,0
* 31bit lpswe instruction a fact they appear to have * 31bit lpswe instruction a fact they appear to have
* ommited from the pop. * ommited from the pop.
*/ */
.Lnewpsw: .quad 0x0000000080000000 .Lnewpsw: .quad 0x0000000080000000
.quad .Lpg1 .quad .Lpg1
.Lpcnew: .quad 0x0000000080000000 .Lpcnew: .quad 0x0000000080000000
.quad .Lecs .quad .Lecs
.Lionew: .quad 0x0000000080000000 .Lionew: .quad 0x0000000080000000
.quad .Lcont .quad .Lcont
.Lwaitpsw: .quad 0x0202000080000000 .Lwaitpsw: .quad 0x0202000080000000
.quad .Ltpi .quad .Ltpi
.Ldispsw: .quad 0x0002000080000000 .Ldispsw: .quad 0x0002000080000000
.quad 0x0000000000000000 .quad 0x0000000000000000
.Liplccws: .long 0x02000000,0x60000018 .Liplccws: .long 0x02000000,0x60000018
.long 0x08000008,0x20000001 .long 0x08000008,0x20000001
.Liplorb: .long 0x0049504c,0x0040ff80 .Liplorb: .long 0x0049504c,0x0040ff80
.long 0x00000000+.Liplccws .long 0x00000000+.Liplccws
.Lschib: .long 0x00000000,0x00000000 .Lschib: .long 0x00000000,0x00000000
.long 0x00000000,0x00000000 .long 0x00000000,0x00000000
.long 0x00000000,0x00000000 .long 0x00000000,0x00000000
.long 0x00000000,0x00000000 .long 0x00000000,0x00000000
.long 0x00000000,0x00000000 .long 0x00000000,0x00000000
.long 0x00000000,0x00000000 .long 0x00000000,0x00000000
.Liplirb: .long 0x00000000,0x00000000 .Liplirb: .long 0x00000000,0x00000000
.long 0x00000000,0x00000000 .long 0x00000000,0x00000000
.long 0x00000000,0x00000000 .long 0x00000000,0x00000000
@@ -109,4 +109,3 @@ do_reipl_asm: basr %r13,0
.long 0x00000000,0x00000000 .long 0x00000000,0x00000000
.long 0x00000000,0x00000000 .long 0x00000000,0x00000000
.long 0x00000000,0x00000000 .long 0x00000000,0x00000000
arch/s390/kernel/relocate_kernel.S
+37 -37
View File
@@ -3,7 +3,7 @@
* *
* (C) Copyright IBM Corp. 2005 * (C) Copyright IBM Corp. 2005
* *
* Author(s): Rolf Adelsberger <adelsberger@de.ibm.com> * Author(s): Rolf Adelsberger,
* Heiko Carstens <heiko.carstens@de.ibm.com> * Heiko Carstens <heiko.carstens@de.ibm.com>
* *
*/ */
@@ -24,14 +24,14 @@
.text .text
.globl relocate_kernel .globl relocate_kernel
relocate_kernel: relocate_kernel:
basr %r13,0 #base address basr %r13,0 # base address
.base: .base:
stnsm sys_msk-.base(%r13),0xf8 #disable DAT and IRQ (external) stnsm sys_msk-.base(%r13),0xf8 # disable DAT and IRQ (external)
spx zero64-.base(%r13) #absolute addressing mode spx zero64-.base(%r13) # absolute addressing mode
stctl %c0,%c15,ctlregs-.base(%r13) stctl %c0,%c15,ctlregs-.base(%r13)
stm %r0,%r15,gprregs-.base(%r13) stm %r0,%r15,gprregs-.base(%r13)
la %r1,load_psw-.base(%r13) la %r1,load_psw-.base(%r13)
mvc 0(8,%r0),0(%r1) mvc 0(8,%r0),0(%r1)
la %r0,.back-.base(%r13) la %r0,.back-.base(%r13)
st %r0,4(%r0) st %r0,4(%r0)
oi 4(%r0),0x80 oi 4(%r0),0x80
@@ -51,50 +51,50 @@
.back_pgm: .back_pgm:
lm %r0,%r15,gprregs-.base(%r13) lm %r0,%r15,gprregs-.base(%r13)
.start_reloc: .start_reloc:
lhi %r10,-1 #preparing the mask lhi %r10,-1 # preparing the mask
sll %r10,12 #shift it such that it becomes 0xf000 sll %r10,12 # shift it such that it becomes 0xf000
.top: .top:
lhi %r7,4096 #load PAGE_SIZE in r7 lhi %r7,4096 # load PAGE_SIZE in r7
lhi %r9,4096 #load PAGE_SIZE in r9 lhi %r9,4096 # load PAGE_SIZE in r9
l %r5,0(%r2) #read another word for indirection page l %r5,0(%r2) # read another word for indirection page
ahi %r2,4 #increment pointer ahi %r2,4 # increment pointer
tml %r5,0x1 #is it a destination page? tml %r5,0x1 # is it a destination page?
je .indir_check #NO, goto "indir_check" je .indir_check # NO, goto "indir_check"
lr %r6,%r5 #r6 = r5 lr %r6,%r5 # r6 = r5
nr %r6,%r10 #mask it out and... nr %r6,%r10 # mask it out and...
j .top #...next iteration j .top # ...next iteration
.indir_check: .indir_check:
tml %r5,0x2 #is it a indirection page? tml %r5,0x2 # is it a indirection page?
je .done_test #NO, goto "done_test" je .done_test # NO, goto "done_test"
nr %r5,%r10 #YES, mask out, nr %r5,%r10 # YES, mask out,
lr %r2,%r5 #move it into the right register, lr %r2,%r5 # move it into the right register,
j .top #and read next... j .top # and read next...
.done_test: .done_test:
tml %r5,0x4 #is it the done indicator? tml %r5,0x4 # is it the done indicator?
je .source_test #NO! Well, then it should be the source indicator... je .source_test # NO! Well, then it should be the source indicator...
j .done #ok, lets finish it here... j .done # ok, lets finish it here...
.source_test: .source_test:
tml %r5,0x8 #it should be a source indicator... tml %r5,0x8 # it should be a source indicator...
je .top #NO, ignore it... je .top # NO, ignore it...
lr %r8,%r5 #r8 = r5 lr %r8,%r5 # r8 = r5
nr %r8,%r10 #masking nr %r8,%r10 # masking
0: mvcle %r6,%r8,0x0 #copy PAGE_SIZE bytes from r8 to r6 - pad with 0 0: mvcle %r6,%r8,0x0 # copy PAGE_SIZE bytes from r8 to r6 - pad with 0
jo 0b jo 0b
j .top j .top
.done: .done:
sr %r0,%r0 #clear register r0 sr %r0,%r0 # clear register r0
la %r4,load_psw-.base(%r13) #load psw-address into the register la %r4,load_psw-.base(%r13) # load psw-address into the register
o %r3,4(%r4) #or load address into psw o %r3,4(%r4) # or load address into psw
st %r3,4(%r4) st %r3,4(%r4)
mvc 0(8,%r0),0(%r4) #copy psw to absolute address 0 mvc 0(8,%r0),0(%r4) # copy psw to absolute address 0
tm have_diag308-.base(%r13),0x01 tm have_diag308-.base(%r13),0x01
jno .no_diag308 jno .no_diag308
diag %r0,%r0,0x308 diag %r0,%r0,0x308
.no_diag308: .no_diag308:
sr %r1,%r1 #clear %r1 sr %r1,%r1 # clear %r1
sr %r2,%r2 #clear %r2 sr %r2,%r2 # clear %r2
sigp %r1,%r2,0x12 #set cpuid to zero sigp %r1,%r2,0x12 # set cpuid to zero
lpsw 0 #hopefully start new kernel... lpsw 0 # hopefully start new kernel...
.align 8 .align 8
zero64: zero64:
arch/s390/kernel/relocate_kernel64.S
+41 -41
View File
@@ -3,7 +3,7 @@
* *
* (C) Copyright IBM Corp. 2005 * (C) Copyright IBM Corp. 2005
* *
* Author(s): Rolf Adelsberger <adelsberger@de.ibm.com> * Author(s): Rolf Adelsberger,
* Heiko Carstens <heiko.carstens@de.ibm.com> * Heiko Carstens <heiko.carstens@de.ibm.com>
* *
*/ */
@@ -25,10 +25,10 @@
.text .text
.globl relocate_kernel .globl relocate_kernel
relocate_kernel: relocate_kernel:
basr %r13,0 #base address basr %r13,0 # base address
.base: .base:
stnsm sys_msk-.base(%r13),0xf8 #disable DAT and IRQs stnsm sys_msk-.base(%r13),0xf8 # disable DAT and IRQs
spx zero64-.base(%r13) #absolute addressing mode spx zero64-.base(%r13) # absolute addressing mode
stctg %c0,%c15,ctlregs-.base(%r13) stctg %c0,%c15,ctlregs-.base(%r13)
stmg %r0,%r15,gprregs-.base(%r13) stmg %r0,%r15,gprregs-.base(%r13)
lghi %r0,3 lghi %r0,3
@@ -37,16 +37,16 @@
la %r0,.back_pgm-.base(%r13) la %r0,.back_pgm-.base(%r13)
stg %r0,0x1d8(%r0) stg %r0,0x1d8(%r0)
la %r1,load_psw-.base(%r13) la %r1,load_psw-.base(%r13)
mvc 0(8,%r0),0(%r1) mvc 0(8,%r0),0(%r1)
la %r0,.back-.base(%r13) la %r0,.back-.base(%r13)
st %r0,4(%r0) st %r0,4(%r0)
oi 4(%r0),0x80 oi 4(%r0),0x80
lghi %r0,0 lghi %r0,0
diag %r0,%r0,0x308 diag %r0,%r0,0x308
.back: .back:
lhi %r1,1 #mode 1 = esame lhi %r1,1 # mode 1 = esame
sigp %r1,%r0,0x12 #switch to esame mode sigp %r1,%r0,0x12 # switch to esame mode
sam64 #switch to 64 bit addressing mode sam64 # switch to 64 bit addressing mode
basr %r13,0 basr %r13,0
.back_base: .back_base:
oi have_diag308-.back_base(%r13),0x01 oi have_diag308-.back_base(%r13),0x01
@@ -56,50 +56,50 @@
.back_pgm: .back_pgm:
lmg %r0,%r15,gprregs-.base(%r13) lmg %r0,%r15,gprregs-.base(%r13)
.top: .top:
lghi %r7,4096 #load PAGE_SIZE in r7 lghi %r7,4096 # load PAGE_SIZE in r7
lghi %r9,4096 #load PAGE_SIZE in r9 lghi %r9,4096 # load PAGE_SIZE in r9
lg %r5,0(%r2) #read another word for indirection page lg %r5,0(%r2) # read another word for indirection page
aghi %r2,8 #increment pointer aghi %r2,8 # increment pointer
tml %r5,0x1 #is it a destination page? tml %r5,0x1 # is it a destination page?
je .indir_check #NO, goto "indir_check" je .indir_check # NO, goto "indir_check"
lgr %r6,%r5 #r6 = r5 lgr %r6,%r5 # r6 = r5
nill %r6,0xf000 #mask it out and... nill %r6,0xf000 # mask it out and...
j .top #...next iteration j .top # ...next iteration
.indir_check: .indir_check:
tml %r5,0x2 #is it a indirection page? tml %r5,0x2 # is it a indirection page?
je .done_test #NO, goto "done_test" je .done_test # NO, goto "done_test"
nill %r5,0xf000 #YES, mask out, nill %r5,0xf000 # YES, mask out,
lgr %r2,%r5 #move it into the right register, lgr %r2,%r5 # move it into the right register,
j .top #and read next... j .top # and read next...
.done_test: .done_test:
tml %r5,0x4 #is it the done indicator? tml %r5,0x4 # is it the done indicator?
je .source_test #NO! Well, then it should be the source indicator... je .source_test # NO! Well, then it should be the source indicator...
j .done #ok, lets finish it here... j .done # ok, lets finish it here...
.source_test: .source_test:
tml %r5,0x8 #it should be a source indicator... tml %r5,0x8 # it should be a source indicator...
je .top #NO, ignore it... je .top # NO, ignore it...
lgr %r8,%r5 #r8 = r5 lgr %r8,%r5 # r8 = r5
nill %r8,0xf000 #masking nill %r8,0xf000 # masking
0: mvcle %r6,%r8,0x0 #copy PAGE_SIZE bytes from r8 to r6 - pad with 0 0: mvcle %r6,%r8,0x0 # copy PAGE_SIZE bytes from r8 to r6 - pad with 0
jo 0b jo 0b
j .top j .top
.done: .done:
sgr %r0,%r0 #clear register r0 sgr %r0,%r0 # clear register r0
la %r4,load_psw-.base(%r13) #load psw-address into the register la %r4,load_psw-.base(%r13) # load psw-address into the register
o %r3,4(%r4) #or load address into psw o %r3,4(%r4) # or load address into psw
st %r3,4(%r4) st %r3,4(%r4)
mvc 0(8,%r0),0(%r4) #copy psw to absolute address 0 mvc 0(8,%r0),0(%r4) # copy psw to absolute address 0
tm have_diag308-.base(%r13),0x01 tm have_diag308-.base(%r13),0x01
jno .no_diag308 jno .no_diag308
diag %r0,%r0,0x308 diag %r0,%r0,0x308
.no_diag308: .no_diag308:
sam31 #31 bit mode sam31 # 31 bit mode
sr %r1,%r1 #erase register r1 sr %r1,%r1 # erase register r1
sr %r2,%r2 #erase register r2 sr %r2,%r2 # erase register r2
sigp %r1,%r2,0x12 #set cpuid to zero sigp %r1,%r2,0x12 # set cpuid to zero
lpsw 0 #hopefully start new kernel... lpsw 0 # hopefully start new kernel...
.align 8 .align 8
zero64: zero64:
.quad 0 .quad 0
load_psw: load_psw: