You've already forked linux-apfs
mirror of
https://github.com/linux-apfs/linux-apfs.git
synced 2026-05-01 15:00:59 -07:00
[S390] Whitespace cleanup.
Huge s390 assembly files whitespace cleanup. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
This commit is contained in:
Heiko Carstens
committed by
Martin Schwidefsky
Martin Schwidefsky
parent
52149ba6b0
commit
25d83cbfaa
+221
-221
File diff suppressed because it is too large
Load Diff
+229
-230
File diff suppressed because it is too large
Load Diff
+219
-220
File diff suppressed because it is too large
Load Diff
+312
-312
File diff suppressed because it is too large
Load Diff
+216
-216
File diff suppressed because it is too large
Load Diff
+36
-39
@@ -32,58 +32,58 @@ do_reipl_asm: basr %r13,0
|
||||
st %r13, __LC_PSW_SAVE_AREA+4
|
||||
|
||||
lctl %c6,%c6,.Lall-.Lpg0(%r13)
|
||||
lr %r1,%r2
|
||||
mvc __LC_PGM_NEW_PSW(8),.Lpcnew-.Lpg0(%r13)
|
||||
stsch .Lschib-.Lpg0(%r13)
|
||||
oi .Lschib+5-.Lpg0(%r13),0x84
|
||||
.Lecs: xi .Lschib+27-.Lpg0(%r13),0x01
|
||||
msch .Lschib-.Lpg0(%r13)
|
||||
lhi %r0,5
|
||||
.Lssch: ssch .Liplorb-.Lpg0(%r13)
|
||||
lr %r1,%r2
|
||||
mvc __LC_PGM_NEW_PSW(8),.Lpcnew-.Lpg0(%r13)
|
||||
stsch .Lschib-.Lpg0(%r13)
|
||||
oi .Lschib+5-.Lpg0(%r13),0x84
|
||||
.Lecs: xi .Lschib+27-.Lpg0(%r13),0x01
|
||||
msch .Lschib-.Lpg0(%r13)
|
||||
lhi %r0,5
|
||||
.Lssch: ssch .Liplorb-.Lpg0(%r13)
|
||||
jz .L001
|
||||
brct %r0,.Lssch
|
||||
brct %r0,.Lssch
|
||||
bas %r14,.Ldisab-.Lpg0(%r13)
|
||||
.L001: mvc __LC_IO_NEW_PSW(8),.Lionew-.Lpg0(%r13)
|
||||
.Ltpi: lpsw .Lwaitpsw-.Lpg0(%r13)
|
||||
.L001: mvc __LC_IO_NEW_PSW(8),.Lionew-.Lpg0(%r13)
|
||||
.Ltpi: lpsw .Lwaitpsw-.Lpg0(%r13)
|
||||
.Lcont: c %r1,__LC_SUBCHANNEL_ID
|
||||
jnz .Ltpi
|
||||
clc __LC_IO_INT_PARM(4),.Liplorb-.Lpg0(%r13)
|
||||
jnz .Ltpi
|
||||
tsch .Liplirb-.Lpg0(%r13)
|
||||
tsch .Liplirb-.Lpg0(%r13)
|
||||
tm .Liplirb+9-.Lpg0(%r13),0xbf
|
||||
jz .L002
|
||||
bas %r14,.Ldisab-.Lpg0(%r13)
|
||||
.L002: tm .Liplirb+8-.Lpg0(%r13),0xf3
|
||||
jz .L003
|
||||
bas %r14,.Ldisab-.Lpg0(%r13)
|
||||
jz .L002
|
||||
bas %r14,.Ldisab-.Lpg0(%r13)
|
||||
.L002: tm .Liplirb+8-.Lpg0(%r13),0xf3
|
||||
jz .L003
|
||||
bas %r14,.Ldisab-.Lpg0(%r13)
|
||||
.L003: spx .Lnull-.Lpg0(%r13)
|
||||
st %r1,__LC_SUBCHANNEL_ID
|
||||
lpsw 0
|
||||
sigp 0,0,0(6)
|
||||
.Ldisab: st %r14,.Ldispsw+4-.Lpg0(%r13)
|
||||
st %r1,__LC_SUBCHANNEL_ID
|
||||
lpsw 0
|
||||
sigp 0,0,0(6)
|
||||
.Ldisab: st %r14,.Ldispsw+4-.Lpg0(%r13)
|
||||
lpsw .Ldispsw-.Lpg0(%r13)
|
||||
.align 8
|
||||
.align 8
|
||||
.Lclkcmp: .quad 0x0000000000000000
|
||||
.Lall: .long 0xff000000
|
||||
.Lnull: .long 0x00000000
|
||||
.Lnull: .long 0x00000000
|
||||
.Lctlsave1: .long 0x00000000
|
||||
.Lctlsave2: .long 0x00000000
|
||||
.align 8
|
||||
.Lnewpsw: .long 0x00080000,0x80000000+.Lpg1
|
||||
.Lpcnew: .long 0x00080000,0x80000000+.Lecs
|
||||
.Lionew: .long 0x00080000,0x80000000+.Lcont
|
||||
.align 8
|
||||
.Lnewpsw: .long 0x00080000,0x80000000+.Lpg1
|
||||
.Lpcnew: .long 0x00080000,0x80000000+.Lecs
|
||||
.Lionew: .long 0x00080000,0x80000000+.Lcont
|
||||
.Lwaitpsw: .long 0x020a0000,0x00000000+.Ltpi
|
||||
.Ldispsw: .long 0x000a0000,0x00000000
|
||||
.Liplccws: .long 0x02000000,0x60000018
|
||||
.long 0x08000008,0x20000001
|
||||
.Ldispsw: .long 0x000a0000,0x00000000
|
||||
.Liplccws: .long 0x02000000,0x60000018
|
||||
.long 0x08000008,0x20000001
|
||||
.Liplorb: .long 0x0049504c,0x0040ff80
|
||||
.long 0x00000000+.Liplccws
|
||||
.Lschib: .long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.Lschib: .long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.Liplirb: .long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
@@ -92,6 +92,3 @@ do_reipl_asm: basr %r13,0
|
||||
.long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
|
||||
|
||||
|
||||
|
||||
+46
-47
@@ -4,7 +4,7 @@
|
||||
* S390 version
|
||||
* Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
|
||||
* Author(s): Holger Smolinski (Holger.Smolinski@de.ibm.com)
|
||||
Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
|
||||
Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
|
||||
*/
|
||||
|
||||
#include <asm/lowcore.h>
|
||||
@@ -32,46 +32,46 @@ do_reipl_asm: basr %r13,0
|
||||
stctg %c0,%c0,.Lregsave-.Lpg0(%r13)
|
||||
ni .Lregsave+4-.Lpg0(%r13),0xef
|
||||
lctlg %c0,%c0,.Lregsave-.Lpg0(%r13)
|
||||
lgr %r1,%r2
|
||||
mvc __LC_PGM_NEW_PSW(16),.Lpcnew-.Lpg0(%r13)
|
||||
stsch .Lschib-.Lpg0(%r13)
|
||||
oi .Lschib+5-.Lpg0(%r13),0x84
|
||||
.Lecs: xi .Lschib+27-.Lpg0(%r13),0x01
|
||||
msch .Lschib-.Lpg0(%r13)
|
||||
lghi %r0,5
|
||||
.Lssch: ssch .Liplorb-.Lpg0(%r13)
|
||||
lgr %r1,%r2
|
||||
mvc __LC_PGM_NEW_PSW(16),.Lpcnew-.Lpg0(%r13)
|
||||
stsch .Lschib-.Lpg0(%r13)
|
||||
oi .Lschib+5-.Lpg0(%r13),0x84
|
||||
.Lecs: xi .Lschib+27-.Lpg0(%r13),0x01
|
||||
msch .Lschib-.Lpg0(%r13)
|
||||
lghi %r0,5
|
||||
.Lssch: ssch .Liplorb-.Lpg0(%r13)
|
||||
jz .L001
|
||||
brct %r0,.Lssch
|
||||
brct %r0,.Lssch
|
||||
bas %r14,.Ldisab-.Lpg0(%r13)
|
||||
.L001: mvc __LC_IO_NEW_PSW(16),.Lionew-.Lpg0(%r13)
|
||||
.Ltpi: lpswe .Lwaitpsw-.Lpg0(%r13)
|
||||
.L001: mvc __LC_IO_NEW_PSW(16),.Lionew-.Lpg0(%r13)
|
||||
.Ltpi: lpswe .Lwaitpsw-.Lpg0(%r13)
|
||||
.Lcont: c %r1,__LC_SUBCHANNEL_ID
|
||||
jnz .Ltpi
|
||||
clc __LC_IO_INT_PARM(4),.Liplorb-.Lpg0(%r13)
|
||||
jnz .Ltpi
|
||||
tsch .Liplirb-.Lpg0(%r13)
|
||||
tsch .Liplirb-.Lpg0(%r13)
|
||||
tm .Liplirb+9-.Lpg0(%r13),0xbf
|
||||
jz .L002
|
||||
bas %r14,.Ldisab-.Lpg0(%r13)
|
||||
.L002: tm .Liplirb+8-.Lpg0(%r13),0xf3
|
||||
jz .L003
|
||||
bas %r14,.Ldisab-.Lpg0(%r13)
|
||||
jz .L002
|
||||
bas %r14,.Ldisab-.Lpg0(%r13)
|
||||
.L002: tm .Liplirb+8-.Lpg0(%r13),0xf3
|
||||
jz .L003
|
||||
bas %r14,.Ldisab-.Lpg0(%r13)
|
||||
.L003: spx .Lnull-.Lpg0(%r13)
|
||||
st %r1,__LC_SUBCHANNEL_ID
|
||||
lhi %r1,0 # mode 0 = esa
|
||||
slr %r0,%r0 # set cpuid to zero
|
||||
sigp %r1,%r0,0x12 # switch to esa mode
|
||||
lpsw 0
|
||||
.Ldisab: sll %r14,1
|
||||
srl %r14,1 # need to kill hi bit to avoid specification exceptions.
|
||||
st %r14,.Ldispsw+12-.Lpg0(%r13)
|
||||
st %r1,__LC_SUBCHANNEL_ID
|
||||
lhi %r1,0 # mode 0 = esa
|
||||
slr %r0,%r0 # set cpuid to zero
|
||||
sigp %r1,%r0,0x12 # switch to esa mode
|
||||
lpsw 0
|
||||
.Ldisab: sll %r14,1
|
||||
srl %r14,1 # need to kill hi bit to avoid specification exceptions.
|
||||
st %r14,.Ldispsw+12-.Lpg0(%r13)
|
||||
lpswe .Ldispsw-.Lpg0(%r13)
|
||||
.align 8
|
||||
.align 8
|
||||
.Lclkcmp: .quad 0x0000000000000000
|
||||
.Lall: .quad 0x00000000ff000000
|
||||
.Lregsave: .quad 0x0000000000000000
|
||||
.Lnull: .long 0x0000000000000000
|
||||
.align 16
|
||||
.Lnull: .long 0x0000000000000000
|
||||
.align 16
|
||||
/*
|
||||
* These addresses have to be 31 bit otherwise
|
||||
* the sigp will throw a specifcation exception
|
||||
@@ -81,26 +81,26 @@ do_reipl_asm: basr %r13,0
|
||||
* 31bit lpswe instruction a fact they appear to have
|
||||
* ommited from the pop.
|
||||
*/
|
||||
.Lnewpsw: .quad 0x0000000080000000
|
||||
.quad .Lpg1
|
||||
.Lpcnew: .quad 0x0000000080000000
|
||||
.quad .Lecs
|
||||
.Lionew: .quad 0x0000000080000000
|
||||
.quad .Lcont
|
||||
.Lnewpsw: .quad 0x0000000080000000
|
||||
.quad .Lpg1
|
||||
.Lpcnew: .quad 0x0000000080000000
|
||||
.quad .Lecs
|
||||
.Lionew: .quad 0x0000000080000000
|
||||
.quad .Lcont
|
||||
.Lwaitpsw: .quad 0x0202000080000000
|
||||
.quad .Ltpi
|
||||
.Ldispsw: .quad 0x0002000080000000
|
||||
.quad 0x0000000000000000
|
||||
.Liplccws: .long 0x02000000,0x60000018
|
||||
.long 0x08000008,0x20000001
|
||||
.quad .Ltpi
|
||||
.Ldispsw: .quad 0x0002000080000000
|
||||
.quad 0x0000000000000000
|
||||
.Liplccws: .long 0x02000000,0x60000018
|
||||
.long 0x08000008,0x20000001
|
||||
.Liplorb: .long 0x0049504c,0x0040ff80
|
||||
.long 0x00000000+.Liplccws
|
||||
.Lschib: .long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.Lschib: .long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.Liplirb: .long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
@@ -109,4 +109,3 @@ do_reipl_asm: basr %r13,0
|
||||
.long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
.long 0x00000000,0x00000000
|
||||
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
*
|
||||
* (C) Copyright IBM Corp. 2005
|
||||
*
|
||||
* Author(s): Rolf Adelsberger <adelsberger@de.ibm.com>
|
||||
* Author(s): Rolf Adelsberger,
|
||||
* Heiko Carstens <heiko.carstens@de.ibm.com>
|
||||
*
|
||||
*/
|
||||
@@ -24,14 +24,14 @@
|
||||
.text
|
||||
.globl relocate_kernel
|
||||
relocate_kernel:
|
||||
basr %r13,0 #base address
|
||||
basr %r13,0 # base address
|
||||
.base:
|
||||
stnsm sys_msk-.base(%r13),0xf8 #disable DAT and IRQ (external)
|
||||
spx zero64-.base(%r13) #absolute addressing mode
|
||||
stnsm sys_msk-.base(%r13),0xf8 # disable DAT and IRQ (external)
|
||||
spx zero64-.base(%r13) # absolute addressing mode
|
||||
stctl %c0,%c15,ctlregs-.base(%r13)
|
||||
stm %r0,%r15,gprregs-.base(%r13)
|
||||
la %r1,load_psw-.base(%r13)
|
||||
mvc 0(8,%r0),0(%r1)
|
||||
mvc 0(8,%r0),0(%r1)
|
||||
la %r0,.back-.base(%r13)
|
||||
st %r0,4(%r0)
|
||||
oi 4(%r0),0x80
|
||||
@@ -51,50 +51,50 @@
|
||||
.back_pgm:
|
||||
lm %r0,%r15,gprregs-.base(%r13)
|
||||
.start_reloc:
|
||||
lhi %r10,-1 #preparing the mask
|
||||
sll %r10,12 #shift it such that it becomes 0xf000
|
||||
lhi %r10,-1 # preparing the mask
|
||||
sll %r10,12 # shift it such that it becomes 0xf000
|
||||
.top:
|
||||
lhi %r7,4096 #load PAGE_SIZE in r7
|
||||
lhi %r9,4096 #load PAGE_SIZE in r9
|
||||
l %r5,0(%r2) #read another word for indirection page
|
||||
ahi %r2,4 #increment pointer
|
||||
tml %r5,0x1 #is it a destination page?
|
||||
je .indir_check #NO, goto "indir_check"
|
||||
lr %r6,%r5 #r6 = r5
|
||||
nr %r6,%r10 #mask it out and...
|
||||
j .top #...next iteration
|
||||
lhi %r7,4096 # load PAGE_SIZE in r7
|
||||
lhi %r9,4096 # load PAGE_SIZE in r9
|
||||
l %r5,0(%r2) # read another word for indirection page
|
||||
ahi %r2,4 # increment pointer
|
||||
tml %r5,0x1 # is it a destination page?
|
||||
je .indir_check # NO, goto "indir_check"
|
||||
lr %r6,%r5 # r6 = r5
|
||||
nr %r6,%r10 # mask it out and...
|
||||
j .top # ...next iteration
|
||||
.indir_check:
|
||||
tml %r5,0x2 #is it a indirection page?
|
||||
je .done_test #NO, goto "done_test"
|
||||
nr %r5,%r10 #YES, mask out,
|
||||
lr %r2,%r5 #move it into the right register,
|
||||
j .top #and read next...
|
||||
tml %r5,0x2 # is it a indirection page?
|
||||
je .done_test # NO, goto "done_test"
|
||||
nr %r5,%r10 # YES, mask out,
|
||||
lr %r2,%r5 # move it into the right register,
|
||||
j .top # and read next...
|
||||
.done_test:
|
||||
tml %r5,0x4 #is it the done indicator?
|
||||
je .source_test #NO! Well, then it should be the source indicator...
|
||||
j .done #ok, lets finish it here...
|
||||
tml %r5,0x4 # is it the done indicator?
|
||||
je .source_test # NO! Well, then it should be the source indicator...
|
||||
j .done # ok, lets finish it here...
|
||||
.source_test:
|
||||
tml %r5,0x8 #it should be a source indicator...
|
||||
je .top #NO, ignore it...
|
||||
lr %r8,%r5 #r8 = r5
|
||||
nr %r8,%r10 #masking
|
||||
0: mvcle %r6,%r8,0x0 #copy PAGE_SIZE bytes from r8 to r6 - pad with 0
|
||||
tml %r5,0x8 # it should be a source indicator...
|
||||
je .top # NO, ignore it...
|
||||
lr %r8,%r5 # r8 = r5
|
||||
nr %r8,%r10 # masking
|
||||
0: mvcle %r6,%r8,0x0 # copy PAGE_SIZE bytes from r8 to r6 - pad with 0
|
||||
jo 0b
|
||||
j .top
|
||||
.done:
|
||||
sr %r0,%r0 #clear register r0
|
||||
la %r4,load_psw-.base(%r13) #load psw-address into the register
|
||||
o %r3,4(%r4) #or load address into psw
|
||||
sr %r0,%r0 # clear register r0
|
||||
la %r4,load_psw-.base(%r13) # load psw-address into the register
|
||||
o %r3,4(%r4) # or load address into psw
|
||||
st %r3,4(%r4)
|
||||
mvc 0(8,%r0),0(%r4) #copy psw to absolute address 0
|
||||
mvc 0(8,%r0),0(%r4) # copy psw to absolute address 0
|
||||
tm have_diag308-.base(%r13),0x01
|
||||
jno .no_diag308
|
||||
diag %r0,%r0,0x308
|
||||
.no_diag308:
|
||||
sr %r1,%r1 #clear %r1
|
||||
sr %r2,%r2 #clear %r2
|
||||
sigp %r1,%r2,0x12 #set cpuid to zero
|
||||
lpsw 0 #hopefully start new kernel...
|
||||
sr %r1,%r1 # clear %r1
|
||||
sr %r2,%r2 # clear %r2
|
||||
sigp %r1,%r2,0x12 # set cpuid to zero
|
||||
lpsw 0 # hopefully start new kernel...
|
||||
|
||||
.align 8
|
||||
zero64:
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
*
|
||||
* (C) Copyright IBM Corp. 2005
|
||||
*
|
||||
* Author(s): Rolf Adelsberger <adelsberger@de.ibm.com>
|
||||
* Author(s): Rolf Adelsberger,
|
||||
* Heiko Carstens <heiko.carstens@de.ibm.com>
|
||||
*
|
||||
*/
|
||||
@@ -25,10 +25,10 @@
|
||||
.text
|
||||
.globl relocate_kernel
|
||||
relocate_kernel:
|
||||
basr %r13,0 #base address
|
||||
basr %r13,0 # base address
|
||||
.base:
|
||||
stnsm sys_msk-.base(%r13),0xf8 #disable DAT and IRQs
|
||||
spx zero64-.base(%r13) #absolute addressing mode
|
||||
stnsm sys_msk-.base(%r13),0xf8 # disable DAT and IRQs
|
||||
spx zero64-.base(%r13) # absolute addressing mode
|
||||
stctg %c0,%c15,ctlregs-.base(%r13)
|
||||
stmg %r0,%r15,gprregs-.base(%r13)
|
||||
lghi %r0,3
|
||||
@@ -37,16 +37,16 @@
|
||||
la %r0,.back_pgm-.base(%r13)
|
||||
stg %r0,0x1d8(%r0)
|
||||
la %r1,load_psw-.base(%r13)
|
||||
mvc 0(8,%r0),0(%r1)
|
||||
mvc 0(8,%r0),0(%r1)
|
||||
la %r0,.back-.base(%r13)
|
||||
st %r0,4(%r0)
|
||||
oi 4(%r0),0x80
|
||||
lghi %r0,0
|
||||
diag %r0,%r0,0x308
|
||||
.back:
|
||||
lhi %r1,1 #mode 1 = esame
|
||||
sigp %r1,%r0,0x12 #switch to esame mode
|
||||
sam64 #switch to 64 bit addressing mode
|
||||
lhi %r1,1 # mode 1 = esame
|
||||
sigp %r1,%r0,0x12 # switch to esame mode
|
||||
sam64 # switch to 64 bit addressing mode
|
||||
basr %r13,0
|
||||
.back_base:
|
||||
oi have_diag308-.back_base(%r13),0x01
|
||||
@@ -56,50 +56,50 @@
|
||||
.back_pgm:
|
||||
lmg %r0,%r15,gprregs-.base(%r13)
|
||||
.top:
|
||||
lghi %r7,4096 #load PAGE_SIZE in r7
|
||||
lghi %r9,4096 #load PAGE_SIZE in r9
|
||||
lg %r5,0(%r2) #read another word for indirection page
|
||||
aghi %r2,8 #increment pointer
|
||||
tml %r5,0x1 #is it a destination page?
|
||||
je .indir_check #NO, goto "indir_check"
|
||||
lgr %r6,%r5 #r6 = r5
|
||||
nill %r6,0xf000 #mask it out and...
|
||||
j .top #...next iteration
|
||||
lghi %r7,4096 # load PAGE_SIZE in r7
|
||||
lghi %r9,4096 # load PAGE_SIZE in r9
|
||||
lg %r5,0(%r2) # read another word for indirection page
|
||||
aghi %r2,8 # increment pointer
|
||||
tml %r5,0x1 # is it a destination page?
|
||||
je .indir_check # NO, goto "indir_check"
|
||||
lgr %r6,%r5 # r6 = r5
|
||||
nill %r6,0xf000 # mask it out and...
|
||||
j .top # ...next iteration
|
||||
.indir_check:
|
||||
tml %r5,0x2 #is it a indirection page?
|
||||
je .done_test #NO, goto "done_test"
|
||||
nill %r5,0xf000 #YES, mask out,
|
||||
lgr %r2,%r5 #move it into the right register,
|
||||
j .top #and read next...
|
||||
tml %r5,0x2 # is it a indirection page?
|
||||
je .done_test # NO, goto "done_test"
|
||||
nill %r5,0xf000 # YES, mask out,
|
||||
lgr %r2,%r5 # move it into the right register,
|
||||
j .top # and read next...
|
||||
.done_test:
|
||||
tml %r5,0x4 #is it the done indicator?
|
||||
je .source_test #NO! Well, then it should be the source indicator...
|
||||
j .done #ok, lets finish it here...
|
||||
tml %r5,0x4 # is it the done indicator?
|
||||
je .source_test # NO! Well, then it should be the source indicator...
|
||||
j .done # ok, lets finish it here...
|
||||
.source_test:
|
||||
tml %r5,0x8 #it should be a source indicator...
|
||||
je .top #NO, ignore it...
|
||||
lgr %r8,%r5 #r8 = r5
|
||||
nill %r8,0xf000 #masking
|
||||
0: mvcle %r6,%r8,0x0 #copy PAGE_SIZE bytes from r8 to r6 - pad with 0
|
||||
tml %r5,0x8 # it should be a source indicator...
|
||||
je .top # NO, ignore it...
|
||||
lgr %r8,%r5 # r8 = r5
|
||||
nill %r8,0xf000 # masking
|
||||
0: mvcle %r6,%r8,0x0 # copy PAGE_SIZE bytes from r8 to r6 - pad with 0
|
||||
jo 0b
|
||||
j .top
|
||||
j .top
|
||||
.done:
|
||||
sgr %r0,%r0 #clear register r0
|
||||
la %r4,load_psw-.base(%r13) #load psw-address into the register
|
||||
o %r3,4(%r4) #or load address into psw
|
||||
sgr %r0,%r0 # clear register r0
|
||||
la %r4,load_psw-.base(%r13) # load psw-address into the register
|
||||
o %r3,4(%r4) # or load address into psw
|
||||
st %r3,4(%r4)
|
||||
mvc 0(8,%r0),0(%r4) #copy psw to absolute address 0
|
||||
mvc 0(8,%r0),0(%r4) # copy psw to absolute address 0
|
||||
tm have_diag308-.base(%r13),0x01
|
||||
jno .no_diag308
|
||||
diag %r0,%r0,0x308
|
||||
.no_diag308:
|
||||
sam31 #31 bit mode
|
||||
sr %r1,%r1 #erase register r1
|
||||
sr %r2,%r2 #erase register r2
|
||||
sigp %r1,%r2,0x12 #set cpuid to zero
|
||||
lpsw 0 #hopefully start new kernel...
|
||||
sam31 # 31 bit mode
|
||||
sr %r1,%r1 # erase register r1
|
||||
sr %r2,%r2 # erase register r2
|
||||
sigp %r1,%r2,0x12 # set cpuid to zero
|
||||
lpsw 0 # hopefully start new kernel...
|
||||
|
||||
.align 8
|
||||
.align 8
|
||||
zero64:
|
||||
.quad 0
|
||||
load_psw:
|
||||
|
||||
Reference in New Issue
Block a user