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Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6
* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6: (51 commits) sk98lin: mark deprecated in Kconfig Hostess SV-11 depends on INET Fix link autonegotiation timer. sk98lin: planned removal B44: increase wait loop b44: replace define e1000: allow ethtool to see link status when down e1000: remove obsolete custom pci_save_state code e1000: fix shared interrupt warning message atm: Use ARRAY_SIZE macro when appropriate bugfixes and new hardware support for arcnet driver pcnet32 NAPI no longer experimental MAINTAINER macb: Remove inappropriate spinlocks around mii calls Convert meth to netdev_priv sky2: v1.13 sky2: receive error handling improvements sky2: transmit timeout sky2: flow control negotiation for Yukon-FE sky2: no need to reset pause bits on shutdown ...
This commit is contained in:
+2
-2
@@ -2630,8 +2630,8 @@ T: git kernel.org:/pub/scm/linux/kernel/git/brodo/pcmcia-2.6.git
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S: Maintained
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PCNET32 NETWORK DRIVER
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P: Thomas Bogendörfer
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M: tsbogend@alpha.franken.de
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P: Don Fry
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M: pcnet32@verizon.net
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L: netdev@vger.kernel.org
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S: Maintained
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+1
-1
@@ -3017,7 +3017,7 @@ read_prom_byte(struct he_dev *he_dev, int addr)
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he_writel(he_dev, val, HOST_CNTL);
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/* Send READ instruction */
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for (i = 0; i < sizeof(readtab)/sizeof(readtab[0]); i++) {
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for (i = 0; i < ARRAY_SIZE(readtab); i++) {
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he_writel(he_dev, val | readtab[i], HOST_CNTL);
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udelay(EEPROM_DELAY);
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}
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@@ -388,7 +388,7 @@ idt77252_eeprom_read_status(struct idt77252_dev *card)
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gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
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for (i = 0; i < sizeof(rdsrtab)/sizeof(rdsrtab[0]); i++) {
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for (i = 0; i < ARRAY_SIZE(rdsrtab); i++) {
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idt77252_write_gp(card, gp | rdsrtab[i]);
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udelay(5);
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}
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@@ -422,7 +422,7 @@ idt77252_eeprom_read_byte(struct idt77252_dev *card, u8 offset)
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gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
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for (i = 0; i < sizeof(rdtab)/sizeof(rdtab[0]); i++) {
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for (i = 0; i < ARRAY_SIZE(rdtab); i++) {
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idt77252_write_gp(card, gp | rdtab[i]);
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udelay(5);
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}
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@@ -469,14 +469,14 @@ idt77252_eeprom_write_byte(struct idt77252_dev *card, u8 offset, u8 data)
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gp = idt77252_read_gp(card) & ~(SAR_GP_EESCLK|SAR_GP_EECS|SAR_GP_EEDO);
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for (i = 0; i < sizeof(wrentab)/sizeof(wrentab[0]); i++) {
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for (i = 0; i < ARRAY_SIZE(wrentab); i++) {
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idt77252_write_gp(card, gp | wrentab[i]);
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udelay(5);
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}
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idt77252_write_gp(card, gp | SAR_GP_EECS);
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udelay(5);
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for (i = 0; i < sizeof(wrtab)/sizeof(wrtab[0]); i++) {
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for (i = 0; i < ARRAY_SIZE(wrtab); i++) {
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idt77252_write_gp(card, gp | wrtab[i]);
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udelay(5);
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}
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@@ -7,6 +7,8 @@
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* Read this ForeRunner's MAC address from eprom/eeprom
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*/
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#include <linux/kernel.h>
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typedef void __iomem *virt_addr_t;
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#define CYCLE_DELAY 5
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@@ -176,7 +178,7 @@ read_eprom_byte(virt_addr_t base, u_int8_t offset)
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val = NICSTAR_REG_READ( base, NICSTAR_REG_GENERAL_PURPOSE ) & 0xFFFFFFF0;
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/* Send READ instruction */
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for (i=0; i<sizeof readtab/sizeof readtab[0]; i++)
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for (i=0; i<ARRAY_SIZE(readtab); i++)
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{
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NICSTAR_REG_WRITE( base, NICSTAR_REG_GENERAL_PURPOSE,
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(val | readtab[i]) );
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+8
-6
@@ -1284,8 +1284,8 @@ config PCNET32
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will be called pcnet32.
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config PCNET32_NAPI
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bool "Use RX polling (NAPI) (EXPERIMENTAL)"
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depends on PCNET32 && EXPERIMENTAL
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bool "Use RX polling (NAPI)"
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depends on PCNET32
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help
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NAPI is a new driver API designed to reduce CPU and interrupt load
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when the driver is receiving lots of packets from the card. It is
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@@ -2125,14 +2125,16 @@ config SKY2
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will be called sky2. This is recommended.
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config SK98LIN
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tristate "Marvell Yukon Chipset / SysKonnect SK-98xx Support"
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tristate "Marvell Yukon Chipset / SysKonnect SK-98xx Support (DEPRECATED)"
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depends on PCI
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---help---
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Say Y here if you have a Marvell Yukon or SysKonnect SK-98xx/SK-95xx
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compliant Gigabit Ethernet Adapter.
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This driver supports the original Yukon chipset. A cleaner driver is
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also available (skge) which seems to work better than this one.
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This driver supports the original Yukon chipset. This driver is
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deprecated and will be removed from the kernel in the near future,
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it has been replaced by the skge driver. skge is cleaner and
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seems to work better.
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This driver does not support the newer Yukon2 chipset. A separate
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driver, sky2, is provided to support Yukon2-based adapters.
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@@ -2337,7 +2339,7 @@ config QLA3XXX
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config ATL1
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tristate "Attansic L1 Gigabit Ethernet support (EXPERIMENTAL)"
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depends on NET_PCI && PCI && EXPERIMENTAL
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depends on PCI && EXPERIMENTAL
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select CRC32
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select MII
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help
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@@ -94,7 +94,7 @@ static void rx(struct net_device *dev, int bufnum,
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BUGMSG(D_DURING, "it's a raw packet (length=%d)\n", length);
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if (length >= MinTU)
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if (length > MTU)
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ofs = 512 - length;
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else
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ofs = 256 - length;
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@@ -183,7 +183,7 @@ static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,
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length, XMTU);
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length = XMTU;
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}
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if (length > MinTU) {
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if (length >= MinTU) {
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hard->offset[0] = 0;
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hard->offset[1] = ofs = 512 - length;
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} else if (length > MTU) {
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@@ -41,7 +41,7 @@
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||||
* <jojo@repas.de>
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*/
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#define VERSION "arcnet: v3.93 BETA 2000/04/29 - by Avery Pennarun et al.\n"
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#define VERSION "arcnet: v3.94 BETA 2007/02/08 - by Avery Pennarun et al.\n"
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#include <linux/module.h>
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#include <linux/types.h>
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||||
|
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@@ -155,6 +155,7 @@ static struct pci_device_id com20020pci_id_table[] = {
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{ 0x1571, 0xa00b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_IS_5MBIT },
|
||||
{ 0x1571, 0xa00c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_IS_5MBIT },
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{ 0x1571, 0xa00d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_IS_5MBIT },
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{ 0x1571, 0xa00e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_IS_5MBIT },
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{ 0x1571, 0xa201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT },
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{ 0x1571, 0xa202, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT },
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{ 0x1571, 0xa203, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT },
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@@ -163,6 +164,8 @@ static struct pci_device_id com20020pci_id_table[] = {
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{ 0x1571, 0xa206, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT },
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{ 0x10B5, 0x9030, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT },
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{ 0x10B5, 0x9050, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT },
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{ 0x14BA, 0x6000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT },
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{ 0x10B5, 0x2200, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT },
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{0,}
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};
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@@ -104,7 +104,7 @@ int com20020_check(struct net_device *dev)
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SET_SUBADR(SUB_SETUP1);
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outb(lp->setup, _XREG);
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if (lp->card_flags & ARC_CAN_10MBIT)
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if (lp->clockm != 0)
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{
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SET_SUBADR(SUB_SETUP2);
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outb(lp->setup2, _XREG);
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+21
-16
@@ -243,14 +243,8 @@ static int atl1_get_permanent_address(struct atl1_hw *hw)
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i += 4;
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}
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/*
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* The following 2 lines are the Attansic originals. Saving for posterity.
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* *(u32 *) & eth_addr[2] = LONGSWAP(addr[0]);
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* *(u16 *) & eth_addr[0] = SHORTSWAP(*(u16 *) & addr[1]);
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*/
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*(u32 *) & eth_addr[2] = swab32(addr[0]);
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*(u16 *) & eth_addr[0] = swab16(*(u16 *) & addr[1]);
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*(u32 *) ð_addr[2] = swab32(addr[0]);
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*(u16 *) ð_addr[0] = swab16(*(u16 *) &addr[1]);
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if (is_valid_ether_addr(eth_addr)) {
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memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
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return 0;
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@@ -281,17 +275,28 @@ static int atl1_get_permanent_address(struct atl1_hw *hw)
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i += 4;
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}
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/*
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* The following 2 lines are the Attansic originals. Saving for posterity.
|
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* *(u32 *) & eth_addr[2] = LONGSWAP(addr[0]);
|
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* *(u16 *) & eth_addr[0] = SHORTSWAP(*(u16 *) & addr[1]);
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*/
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*(u32 *) & eth_addr[2] = swab32(addr[0]);
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*(u16 *) & eth_addr[0] = swab16(*(u16 *) & addr[1]);
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*(u32 *) ð_addr[2] = swab32(addr[0]);
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*(u16 *) ð_addr[0] = swab16(*(u16 *) &addr[1]);
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if (is_valid_ether_addr(eth_addr)) {
|
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memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
|
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return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* On some motherboards, the MAC address is written by the
|
||||
* BIOS directly to the MAC register during POST, and is
|
||||
* not stored in eeprom. If all else thus far has failed
|
||||
* to fetch the permanent MAC address, try reading it directly.
|
||||
*/
|
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addr[0] = ioread32(hw->hw_addr + REG_MAC_STA_ADDR);
|
||||
addr[1] = ioread16(hw->hw_addr + (REG_MAC_STA_ADDR + 4));
|
||||
*(u32 *) ð_addr[2] = swab32(addr[0]);
|
||||
*(u16 *) ð_addr[0] = swab16(*(u16 *) &addr[1]);
|
||||
if (is_valid_ether_addr(eth_addr)) {
|
||||
memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
@@ -357,7 +362,7 @@ void atl1_hash_set(struct atl1_hw *hw, u32 hash_value)
|
||||
*/
|
||||
hash_reg = (hash_value >> 31) & 0x1;
|
||||
hash_bit = (hash_value >> 26) & 0x1F;
|
||||
mta = ioread32((hw + REG_RX_HASH_TABLE) + (hash_reg << 2));
|
||||
mta = ioread32((hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));
|
||||
mta |= (1 << hash_bit);
|
||||
iowrite32(mta, (hw->hw_addr + REG_RX_HASH_TABLE) + (hash_reg << 2));
|
||||
}
|
||||
|
||||
@@ -82,8 +82,7 @@
|
||||
|
||||
#include "atl1.h"
|
||||
|
||||
#define RUN_REALTIME 0
|
||||
#define DRIVER_VERSION "2.0.6"
|
||||
#define DRIVER_VERSION "2.0.7"
|
||||
|
||||
char atl1_driver_name[] = "atl1";
|
||||
static const char atl1_driver_string[] = "Attansic L1 Ethernet Network Driver";
|
||||
@@ -100,7 +99,7 @@ MODULE_VERSION(DRIVER_VERSION);
|
||||
* atl1_pci_tbl - PCI Device ID Table
|
||||
*/
|
||||
static const struct pci_device_id atl1_pci_tbl[] = {
|
||||
{PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, 0x1048)},
|
||||
{PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1)},
|
||||
/* required last entry */
|
||||
{0,}
|
||||
};
|
||||
|
||||
+9
-10
@@ -59,7 +59,6 @@
|
||||
#define B44_DEF_TX_RING_PENDING (B44_TX_RING_SIZE - 1)
|
||||
#define B44_TX_RING_BYTES (sizeof(struct dma_desc) * \
|
||||
B44_TX_RING_SIZE)
|
||||
#define B44_DMA_MASK 0x3fffffff
|
||||
|
||||
#define TX_RING_GAP(BP) \
|
||||
(B44_TX_RING_SIZE - (BP)->tx_pending)
|
||||
@@ -665,7 +664,7 @@ static int b44_alloc_rx_skb(struct b44 *bp, int src_idx, u32 dest_idx_unmasked)
|
||||
/* Hardware bug work-around, the chip is unable to do PCI DMA
|
||||
to/from anything above 1GB :-( */
|
||||
if (dma_mapping_error(mapping) ||
|
||||
mapping + RX_PKT_BUF_SZ > B44_DMA_MASK) {
|
||||
mapping + RX_PKT_BUF_SZ > DMA_30BIT_MASK) {
|
||||
/* Sigh... */
|
||||
if (!dma_mapping_error(mapping))
|
||||
pci_unmap_single(bp->pdev, mapping, RX_PKT_BUF_SZ,PCI_DMA_FROMDEVICE);
|
||||
@@ -677,7 +676,7 @@ static int b44_alloc_rx_skb(struct b44 *bp, int src_idx, u32 dest_idx_unmasked)
|
||||
RX_PKT_BUF_SZ,
|
||||
PCI_DMA_FROMDEVICE);
|
||||
if (dma_mapping_error(mapping) ||
|
||||
mapping + RX_PKT_BUF_SZ > B44_DMA_MASK) {
|
||||
mapping + RX_PKT_BUF_SZ > DMA_30BIT_MASK) {
|
||||
if (!dma_mapping_error(mapping))
|
||||
pci_unmap_single(bp->pdev, mapping, RX_PKT_BUF_SZ,PCI_DMA_FROMDEVICE);
|
||||
dev_kfree_skb_any(skb);
|
||||
@@ -988,7 +987,7 @@ static int b44_start_xmit(struct sk_buff *skb, struct net_device *dev)
|
||||
}
|
||||
|
||||
mapping = pci_map_single(bp->pdev, skb->data, len, PCI_DMA_TODEVICE);
|
||||
if (dma_mapping_error(mapping) || mapping + len > B44_DMA_MASK) {
|
||||
if (dma_mapping_error(mapping) || mapping + len > DMA_30BIT_MASK) {
|
||||
/* Chip can't handle DMA to/from >1GB, use bounce buffer */
|
||||
if (!dma_mapping_error(mapping))
|
||||
pci_unmap_single(bp->pdev, mapping, len, PCI_DMA_TODEVICE);
|
||||
@@ -1000,7 +999,7 @@ static int b44_start_xmit(struct sk_buff *skb, struct net_device *dev)
|
||||
|
||||
mapping = pci_map_single(bp->pdev, bounce_skb->data,
|
||||
len, PCI_DMA_TODEVICE);
|
||||
if (dma_mapping_error(mapping) || mapping + len > B44_DMA_MASK) {
|
||||
if (dma_mapping_error(mapping) || mapping + len > DMA_30BIT_MASK) {
|
||||
if (!dma_mapping_error(mapping))
|
||||
pci_unmap_single(bp->pdev, mapping,
|
||||
len, PCI_DMA_TODEVICE);
|
||||
@@ -1227,7 +1226,7 @@ static int b44_alloc_consistent(struct b44 *bp)
|
||||
DMA_BIDIRECTIONAL);
|
||||
|
||||
if (dma_mapping_error(rx_ring_dma) ||
|
||||
rx_ring_dma + size > B44_DMA_MASK) {
|
||||
rx_ring_dma + size > DMA_30BIT_MASK) {
|
||||
kfree(rx_ring);
|
||||
goto out_err;
|
||||
}
|
||||
@@ -1254,7 +1253,7 @@ static int b44_alloc_consistent(struct b44 *bp)
|
||||
DMA_TO_DEVICE);
|
||||
|
||||
if (dma_mapping_error(tx_ring_dma) ||
|
||||
tx_ring_dma + size > B44_DMA_MASK) {
|
||||
tx_ring_dma + size > DMA_30BIT_MASK) {
|
||||
kfree(tx_ring);
|
||||
goto out_err;
|
||||
}
|
||||
@@ -1289,7 +1288,7 @@ static void b44_chip_reset(struct b44 *bp)
|
||||
if (ssb_is_core_up(bp)) {
|
||||
bw32(bp, B44_RCV_LAZY, 0);
|
||||
bw32(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE);
|
||||
b44_wait_bit(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE, 100, 1);
|
||||
b44_wait_bit(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE, 200, 1);
|
||||
bw32(bp, B44_DMATX_CTRL, 0);
|
||||
bp->tx_prod = bp->tx_cons = 0;
|
||||
if (br32(bp, B44_DMARX_STAT) & DMARX_STAT_EMASK) {
|
||||
@@ -2151,13 +2150,13 @@ static int __devinit b44_init_one(struct pci_dev *pdev,
|
||||
|
||||
pci_set_master(pdev);
|
||||
|
||||
err = pci_set_dma_mask(pdev, (u64) B44_DMA_MASK);
|
||||
err = pci_set_dma_mask(pdev, (u64) DMA_30BIT_MASK);
|
||||
if (err) {
|
||||
dev_err(&pdev->dev, "No usable DMA configuration, aborting.\n");
|
||||
goto err_out_free_res;
|
||||
}
|
||||
|
||||
err = pci_set_consistent_dma_mask(pdev, (u64) B44_DMA_MASK);
|
||||
err = pci_set_consistent_dma_mask(pdev, (u64) DMA_30BIT_MASK);
|
||||
if (err) {
|
||||
dev_err(&pdev->dev, "No usable DMA configuration, aborting.\n");
|
||||
goto err_out_free_res;
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2007 Chelsio, Inc. All rights reserved.
|
||||
* Copyright (c) 2006-2007 Open Grid Computing, Inc. All rights reserved.
|
||||
*
|
||||
* This software is available to you under a choice of one of two
|
||||
* licenses. You may choose to be licensed under the terms of the GNU
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2007 Chelsio, Inc. All rights reserved.
|
||||
* Copyright (c) 2006-2007 Open Grid Computing, Inc. All rights reserved.
|
||||
*
|
||||
* This software is available to you under a choice of one of two
|
||||
* licenses. You may choose to be licensed under the terms of the GNU
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2006-2007 Chelsio, Inc. All rights reserved.
|
||||
* Copyright (c) 2006-2007 Open Grid Computing, Inc. All rights reserved.
|
||||
*
|
||||
* This software is available to you under a choice of one of two
|
||||
* licenses. You may choose to be licensed under the terms of the GNU
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003-2007 Chelsio, Inc. All rights reserved.
|
||||
* Copyright (c) 2006-2007 Open Grid Computing, Inc. All rights reserved.
|
||||
*
|
||||
* This software is available to you under a choice of one of two
|
||||
* licenses. You may choose to be licensed under the terms of the GNU
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2003-2007 Chelsio, Inc. All rights reserved.
|
||||
* Copyright (c) 2006-2007 Open Grid Computing, Inc. All rights reserved.
|
||||
*
|
||||
* This software is available to you under a choice of one of two
|
||||
* licenses. You may choose to be licensed under the terms of the GNU
|
||||
|
||||
@@ -1,6 +1,5 @@
|
||||
/*
|
||||
* Copyright (C) 2006-2007 Chelsio Communications. All rights reserved.
|
||||
* Copyright (C) 2006-2007 Open Grid Computing, Inc. All rights reserved.
|
||||
*
|
||||
* This software is available to you under a choice of one of two
|
||||
* licenses. You may choose to be licensed under the terms of the GNU
|
||||
|
||||
@@ -337,7 +337,6 @@ struct e1000_adapter {
|
||||
struct e1000_rx_ring test_rx_ring;
|
||||
|
||||
|
||||
uint32_t *config_space;
|
||||
int msg_enable;
|
||||
#ifdef CONFIG_PCI_MSI
|
||||
boolean_t have_msi;
|
||||
|
||||
@@ -166,7 +166,7 @@ e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
|
||||
ecmd->transceiver = XCVR_EXTERNAL;
|
||||
}
|
||||
|
||||
if (netif_carrier_ok(adapter->netdev)) {
|
||||
if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU) {
|
||||
|
||||
e1000_get_speed_and_duplex(hw, &adapter->link_speed,
|
||||
&adapter->link_duplex);
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user