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drivers/net: Remove boolean comparisons to true/false
Booleans should not be compared to true or false but be directly tested or tested with !. Done via cocci script: @@ bool t; @@ - t == true + t @@ bool t; @@ - t != true + !t @@ bool t; @@ - t == false + !t @@ bool t; @@ - t != false + t Signed-off-by: Joe Perches <joe@perches.com> Reviewed-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
committed by
David S. Miller
parent
1a0d6ae579
commit
23677ce317
@@ -614,8 +614,7 @@ static inline void bnx2x_igu_clear_sb_gen(struct bnx2x *bp, u8 func,
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u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL;
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u32 igu_addr_ack = IGU_REG_CSTORM_TYPE_0_SB_CLEANUP + (idu_sb_id/32)*4;
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u32 sb_bit = 1 << (idu_sb_id%32);
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u32 func_encode = func |
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((is_Pf == true ? 1 : 0) << IGU_FID_ENCODE_IS_PF_SHIFT);
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u32 func_encode = func | (is_Pf ? 1 : 0) << IGU_FID_ENCODE_IS_PF_SHIFT;
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u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + idu_sb_id;
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/* Not supported in BC mode */
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@@ -203,7 +203,7 @@ bfa_nw_cee_get_attr(struct bfa_cee *cee, struct bfa_cee_attr *attr,
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if (!bfa_nw_ioc_is_operational(cee->ioc))
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return BFA_STATUS_IOC_FAILURE;
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if (cee->get_attr_pending == true)
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if (cee->get_attr_pending)
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return BFA_STATUS_DEVBUSY;
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cee->get_attr_pending = true;
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@@ -272,7 +272,7 @@ bfa_cee_notify(void *arg, enum bfa_ioc_event event)
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switch (event) {
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case BFA_IOC_E_DISABLED:
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case BFA_IOC_E_FAILED:
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if (cee->get_attr_pending == true) {
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if (cee->get_attr_pending) {
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cee->get_attr_status = BFA_STATUS_FAILED;
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cee->get_attr_pending = false;
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if (cee->cbfn.get_attr_cbfn) {
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@@ -281,7 +281,7 @@ bfa_cee_notify(void *arg, enum bfa_ioc_event event)
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BFA_STATUS_FAILED);
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}
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}
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if (cee->get_stats_pending == true) {
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if (cee->get_stats_pending) {
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cee->get_stats_status = BFA_STATUS_FAILED;
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cee->get_stats_pending = false;
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if (cee->cbfn.get_stats_cbfn) {
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@@ -290,7 +290,7 @@ bfa_cee_notify(void *arg, enum bfa_ioc_event event)
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BFA_STATUS_FAILED);
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}
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}
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if (cee->reset_stats_pending == true) {
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if (cee->reset_stats_pending) {
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cee->reset_stats_status = BFA_STATUS_FAILED;
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cee->reset_stats_pending = false;
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if (cee->cbfn.reset_stats_cbfn) {
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@@ -692,7 +692,7 @@ static void
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bfa_iocpf_sm_mismatch_entry(struct bfa_iocpf *iocpf)
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{
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/* Call only the first time sm enters fwmismatch state. */
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if (iocpf->fw_mismatch_notified == false)
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if (!iocpf->fw_mismatch_notified)
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bfa_ioc_pf_fwmismatch(iocpf->ioc);
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iocpf->fw_mismatch_notified = true;
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@@ -533,10 +533,8 @@ __le16
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ixgb_get_eeprom_word(struct ixgb_hw *hw, u16 index)
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{
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if ((index < IXGB_EEPROM_SIZE) &&
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(ixgb_check_and_get_eeprom_data(hw) == true)) {
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return hw->eeprom[index];
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}
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if (index < IXGB_EEPROM_SIZE && ixgb_check_and_get_eeprom_data(hw))
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return hw->eeprom[index];
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return 0;
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}
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@@ -558,7 +556,7 @@ ixgb_get_ee_mac_addr(struct ixgb_hw *hw,
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ENTER();
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if (ixgb_check_and_get_eeprom_data(hw) == true) {
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if (ixgb_check_and_get_eeprom_data(hw)) {
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for (i = 0; i < ETH_ALEN; i++) {
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mac_addr[i] = ee_map->mac_addr[i];
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}
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@@ -578,7 +576,7 @@ ixgb_get_ee_mac_addr(struct ixgb_hw *hw,
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u32
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ixgb_get_ee_pba_number(struct ixgb_hw *hw)
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{
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if (ixgb_check_and_get_eeprom_data(hw) == true)
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if (ixgb_check_and_get_eeprom_data(hw))
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return le16_to_cpu(hw->eeprom[EEPROM_PBA_1_2_REG])
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| (le16_to_cpu(hw->eeprom[EEPROM_PBA_3_4_REG])<<16);
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@@ -599,7 +597,7 @@ ixgb_get_ee_device_id(struct ixgb_hw *hw)
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{
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struct ixgb_ee_map_type *ee_map = (struct ixgb_ee_map_type *)hw->eeprom;
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if (ixgb_check_and_get_eeprom_data(hw) == true)
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if (ixgb_check_and_get_eeprom_data(hw))
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return le16_to_cpu(ee_map->device_id);
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return 0;
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@@ -617,7 +617,7 @@ static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
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*link_up = false;
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}
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if (*link_up == false)
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if (!*link_up)
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goto out;
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}
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@@ -645,7 +645,7 @@ static s32 ixgbe_check_mac_link_82598(struct ixgbe_hw *hw,
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else
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*speed = IXGBE_LINK_SPEED_1GB_FULL;
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if ((hw->device_id == IXGBE_DEV_ID_82598AT2) && (*link_up == true) &&
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if ((hw->device_id == IXGBE_DEV_ID_82598AT2) && *link_up &&
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(ixgbe_validate_link_ready(hw) != 0))
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*link_up = false;
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@@ -258,7 +258,7 @@ static void ixgbe_restore_vf_macvlans(struct ixgbe_adapter *adapter)
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list_for_each(pos, &adapter->vf_mvs.l) {
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entry = list_entry(pos, struct vf_macvlans, l);
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if (entry->free == false)
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if (!entry->free)
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hw->mac.ops.set_rar(hw, entry->rar_entry,
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entry->vf_macvlan,
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entry->vf, IXGBE_RAH_AV);
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@@ -760,7 +760,7 @@ static s32 ixgbe_blink_led_start_X540(struct ixgbe_hw *hw, u32 index)
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* This will be reversed when we stop the blinking.
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*/
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hw->mac.ops.check_link(hw, &speed, &link_up, false);
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if (link_up == false) {
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if (!link_up) {
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macc_reg = IXGBE_READ_REG(hw, IXGBE_MACC);
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macc_reg |= IXGBE_MACC_FLU | IXGBE_MACC_FSV_10G | IXGBE_MACC_FS;
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IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg);
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@@ -1224,7 +1224,7 @@ static irqreturn_t pch_gbe_intr(int irq, void *data)
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/* When request status is Receive interruption */
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if ((int_st & (PCH_GBE_INT_RX_DMA_CMPLT | PCH_GBE_INT_TX_CMPLT)) ||
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(adapter->rx_stop_flag == true)) {
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(adapter->rx_stop_flag)) {
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if (likely(napi_schedule_prep(&adapter->napi))) {
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/* Enable only Rx Descriptor empty */
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atomic_inc(&adapter->irq_sem);
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@@ -355,8 +355,7 @@ static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev)
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}
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}
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if (clk125en == false ||
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(phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))
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if (!clk125en || (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))
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val &= ~BCM54XX_SHD_SCR3_DLLAPD_DIS;
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else
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val |= BCM54XX_SHD_SCR3_DLLAPD_DIS;
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@@ -373,8 +372,7 @@ static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev)
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orig = val;
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if (clk125en == false ||
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(phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))
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if (!clk125en || (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE))
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val |= BCM54XX_SHD_APD_EN;
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else
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val &= ~BCM54XX_SHD_APD_EN;
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@@ -257,7 +257,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
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"beacon RSSI high");
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/* only OFDM: beacon RSSI is high, we can disable ODFM weak
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* signal detection */
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if (ofdm_trigger && as->ofdm_weak_sig == true) {
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if (ofdm_trigger && as->ofdm_weak_sig) {
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ath5k_ani_set_ofdm_weak_signal_detection(ah, false);
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ath5k_ani_set_spur_immunity_level(ah, 0);
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return;
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@@ -272,7 +272,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
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* but can raise firstep level */
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ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
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"beacon RSSI mid");
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if (ofdm_trigger && as->ofdm_weak_sig == false)
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if (ofdm_trigger && !as->ofdm_weak_sig)
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ath5k_ani_set_ofdm_weak_signal_detection(ah, true);
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if (as->firstep_level < ATH5K_ANI_MAX_FIRSTEP_LVL)
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ath5k_ani_set_firstep_level(ah, as->firstep_level + 1);
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@@ -282,7 +282,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
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* detect and zero firstep level to maximize CCK sensitivity */
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ATH5K_DBG_UNLIMIT(ah, ATH5K_DEBUG_ANI,
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"beacon RSSI low, 2GHz");
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if (ofdm_trigger && as->ofdm_weak_sig == true)
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if (ofdm_trigger && as->ofdm_weak_sig)
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ath5k_ani_set_ofdm_weak_signal_detection(ah, false);
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if (as->firstep_level > 0)
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ath5k_ani_set_firstep_level(ah, 0);
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@@ -326,7 +326,7 @@ ath5k_ani_lower_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as)
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} else if (rssi > ATH5K_ANI_RSSI_THR_LOW) {
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/* beacon RSSI is mid-range: turn on ODFM weak signal
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* detection and next, lower firstep level */
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if (as->ofdm_weak_sig == false) {
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if (!as->ofdm_weak_sig) {
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ath5k_ani_set_ofdm_weak_signal_detection(ah,
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true);
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return;
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@@ -407,20 +407,20 @@ static void ath9k_hw_ani_lower_immunity_old(struct ath_hw *ah)
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if (aniState->ofdmWeakSigDetectOff) {
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if (ath9k_hw_ani_control(ah,
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ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION,
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true) == true)
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true))
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return;
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}
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if (aniState->firstepLevel > 0) {
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if (ath9k_hw_ani_control(ah,
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ATH9K_ANI_FIRSTEP_LEVEL,
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aniState->firstepLevel - 1) == true)
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aniState->firstepLevel - 1))
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return;
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}
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} else {
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if (aniState->firstepLevel > 0) {
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if (ath9k_hw_ani_control(ah,
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ATH9K_ANI_FIRSTEP_LEVEL,
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aniState->firstepLevel - 1) == true)
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aniState->firstepLevel - 1))
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return;
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}
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}
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@@ -24,7 +24,7 @@
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static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah,
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bool power_off)
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{
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if (ah->aspm_enabled != true)
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if (!ah->aspm_enabled)
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return;
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ath9k_hw_ops(ah)->config_pci_powersave(ah, power_off);
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@@ -1600,7 +1600,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
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allow_fbs = true;
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if (bChannelChange &&
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(ah->chip_fullsleep != true) &&
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(!ah->chip_fullsleep) &&
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(ah->curchan != NULL) &&
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(chan->channel != ah->curchan->channel) &&
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(allow_fbs ||
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@@ -2038,8 +2038,7 @@ static bool ath9k_hw_set_power_awake(struct ath_hw *ah, int setChip)
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if (setChip) {
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if ((REG_READ(ah, AR_RTC_STATUS) &
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AR_RTC_STATUS_M) == AR_RTC_STATUS_SHUTDOWN) {
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if (ath9k_hw_set_reset_reg(ah,
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ATH9K_RESET_POWER_ON) != true) {
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if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_POWER_ON)) {
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return false;
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}
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if (!AR_SREV_9300_20_OR_LATER(ah))
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@@ -767,7 +767,7 @@ static int brcmf_sdbrcm_htclk(struct brcmf_sdio *bus, bool on, bool pendok)
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brcmf_dbg(INFO, "CLKCTL: turned ON\n");
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#if defined(DEBUG)
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if (bus->alp_only != true) {
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if (!bus->alp_only) {
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if (SBSDIO_ALPONLY(clkctl))
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brcmf_dbg(ERROR, "HT Clock should be on\n");
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}
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@@ -2059,8 +2059,7 @@ static void
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brcmf_sdbrcm_wait_for_event(struct brcmf_sdio *bus, bool *lockvar)
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{
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up(&bus->sdsem);
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wait_event_interruptible_timeout(bus->ctrl_wait,
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(*lockvar == false), HZ * 2);
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wait_event_interruptible_timeout(bus->ctrl_wait, !*lockvar, HZ * 2);
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down(&bus->sdsem);
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return;
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}
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@@ -2647,8 +2646,7 @@ static int brcmf_sdbrcm_bus_txdata(struct device *dev, struct sk_buff *pkt)
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/* Priority based enq */
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spin_lock_bh(&bus->txqlock);
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if (brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec) ==
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false) {
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if (!brcmf_c_prec_enq(bus->sdiodev->dev, &bus->txq, pkt, prec)) {
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skb_pull(pkt, SDPCM_HDRLEN);
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brcmf_txcomplete(bus->sdiodev->dev, pkt, false);
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brcmu_pkt_buf_free_skb(pkt);
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@@ -2935,7 +2933,7 @@ brcmf_sdbrcm_bus_txctl(struct device *dev, unsigned char *msg, uint msglen)
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brcmf_sdbrcm_wait_for_event(bus, &bus->ctrl_frame_stat);
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if (bus->ctrl_frame_stat == false) {
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if (!bus->ctrl_frame_stat) {
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brcmf_dbg(INFO, "ctrl_frame_stat == false\n");
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ret = 0;
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} else {
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@@ -2997,7 +2995,7 @@ brcmf_sdbrcm_bus_rxctl(struct device *dev, unsigned char *msg, uint msglen)
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rxlen, msglen);
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} else if (timeleft == 0) {
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brcmf_dbg(ERROR, "resumed on timeout\n");
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} else if (pending == true) {
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} else if (pending) {
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brcmf_dbg(CTL, "cancelled\n");
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return -ERESTARTSYS;
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} else {
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@@ -3983,7 +3981,7 @@ void
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brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
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{
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/* Totally stop the timer */
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if (!wdtick && bus->wd_timer_valid == true) {
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if (!wdtick && bus->wd_timer_valid) {
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del_timer_sync(&bus->timer);
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bus->wd_timer_valid = false;
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bus->save_ms = wdtick;
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@@ -3996,7 +3994,7 @@ brcmf_sdbrcm_wd_timer(struct brcmf_sdio *bus, uint wdtick)
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if (wdtick) {
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if (bus->save_ms != BRCMF_WD_POLL_MS) {
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if (bus->wd_timer_valid == true)
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if (bus->wd_timer_valid)
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/* Stop timer and restart at new value */
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del_timer_sync(&bus->timer);
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@@ -3248,7 +3248,7 @@ static void brcms_b_coreinit(struct brcms_c_info *wlc)
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}
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/* For old ucode, txfifo sizes needs to be modified(increased) */
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if (fifosz_fixup == true)
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if (fifosz_fixup)
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brcms_b_corerev_fifofixup(wlc_hw);
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/* check txfifo allocations match between ucode and driver */
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@@ -5427,7 +5427,7 @@ int brcms_c_set_gmode(struct brcms_c_info *wlc, u8 gmode, bool config)
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return -EINVAL;
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/* update configuration value */
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if (config == true)
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if (config)
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brcms_c_protection_upd(wlc, BRCMS_PROT_G_USER, gmode);
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/* Clear rateset override */
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@@ -21464,7 +21464,7 @@ void wlc_phy_antsel_init(struct brcms_phy_pub *ppi, bool lut_init)
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if (NREV_GE(pi->pubpi.phy_rev, 3)) {
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u16 v0 = 0x211, v1 = 0x222, v2 = 0x144, v3 = 0x188;
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if (lut_init == false)
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if (!lut_init)
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return;
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if (pi->srom_fem2g.antswctrllut == 0) {
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@@ -478,7 +478,7 @@ void iwl_trans_pcie_tx_agg_setup(struct iwl_trans *trans,
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}
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txq_id = trans_pcie->agg_txq[sta_id][tid];
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if (WARN_ON_ONCE(is_agg_txqid_valid(trans, txq_id) == false)) {
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if (WARN_ON_ONCE(!is_agg_txqid_valid(trans, txq_id))) {
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IWL_ERR(trans,
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"queue number out of range: %d, must be %d to %d\n",
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txq_id, IWLAGN_FIRST_AMPDU_QUEUE,
|
||||
@@ -573,7 +573,7 @@ int iwl_trans_pcie_tx_agg_disable(struct iwl_trans *trans, int sta_id, int tid)
|
||||
struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
|
||||
u8 txq_id = trans_pcie->agg_txq[sta_id][tid];
|
||||
|
||||
if (WARN_ON_ONCE(is_agg_txqid_valid(trans, txq_id) == false)) {
|
||||
if (WARN_ON_ONCE(!is_agg_txqid_valid(trans, txq_id))) {
|
||||
IWL_ERR(trans,
|
||||
"queue number out of range: %d, must be %d to %d\n",
|
||||
txq_id, IWLAGN_FIRST_AMPDU_QUEUE,
|
||||
|
||||
@@ -1330,7 +1330,7 @@ static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
|
||||
wh->addr1);
|
||||
|
||||
if (mwl8k_vif != NULL &&
|
||||
mwl8k_vif->is_hw_crypto_enabled == true) {
|
||||
mwl8k_vif->is_hw_crypto_enabled) {
|
||||
/*
|
||||
* When MMIC ERROR is encountered
|
||||
* by the firmware, payload is
|
||||
@@ -1993,8 +1993,7 @@ mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
|
||||
*/
|
||||
|
||||
if (txq->len >= MWL8K_TX_DESCS - 2) {
|
||||
if (mgmtframe == false ||
|
||||
txq->len == MWL8K_TX_DESCS) {
|
||||
if (!mgmtframe || txq->len == MWL8K_TX_DESCS) {
|
||||
if (start_ba_session) {
|
||||
spin_lock(&priv->stream_lock);
|
||||
mwl8k_remove_stream(hw, stream);
|
||||
|
||||
@@ -777,7 +777,7 @@ static void efuse_write_data_case1(struct ieee80211_hw *hw, u16 *efuse_addr,
|
||||
dataempty = false;
|
||||
}
|
||||
|
||||
if (dataempty == false) {
|
||||
if (!dataempty) {
|
||||
*efuse_addr = *efuse_addr + (tmp_word_cnts * 2) + 1;
|
||||
*write_state = PG_STATE_HEADER;
|
||||
} else {
|
||||
|
||||
@@ -105,8 +105,7 @@ bool rtl_ps_set_rf_state(struct ieee80211_hw *hw,
|
||||
|
||||
case ERFOFF:
|
||||
|
||||
if ((changesource == RF_CHANGE_BY_HW)
|
||||
&& (ppsc->hwradiooff == false)) {
|
||||
if ((changesource == RF_CHANGE_BY_HW) && !ppsc->hwradiooff) {
|
||||
ppsc->hwradiooff = true;
|
||||
}
|
||||
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user