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soc/fsl: Introduce DPAA 1.x BMan device driver
This driver enables the Freescale DPAA 1.x Buffer Manager block. BMan is a hardware accelerator that manages buffer pools. It allows CPUs and other accelerators connected to the SoC datapath to acquire and release buffers during data processing. Signed-off-by: Roy Pledge <roy.pledge@nxp.com> Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com> Signed-off-by: Scott Wood <oss@buserror.net>
This commit is contained in:
Claudiu Manoil
committed by
Scott Wood
Scott Wood
parent
36eb1542fc
commit
1f9c0a7727
@@ -0,0 +1,28 @@
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menuconfig FSL_DPAA
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bool "Freescale DPAA 1.x support"
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depends on FSL_SOC_BOOKE
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select GENERIC_ALLOCATOR
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help
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The Freescale Data Path Acceleration Architecture (DPAA) is a set of
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hardware components on specific QorIQ multicore processors.
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This architecture provides the infrastructure to support simplified
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sharing of networking interfaces and accelerators by multiple CPUs.
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The major h/w blocks composing DPAA are BMan and QMan.
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The Buffer Manager (BMan) is a hardware buffer pool management block
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that allows software and accelerators on the datapath to acquire and
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release buffers in order to build frames.
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The Queue Manager (QMan) is a hardware queue management block
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that allows software and accelerators on the datapath to enqueue and
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dequeue frames in order to communicate.
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if FSL_DPAA
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config FSL_DPAA_CHECKING
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bool "Additional driver checking"
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help
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Compiles in additional checks, to sanity-check the drivers and
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any use of the exported API. Not recommended for performance.
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endif # FSL_DPAA
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@@ -0,0 +1,2 @@
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obj-$(CONFIG_FSL_DPAA) += bman_ccsr.o bman_portal.o \
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bman.o
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,263 @@
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/* Copyright (c) 2009 - 2016 Freescale Semiconductor, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Freescale Semiconductor nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "bman_priv.h"
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u16 bman_ip_rev;
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EXPORT_SYMBOL(bman_ip_rev);
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/* Register offsets */
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#define REG_FBPR_FPC 0x0800
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#define REG_ECSR 0x0a00
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#define REG_ECIR 0x0a04
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#define REG_EADR 0x0a08
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#define REG_EDATA(n) (0x0a10 + ((n) * 0x04))
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#define REG_SBEC(n) (0x0a80 + ((n) * 0x04))
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#define REG_IP_REV_1 0x0bf8
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#define REG_IP_REV_2 0x0bfc
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#define REG_FBPR_BARE 0x0c00
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#define REG_FBPR_BAR 0x0c04
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#define REG_FBPR_AR 0x0c10
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#define REG_SRCIDR 0x0d04
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#define REG_LIODNR 0x0d08
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#define REG_ERR_ISR 0x0e00
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#define REG_ERR_IER 0x0e04
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#define REG_ERR_ISDR 0x0e08
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/* Used by all error interrupt registers except 'inhibit' */
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#define BM_EIRQ_IVCI 0x00000010 /* Invalid Command Verb */
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#define BM_EIRQ_FLWI 0x00000008 /* FBPR Low Watermark */
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#define BM_EIRQ_MBEI 0x00000004 /* Multi-bit ECC Error */
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#define BM_EIRQ_SBEI 0x00000002 /* Single-bit ECC Error */
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#define BM_EIRQ_BSCN 0x00000001 /* pool State Change Notification */
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struct bman_hwerr_txt {
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u32 mask;
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const char *txt;
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};
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static const struct bman_hwerr_txt bman_hwerr_txts[] = {
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{ BM_EIRQ_IVCI, "Invalid Command Verb" },
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{ BM_EIRQ_FLWI, "FBPR Low Watermark" },
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{ BM_EIRQ_MBEI, "Multi-bit ECC Error" },
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{ BM_EIRQ_SBEI, "Single-bit ECC Error" },
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{ BM_EIRQ_BSCN, "Pool State Change Notification" },
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};
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/* Only trigger low water mark interrupt once only */
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#define BMAN_ERRS_TO_DISABLE BM_EIRQ_FLWI
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/* Pointer to the start of the BMan's CCSR space */
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static u32 __iomem *bm_ccsr_start;
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static inline u32 bm_ccsr_in(u32 offset)
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{
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return ioread32be(bm_ccsr_start + offset/4);
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}
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static inline void bm_ccsr_out(u32 offset, u32 val)
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{
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iowrite32be(val, bm_ccsr_start + offset/4);
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}
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static void bm_get_version(u16 *id, u8 *major, u8 *minor)
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{
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u32 v = bm_ccsr_in(REG_IP_REV_1);
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*id = (v >> 16);
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*major = (v >> 8) & 0xff;
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*minor = v & 0xff;
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}
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/* signal transactions for FBPRs with higher priority */
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#define FBPR_AR_RPRIO_HI BIT(30)
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static void bm_set_memory(u64 ba, u32 size)
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{
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u32 exp = ilog2(size);
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/* choke if size isn't within range */
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DPAA_ASSERT(size >= 4096 && size <= 1024*1024*1024 &&
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is_power_of_2(size));
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/* choke if '[e]ba' has lower-alignment than 'size' */
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DPAA_ASSERT(!(ba & (size - 1)));
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bm_ccsr_out(REG_FBPR_BARE, upper_32_bits(ba));
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bm_ccsr_out(REG_FBPR_BAR, lower_32_bits(ba));
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bm_ccsr_out(REG_FBPR_AR, exp - 1);
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}
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/*
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* Location and size of BMan private memory
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*
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* Ideally we would use the DMA API to turn rmem->base into a DMA address
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* (especially if iommu translations ever get involved). Unfortunately, the
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* DMA API currently does not allow mapping anything that is not backed with
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* a struct page.
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*/
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static dma_addr_t fbpr_a;
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static size_t fbpr_sz;
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static int bman_fbpr(struct reserved_mem *rmem)
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{
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fbpr_a = rmem->base;
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fbpr_sz = rmem->size;
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WARN_ON(!(fbpr_a && fbpr_sz));
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return 0;
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}
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RESERVEDMEM_OF_DECLARE(bman_fbpr, "fsl,bman-fbpr", bman_fbpr);
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static irqreturn_t bman_isr(int irq, void *ptr)
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{
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u32 isr_val, ier_val, ecsr_val, isr_mask, i;
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struct device *dev = ptr;
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ier_val = bm_ccsr_in(REG_ERR_IER);
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isr_val = bm_ccsr_in(REG_ERR_ISR);
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ecsr_val = bm_ccsr_in(REG_ECSR);
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isr_mask = isr_val & ier_val;
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if (!isr_mask)
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return IRQ_NONE;
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for (i = 0; i < ARRAY_SIZE(bman_hwerr_txts); i++) {
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if (bman_hwerr_txts[i].mask & isr_mask) {
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dev_err_ratelimited(dev, "ErrInt: %s\n",
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bman_hwerr_txts[i].txt);
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if (bman_hwerr_txts[i].mask & ecsr_val) {
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/* Re-arm error capture registers */
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bm_ccsr_out(REG_ECSR, ecsr_val);
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}
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if (bman_hwerr_txts[i].mask & BMAN_ERRS_TO_DISABLE) {
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dev_dbg(dev, "Disabling error 0x%x\n",
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bman_hwerr_txts[i].mask);
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ier_val &= ~bman_hwerr_txts[i].mask;
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bm_ccsr_out(REG_ERR_IER, ier_val);
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}
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}
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}
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bm_ccsr_out(REG_ERR_ISR, isr_val);
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return IRQ_HANDLED;
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}
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static int fsl_bman_probe(struct platform_device *pdev)
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{
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int ret, err_irq;
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struct device *dev = &pdev->dev;
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struct device_node *node = dev->of_node;
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struct resource *res;
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u16 id, bm_pool_cnt;
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u8 major, minor;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(dev, "Can't get %s property 'IORESOURCE_MEM'\n",
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node->full_name);
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return -ENXIO;
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}
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bm_ccsr_start = devm_ioremap(dev, res->start,
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res->end - res->start + 1);
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if (!bm_ccsr_start)
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return -ENXIO;
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bm_get_version(&id, &major, &minor);
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if (major == 1 && minor == 0) {
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bman_ip_rev = BMAN_REV10;
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bm_pool_cnt = BM_POOL_MAX;
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} else if (major == 2 && minor == 0) {
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bman_ip_rev = BMAN_REV20;
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bm_pool_cnt = 8;
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} else if (major == 2 && minor == 1) {
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bman_ip_rev = BMAN_REV21;
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bm_pool_cnt = BM_POOL_MAX;
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} else {
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dev_err(dev, "Unknown Bman version:%04x,%02x,%02x\n",
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id, major, minor);
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return -ENODEV;
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}
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bm_set_memory(fbpr_a, fbpr_sz);
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err_irq = platform_get_irq(pdev, 0);
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if (err_irq <= 0) {
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dev_info(dev, "Can't get %s IRQ\n", node->full_name);
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return -ENODEV;
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}
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ret = devm_request_irq(dev, err_irq, bman_isr, IRQF_SHARED, "bman-err",
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dev);
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if (ret) {
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dev_err(dev, "devm_request_irq() failed %d for '%s'\n",
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ret, node->full_name);
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return ret;
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}
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/* Disable Buffer Pool State Change */
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bm_ccsr_out(REG_ERR_ISDR, BM_EIRQ_BSCN);
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/*
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* Write-to-clear any stale bits, (eg. starvation being asserted prior
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* to resource allocation during driver init).
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*/
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bm_ccsr_out(REG_ERR_ISR, 0xffffffff);
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/* Enable Error Interrupts */
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bm_ccsr_out(REG_ERR_IER, 0xffffffff);
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bm_bpalloc = devm_gen_pool_create(dev, 0, -1, "bman-bpalloc");
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if (IS_ERR(bm_bpalloc)) {
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ret = PTR_ERR(bm_bpalloc);
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dev_err(dev, "bman-bpalloc pool init failed (%d)\n", ret);
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return ret;
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}
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/* seed BMan resource pool */
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ret = gen_pool_add(bm_bpalloc, DPAA_GENALLOC_OFF, bm_pool_cnt, -1);
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if (ret) {
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dev_err(dev, "Failed to seed BPID range [%d..%d] (%d)\n",
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0, bm_pool_cnt - 1, ret);
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return ret;
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}
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return 0;
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};
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static const struct of_device_id fsl_bman_ids[] = {
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{
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.compatible = "fsl,bman",
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},
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{}
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};
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static struct platform_driver fsl_bman_driver = {
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.driver = {
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.name = KBUILD_MODNAME,
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.of_match_table = fsl_bman_ids,
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.suppress_bind_attrs = true,
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},
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.probe = fsl_bman_probe,
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};
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builtin_platform_driver(fsl_bman_driver);
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@@ -0,0 +1,219 @@
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/* Copyright 2008 - 2016 Freescale Semiconductor, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
|
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
|
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* notice, this list of conditions and the following disclaimer in the
|
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Freescale Semiconductor nor the
|
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
|
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* GNU General Public License ("GPL") as published by the Free Software
|
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* Foundation, either version 2 of that License or (at your option) any
|
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
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* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "bman_priv.h"
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static struct bman_portal *affine_bportals[NR_CPUS];
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static struct cpumask portal_cpus;
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/* protect bman global registers and global data shared among portals */
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static DEFINE_SPINLOCK(bman_lock);
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static struct bman_portal *init_pcfg(struct bm_portal_config *pcfg)
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{
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struct bman_portal *p = bman_create_affine_portal(pcfg);
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if (!p) {
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dev_crit(pcfg->dev, "%s: Portal failure on cpu %d\n",
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__func__, pcfg->cpu);
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return NULL;
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}
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bman_p_irqsource_add(p, BM_PIRQ_RCRI);
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affine_bportals[pcfg->cpu] = p;
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dev_info(pcfg->dev, "Portal initialised, cpu %d\n", pcfg->cpu);
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return p;
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}
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static void bman_offline_cpu(unsigned int cpu)
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{
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struct bman_portal *p = affine_bportals[cpu];
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const struct bm_portal_config *pcfg;
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if (!p)
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return;
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pcfg = bman_get_bm_portal_config(p);
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if (!pcfg)
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return;
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irq_set_affinity(pcfg->irq, cpumask_of(0));
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}
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static void bman_online_cpu(unsigned int cpu)
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{
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struct bman_portal *p = affine_bportals[cpu];
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const struct bm_portal_config *pcfg;
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if (!p)
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return;
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pcfg = bman_get_bm_portal_config(p);
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if (!pcfg)
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return;
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irq_set_affinity(pcfg->irq, cpumask_of(cpu));
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}
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static int bman_hotplug_cpu_callback(struct notifier_block *nfb,
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unsigned long action, void *hcpu)
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{
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unsigned int cpu = (unsigned long)hcpu;
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switch (action) {
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case CPU_ONLINE:
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case CPU_ONLINE_FROZEN:
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bman_online_cpu(cpu);
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break;
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case CPU_DOWN_PREPARE:
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case CPU_DOWN_PREPARE_FROZEN:
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bman_offline_cpu(cpu);
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}
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return NOTIFY_OK;
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}
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static struct notifier_block bman_hotplug_cpu_notifier = {
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.notifier_call = bman_hotplug_cpu_callback,
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};
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static int bman_portal_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *node = dev->of_node;
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struct bm_portal_config *pcfg;
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struct resource *addr_phys[2];
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void __iomem *va;
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int irq, cpu;
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pcfg = devm_kmalloc(dev, sizeof(*pcfg), GFP_KERNEL);
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if (!pcfg)
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return -ENOMEM;
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pcfg->dev = dev;
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addr_phys[0] = platform_get_resource(pdev, IORESOURCE_MEM,
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DPAA_PORTAL_CE);
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if (!addr_phys[0]) {
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dev_err(dev, "Can't get %s property 'reg::CE'\n",
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node->full_name);
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return -ENXIO;
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}
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addr_phys[1] = platform_get_resource(pdev, IORESOURCE_MEM,
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DPAA_PORTAL_CI);
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if (!addr_phys[1]) {
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dev_err(dev, "Can't get %s property 'reg::CI'\n",
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node->full_name);
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return -ENXIO;
|
||||
}
|
||||
|
||||
pcfg->cpu = -1;
|
||||
|
||||
irq = platform_get_irq(pdev, 0);
|
||||
if (irq <= 0) {
|
||||
dev_err(dev, "Can't get %s IRQ'\n", node->full_name);
|
||||
return -ENXIO;
|
||||
}
|
||||
pcfg->irq = irq;
|
||||
|
||||
va = ioremap_prot(addr_phys[0]->start, resource_size(addr_phys[0]), 0);
|
||||
if (!va)
|
||||
goto err_ioremap1;
|
||||
|
||||
pcfg->addr_virt[DPAA_PORTAL_CE] = va;
|
||||
|
||||
va = ioremap_prot(addr_phys[1]->start, resource_size(addr_phys[1]),
|
||||
_PAGE_GUARDED | _PAGE_NO_CACHE);
|
||||
if (!va)
|
||||
goto err_ioremap2;
|
||||
|
||||
pcfg->addr_virt[DPAA_PORTAL_CI] = va;
|
||||
|
||||
spin_lock(&bman_lock);
|
||||
cpu = cpumask_next_zero(-1, &portal_cpus);
|
||||
if (cpu >= nr_cpu_ids) {
|
||||
/* unassigned portal, skip init */
|
||||
spin_unlock(&bman_lock);
|
||||
return 0;
|
||||
}
|
||||
|
||||
cpumask_set_cpu(cpu, &portal_cpus);
|
||||
spin_unlock(&bman_lock);
|
||||
pcfg->cpu = cpu;
|
||||
|
||||
if (!init_pcfg(pcfg))
|
||||
goto err_ioremap2;
|
||||
|
||||
/* clear irq affinity if assigned cpu is offline */
|
||||
if (!cpu_online(cpu))
|
||||
bman_offline_cpu(cpu);
|
||||
|
||||
return 0;
|
||||
|
||||
err_ioremap2:
|
||||
iounmap(pcfg->addr_virt[DPAA_PORTAL_CE]);
|
||||
err_ioremap1:
|
||||
dev_err(dev, "ioremap failed\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
static const struct of_device_id bman_portal_ids[] = {
|
||||
{
|
||||
.compatible = "fsl,bman-portal",
|
||||
},
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, bman_portal_ids);
|
||||
|
||||
static struct platform_driver bman_portal_driver = {
|
||||
.driver = {
|
||||
.name = KBUILD_MODNAME,
|
||||
.of_match_table = bman_portal_ids,
|
||||
},
|
||||
.probe = bman_portal_probe,
|
||||
};
|
||||
|
||||
static int __init bman_portal_driver_register(struct platform_driver *drv)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = platform_driver_register(drv);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
register_hotcpu_notifier(&bman_hotplug_cpu_notifier);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
module_driver(bman_portal_driver,
|
||||
bman_portal_driver_register, platform_driver_unregister);
|
||||
@@ -0,0 +1,80 @@
|
||||
/* Copyright 2008 - 2016 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
|
||||
|
||||
#include "dpaa_sys.h"
|
||||
|
||||
#include <soc/fsl/bman.h>
|
||||
|
||||
/* Portal processing (interrupt) sources */
|
||||
#define BM_PIRQ_RCRI 0x00000002 /* RCR Ring (below threshold) */
|
||||
|
||||
/* Revision info (for errata and feature handling) */
|
||||
#define BMAN_REV10 0x0100
|
||||
#define BMAN_REV20 0x0200
|
||||
#define BMAN_REV21 0x0201
|
||||
extern u16 bman_ip_rev; /* 0 if uninitialised, otherwise BMAN_REVx */
|
||||
|
||||
extern struct gen_pool *bm_bpalloc;
|
||||
|
||||
struct bm_portal_config {
|
||||
/*
|
||||
* Corenet portal addresses;
|
||||
* [0]==cache-enabled, [1]==cache-inhibited.
|
||||
*/
|
||||
void __iomem *addr_virt[2];
|
||||
/* Allow these to be joined in lists */
|
||||
struct list_head list;
|
||||
struct device *dev;
|
||||
/* User-visible portal configuration settings */
|
||||
/* portal is affined to this cpu */
|
||||
int cpu;
|
||||
/* portal interrupt line */
|
||||
int irq;
|
||||
};
|
||||
|
||||
struct bman_portal *bman_create_affine_portal(
|
||||
const struct bm_portal_config *config);
|
||||
/*
|
||||
* The below bman_p_***() variant might be called in a situation that the cpu
|
||||
* which the portal affine to is not online yet.
|
||||
* @bman_portal specifies which portal the API will use.
|
||||
*/
|
||||
int bman_p_irqsource_add(struct bman_portal *p, u32 bits);
|
||||
|
||||
/*
|
||||
* Used by all portal interrupt registers except 'inhibit'
|
||||
* This mask contains all the "irqsource" bits visible to API users
|
||||
*/
|
||||
#define BM_PIRQ_VISIBLE BM_PIRQ_RCRI
|
||||
|
||||
const struct bm_portal_config *
|
||||
bman_get_bm_portal_config(const struct bman_portal *portal);
|
||||
@@ -0,0 +1,103 @@
|
||||
/* Copyright 2008 - 2016 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef __DPAA_SYS_H
|
||||
#define __DPAA_SYS_H
|
||||
|
||||
#include <linux/cpu.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/kthread.h>
|
||||
#include <linux/vmalloc.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/of_reserved_mem.h>
|
||||
#include <linux/prefetch.h>
|
||||
#include <linux/genalloc.h>
|
||||
#include <asm/cacheflush.h>
|
||||
|
||||
/* For 2-element tables related to cache-inhibited and cache-enabled mappings */
|
||||
#define DPAA_PORTAL_CE 0
|
||||
#define DPAA_PORTAL_CI 1
|
||||
|
||||
#if (L1_CACHE_BYTES != 32) && (L1_CACHE_BYTES != 64)
|
||||
#error "Unsupported Cacheline Size"
|
||||
#endif
|
||||
|
||||
static inline void dpaa_flush(void *p)
|
||||
{
|
||||
#ifdef CONFIG_PPC
|
||||
flush_dcache_range((unsigned long)p, (unsigned long)p+64);
|
||||
#elif defined(CONFIG_ARM32)
|
||||
__cpuc_flush_dcache_area(p, 64);
|
||||
#elif defined(CONFIG_ARM64)
|
||||
__flush_dcache_area(p, 64);
|
||||
#endif
|
||||
}
|
||||
|
||||
#define dpaa_invalidate(p) dpaa_flush(p)
|
||||
|
||||
#define dpaa_zero(p) memset(p, 0, 64)
|
||||
|
||||
static inline void dpaa_touch_ro(void *p)
|
||||
{
|
||||
#if (L1_CACHE_BYTES == 32)
|
||||
prefetch(p+32);
|
||||
#endif
|
||||
prefetch(p);
|
||||
}
|
||||
|
||||
/* Commonly used combo */
|
||||
static inline void dpaa_invalidate_touch_ro(void *p)
|
||||
{
|
||||
dpaa_invalidate(p);
|
||||
dpaa_touch_ro(p);
|
||||
}
|
||||
|
||||
|
||||
#ifdef CONFIG_FSL_DPAA_CHECKING
|
||||
#define DPAA_ASSERT(x) WARN_ON(!(x))
|
||||
#else
|
||||
#define DPAA_ASSERT(x)
|
||||
#endif
|
||||
|
||||
/* cyclic helper for rings */
|
||||
static inline u8 dpaa_cyc_diff(u8 ringsize, u8 first, u8 last)
|
||||
{
|
||||
/* 'first' is included, 'last' is excluded */
|
||||
if (first <= last)
|
||||
return last - first;
|
||||
return ringsize + last - first;
|
||||
}
|
||||
|
||||
/* Offset applied to genalloc pools due to zero being an error return */
|
||||
#define DPAA_GENALLOC_OFF 0x80000000
|
||||
|
||||
#endif /* __DPAA_SYS_H */
|
||||
@@ -0,0 +1,129 @@
|
||||
/* Copyright 2008 - 2016 Freescale Semiconductor, Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef __FSL_BMAN_H
|
||||
#define __FSL_BMAN_H
|
||||
|
||||
/* wrapper for 48-bit buffers */
|
||||
struct bm_buffer {
|
||||
union {
|
||||
struct {
|
||||
__be16 bpid; /* hi 8-bits reserved */
|
||||
__be16 hi; /* High 16-bits of 48-bit address */
|
||||
__be32 lo; /* Low 32-bits of 48-bit address */
|
||||
};
|
||||
__be64 data;
|
||||
};
|
||||
} __aligned(8);
|
||||
/*
|
||||
* Restore the 48 bit address previously stored in BMan
|
||||
* hardware pools as a dma_addr_t
|
||||
*/
|
||||
static inline dma_addr_t bm_buf_addr(const struct bm_buffer *buf)
|
||||
{
|
||||
return be64_to_cpu(buf->data) & 0xffffffffffffLLU;
|
||||
}
|
||||
|
||||
static inline u64 bm_buffer_get64(const struct bm_buffer *buf)
|
||||
{
|
||||
return be64_to_cpu(buf->data) & 0xffffffffffffLLU;
|
||||
}
|
||||
|
||||
static inline void bm_buffer_set64(struct bm_buffer *buf, u64 addr)
|
||||
{
|
||||
buf->hi = cpu_to_be16(upper_32_bits(addr));
|
||||
buf->lo = cpu_to_be32(lower_32_bits(addr));
|
||||
}
|
||||
|
||||
static inline u8 bm_buffer_get_bpid(const struct bm_buffer *buf)
|
||||
{
|
||||
return be16_to_cpu(buf->bpid) & 0xff;
|
||||
}
|
||||
|
||||
static inline void bm_buffer_set_bpid(struct bm_buffer *buf, int bpid)
|
||||
{
|
||||
buf->bpid = cpu_to_be16(bpid & 0xff);
|
||||
}
|
||||
|
||||
/* Managed portal, high-level i/face */
|
||||
|
||||
/* Portal and Buffer Pools */
|
||||
struct bman_portal;
|
||||
struct bman_pool;
|
||||
|
||||
#define BM_POOL_MAX 64 /* max # of buffer pools */
|
||||
|
||||
/**
|
||||
* bman_new_pool - Allocates a Buffer Pool object
|
||||
*
|
||||
* Creates a pool object, and returns a reference to it or NULL on error.
|
||||
*/
|
||||
struct bman_pool *bman_new_pool(void);
|
||||
|
||||
/**
|
||||
* bman_free_pool - Deallocates a Buffer Pool object
|
||||
* @pool: the pool object to release
|
||||
*/
|
||||
void bman_free_pool(struct bman_pool *pool);
|
||||
|
||||
/**
|
||||
* bman_get_bpid - Returns a pool object's BPID.
|
||||
* @pool: the pool object
|
||||
*
|
||||
* The returned value is the index of the encapsulated buffer pool,
|
||||
* in the range of [0, @BM_POOL_MAX-1].
|
||||
*/
|
||||
int bman_get_bpid(const struct bman_pool *pool);
|
||||
|
||||
/**
|
||||
* bman_release - Release buffer(s) to the buffer pool
|
||||
* @pool: the buffer pool object to release to
|
||||
* @bufs: an array of buffers to release
|
||||
* @num: the number of buffers in @bufs (1-8)
|
||||
*
|
||||
* Adds the given buffers to RCR entries. If the RCR ring is unresponsive,
|
||||
* the function will return -ETIMEDOUT. Otherwise, it returns zero.
|
||||
*/
|
||||
int bman_release(struct bman_pool *pool, const struct bm_buffer *bufs, u8 num);
|
||||
|
||||
/**
|
||||
* bman_acquire - Acquire buffer(s) from a buffer pool
|
||||
* @pool: the buffer pool object to acquire from
|
||||
* @bufs: array for storing the acquired buffers
|
||||
* @num: the number of buffers desired (@bufs is at least this big)
|
||||
*
|
||||
* Issues an "Acquire" command via the portal's management command interface.
|
||||
* The return value will be the number of buffers obtained from the pool, or a
|
||||
* negative error code if a h/w error or pool starvation was encountered. In
|
||||
* the latter case, the content of @bufs is undefined.
|
||||
*/
|
||||
int bman_acquire(struct bman_pool *pool, struct bm_buffer *bufs, u8 num);
|
||||
|
||||
#endif /* __FSL_BMAN_H */
|
||||
Reference in New Issue
Block a user