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Merge tag 'fbdev-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux
Pull fbdev updates from Tomi Valkeinen: - ssd1307fb: various fixes and improvements, SSD1305 support - use architecture agnostic functions instead of MTRR functions in various fbdev drivers - TI DRA7xx SoC display support (arch/arm/ side) - OMAPDSS componentization to fix probing order issues - OMAPDSS scaling fixes - msm_fb: remove obsoleted driver * tag 'fbdev-4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux: (77 commits) msm: msm_fb: Remove dead code OMAPDSS: HDMI: wait for framedone when stopping video OMAPDSS: HDMI4: fix error handling OMAPDSS: DISPC: scaler debug print OMAPDSS: DISPC: do only y decimation on OMAP3 OMAPDSS: DISPC: check if scaling setup failed OMAPDSS: DISPC: fix 64 bit issue in 5-tap OMAPDSS: DISPC: fix row_inc for OMAP3 OMAPDSS: DISPC: add check for scaling limits OMAPDSS: DISPC: fix check_horiz_timing_omap3 args OMAPDSS: DISPC: fix predecimation for YUV modes OMAPDSS: DISPC: work-around for errata i631 OMAPDSS: simplify submodule reg/unreg code OMAPDSS: componentize omapdss OMAPDSS: reorder uninit calls OMAPDSS: remove uses of __init/__exit OMAPDSS: fix dss_init_ports error handling OMAPDSS: refactor dss probe function OMAPDSS: move 'dss_initialized' to dss driver fbdev: propagate result of fb_videomode_from_videomode() ...
This commit is contained in:
Linus Torvalds
@@ -182,6 +182,7 @@ skyworks Skyworks Solutions, Inc.
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smsc Standard Microsystems Corporation
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snps Synopsys, Inc.
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solidrun SolidRun
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solomon Solomon Systech Limited
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sony Sony Corporation
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||||
spansion Spansion Inc.
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sprd Spreadtrum Communications Inc.
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|
||||
@@ -2,7 +2,7 @@
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||||
Required properties:
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- compatible: Should be "solomon,<chip>fb-<bus>". The only supported bus for
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now is i2c, and the supported chips are ssd1306 and ssd1307.
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now is i2c, and the supported chips are ssd1305, ssd1306 and ssd1307.
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- reg: Should contain address of the controller on the I2C bus. Most likely
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0x3c or 0x3d
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- pwm: Should contain the pwm to use according to the OF device tree PWM
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@@ -15,6 +15,16 @@ Required properties:
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Optional properties:
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- reset-active-low: Is the reset gpio is active on physical low?
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- solomon,segment-no-remap: Display needs normal (non-inverted) data column
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to segment mapping
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- solomon,com-seq: Display uses sequential COM pin configuration
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- solomon,com-lrremap: Display uses left-right COM pin remap
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- solomon,com-invdir: Display uses inverted COM pin scan direction
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- solomon,com-offset: Number of the COM pin wired to the first display line
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- solomon,prechargep1: Length of deselect period (phase 1) in clock cycles.
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- solomon,prechargep2: Length of precharge period (phase 2) in clock cycles.
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This needs to be the higher, the higher the capacitance
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of the OLED's pixels is
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[0]: Documentation/devicetree/bindings/pwm/pwm.txt
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@@ -26,3 +36,14 @@ ssd1307: oled@3c {
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reset-gpios = <&gpio2 7>;
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reset-active-low;
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};
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ssd1306: oled@3c {
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compatible = "solomon,ssd1306fb-i2c";
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reg = <0x3c>;
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pwms = <&pwm 4 3000>;
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reset-gpios = <&gpio2 7>;
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reset-active-low;
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solomon,com-lrremap;
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solomon,com-invdir;
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solomon,com-offset = <32>;
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};
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@@ -19,6 +19,7 @@
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rtc0 = &mcp_rtc;
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rtc1 = &tps659038_rtc;
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rtc2 = &rtc;
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display0 = &hdmi0;
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};
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memory {
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@@ -103,6 +104,51 @@
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pinctrl-names = "default";
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pinctrl-0 = <&extcon_usb2_pins>;
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};
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hdmi0: connector {
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compatible = "hdmi-connector";
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label = "hdmi";
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type = "a";
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port {
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hdmi_connector_in: endpoint {
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remote-endpoint = <&tpd12s015_out>;
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};
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};
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};
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tpd12s015: encoder {
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compatible = "ti,tpd12s015";
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pinctrl-names = "default";
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pinctrl-0 = <&tpd12s015_pins>;
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gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */
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<&gpio6 28 GPIO_ACTIVE_HIGH>, /* gpio6_28, LS OE */
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<&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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tpd12s015_in: endpoint {
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remote-endpoint = <&hdmi_out>;
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};
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};
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port@1 {
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reg = <1>;
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tpd12s015_out: endpoint {
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remote-endpoint = <&hdmi_connector_in>;
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};
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};
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};
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};
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};
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&dra7_pmx_core {
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@@ -122,6 +168,13 @@
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>;
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};
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hdmi_pins: pinmux_hdmi_pins {
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pinctrl-single,pins = <
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0x408 (PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
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0x40c (PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
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>;
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||||
};
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||||
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i2c3_pins_default: i2c3_pins_default {
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pinctrl-single,pins = <
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0x2a4 (PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */
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@@ -278,6 +331,14 @@
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0x3e8 (PIN_INPUT_PULLUP | MUX_MODE14) /* uart1_ctsn.gpio7_24 */
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>;
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};
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tpd12s015_pins: pinmux_tpd12s015_pins {
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pinctrl-single,pins = <
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0x3b0 (PIN_OUTPUT | MUX_MODE14) /* gpio7_10 CT_CP_HPD */
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0x3b8 (PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
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0x370 (PIN_OUTPUT | MUX_MODE14) /* gpio6_28 LS_OE */
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>;
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};
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};
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&i2c1 {
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@@ -608,3 +669,23 @@
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};
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};
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};
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&dss {
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status = "ok"
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vdda_video-supply = <&ldoln_reg>;
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};
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&hdmi {
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status = "ok"
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vdda-supply = <&ldo3_reg>;
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pinctrl-names = "default";
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pinctrl-0 = <&hdmi_pins>;
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port {
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hdmi_out: endpoint {
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remote-endpoint = <&tpd12s015_in>;
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};
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};
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};
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@@ -131,6 +131,11 @@
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regulator-max-microvolt = <3000000>;
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};
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};
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scm_conf_clocks: clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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dra7_pmx_core: pinmux@1400 {
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@@ -1469,6 +1474,44 @@
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clocks = <&sys_clkin1>;
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status = "disabled";
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};
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dss: dss@58000000 {
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compatible = "ti,dra7-dss";
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/* 'reg' defined in dra72x.dtsi and dra74x.dtsi */
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/* 'clocks' defined in dra72x.dtsi and dra74x.dtsi */
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status = "disabled";
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ti,hwmods = "dss_core";
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/* CTRL_CORE_DSS_PLL_CONTROL */
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syscon-pll-ctrl = <&scm_conf 0x538>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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dispc@58001000 {
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compatible = "ti,dra7-dispc";
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reg = <0x58001000 0x1000>;
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interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
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ti,hwmods = "dss_dispc";
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clocks = <&dss_dss_clk>;
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clock-names = "fck";
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/* CTRL_CORE_SMA_SW_1 */
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syscon-pol = <&scm_conf 0x534>;
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};
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hdmi: encoder@58060000 {
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compatible = "ti,dra7-hdmi";
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reg = <0x58040000 0x200>,
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<0x58040200 0x80>,
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<0x58040300 0x80>,
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<0x58060000 0x19000>;
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reg-names = "wp", "pll", "phy", "core";
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interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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ti,hwmods = "dss_hdmi";
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clocks = <&dss_48mhz_clk>, <&dss_hdmi_clk>;
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clock-names = "fck", "sys_clk";
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};
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};
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};
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thermal_zones: thermal-zones {
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@@ -19,6 +19,10 @@
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reg = <0x80000000 0x40000000>; /* 1024 MB */
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};
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aliases {
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display0 = &hdmi0;
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};
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evm_3v3: fixedregulator-evm_3v3 {
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compatible = "regulator-fixed";
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regulator-name = "evm_3v3";
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@@ -35,6 +39,51 @@
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compatible = "linux,extcon-usb-gpio";
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id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>;
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};
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hdmi0: connector {
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compatible = "hdmi-connector";
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label = "hdmi";
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|
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type = "a";
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||||
port {
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hdmi_connector_in: endpoint {
|
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remote-endpoint = <&tpd12s015_out>;
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};
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};
|
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};
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tpd12s015: encoder {
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compatible = "ti,tpd12s015";
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pinctrl-names = "default";
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pinctrl-0 = <&tpd12s015_pins>;
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gpios = <&pcf_hdmi 4 GPIO_ACTIVE_HIGH>, /* P4, CT CP HPD */
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<&pcf_hdmi 5 GPIO_ACTIVE_HIGH>, /* P5, LS OE */
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<&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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tpd12s015_in: endpoint {
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remote-endpoint = <&hdmi_out>;
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};
|
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};
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port@1 {
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reg = <1>;
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tpd12s015_out: endpoint {
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remote-endpoint = <&hdmi_connector_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
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&dra7_pmx_core {
|
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@@ -45,6 +94,13 @@
|
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>;
|
||||
};
|
||||
|
||||
i2c5_pins: pinmux_i2c5_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x2b4 (PIN_INPUT | MUX_MODE10) /* mcasp1_axr0.i2c5_sda */
|
||||
0x2b8 (PIN_INPUT | MUX_MODE10) /* mcasp1_axr1.i2c5_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
nand_default: nand_default {
|
||||
pinctrl-single,pins = <
|
||||
0x0 (PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */
|
||||
@@ -142,6 +198,19 @@
|
||||
0xb8 (PIN_OUTPUT | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */
|
||||
>;
|
||||
};
|
||||
|
||||
hdmi_pins: pinmux_hdmi_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x408 (PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
|
||||
0x40c (PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
tpd12s015_pins: pinmux_tpd12s015_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x3b8 (PIN_INPUT_PULLDOWN | MUX_MODE14) /* gpio7_12 HPD */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
@@ -277,6 +346,27 @@
|
||||
};
|
||||
};
|
||||
|
||||
&i2c5 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c5_pins>;
|
||||
clock-frequency = <400000>;
|
||||
|
||||
pcf_hdmi: pcf8575@26 {
|
||||
compatible = "nxp,pcf8575";
|
||||
reg = <0x26>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
/*
|
||||
* initial state is used here to keep the mdio interface
|
||||
* selected on RU89 through SEL_VIN4_MUX_S0, VIN2_S1 and
|
||||
* VIN2_S0 driven high otherwise Ethernet stops working
|
||||
* VIN6_SEL_S0 is low, thus selecting McASP3 over VIN6
|
||||
*/
|
||||
lines-initial-states = <0x0f2b>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
};
|
||||
@@ -566,3 +656,23 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dss {
|
||||
status = "ok"
|
||||
|
||||
vdda_video-supply = <&ldo5_reg>;
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
status = "ok"
|
||||
vdda-supply = <&ldo3_reg>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hdmi_pins>;
|
||||
|
||||
port {
|
||||
hdmi_out: endpoint {
|
||||
remote-endpoint = <&tpd12s015_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@@ -34,3 +34,14 @@
|
||||
interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&dss {
|
||||
reg = <0x58000000 0x80>,
|
||||
<0x58004054 0x4>,
|
||||
<0x58004300 0x20>;
|
||||
reg-names = "dss", "pll1_clkctrl", "pll1";
|
||||
|
||||
clocks = <&dss_dss_clk>,
|
||||
<&dss_video1_clk>;
|
||||
clock-names = "fck", "video1_clk";
|
||||
};
|
||||
|
||||
@@ -73,3 +73,18 @@
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dss {
|
||||
reg = <0x58000000 0x80>,
|
||||
<0x58004054 0x4>,
|
||||
<0x58004300 0x20>,
|
||||
<0x58005054 0x4>,
|
||||
<0x58005300 0x20>;
|
||||
reg-names = "dss", "pll1_clkctrl", "pll1",
|
||||
"pll2_clkctrl", "pll2";
|
||||
|
||||
clocks = <&dss_dss_clk>,
|
||||
<&dss_video1_clk>,
|
||||
<&dss_video2_clk>;
|
||||
clock-names = "fck", "video1_clk", "video2_clk";
|
||||
};
|
||||
|
||||
@@ -1531,6 +1531,7 @@
|
||||
clocks = <&dpll_per_h12x2_ck>;
|
||||
ti,bit-shift = <8>;
|
||||
reg = <0x1120>;
|
||||
ti,set-rate-parent;
|
||||
};
|
||||
|
||||
dss_hdmi_clk: dss_hdmi_clk {
|
||||
@@ -2136,3 +2137,13 @@
|
||||
clocks = <&dpll_usb_ck>;
|
||||
};
|
||||
};
|
||||
|
||||
&scm_conf_clocks {
|
||||
dss_deshdcp_clk: dss_deshdcp_clk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,gate-clock";
|
||||
clocks = <&l3_iclk_div>;
|
||||
ti,bit-shift = <0>;
|
||||
reg = <0x558>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -99,6 +99,9 @@
|
||||
solomon,height = <32>;
|
||||
solomon,width = <128>;
|
||||
solomon,page-offset = <0>;
|
||||
solomon,com-lrremap;
|
||||
solomon,com-invdir;
|
||||
solomon,com-offset = <32>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -287,6 +287,8 @@ static enum omapdss_version __init omap_display_get_version(void)
|
||||
return OMAPDSS_VER_OMAP5;
|
||||
else if (soc_is_am43xx())
|
||||
return OMAPDSS_VER_AM43xx;
|
||||
else if (soc_is_dra7xx())
|
||||
return OMAPDSS_VER_DRA7xx;
|
||||
else
|
||||
return OMAPDSS_VER_UNKNOWN;
|
||||
}
|
||||
@@ -568,25 +570,25 @@ void __init omapdss_early_init_of(void)
|
||||
|
||||
}
|
||||
|
||||
static const char * const omapdss_compat_names[] __initconst = {
|
||||
"ti,omap2-dss",
|
||||
"ti,omap3-dss",
|
||||
"ti,omap4-dss",
|
||||
"ti,omap5-dss",
|
||||
"ti,dra7-dss",
|
||||
};
|
||||
|
||||
struct device_node * __init omapdss_find_dss_of_node(void)
|
||||
{
|
||||
struct device_node *node;
|
||||
int i;
|
||||
|
||||
node = of_find_compatible_node(NULL, NULL, "ti,omap2-dss");
|
||||
if (node)
|
||||
return node;
|
||||
|
||||
node = of_find_compatible_node(NULL, NULL, "ti,omap3-dss");
|
||||
if (node)
|
||||
return node;
|
||||
|
||||
node = of_find_compatible_node(NULL, NULL, "ti,omap4-dss");
|
||||
if (node)
|
||||
return node;
|
||||
|
||||
node = of_find_compatible_node(NULL, NULL, "ti,omap5-dss");
|
||||
if (node)
|
||||
return node;
|
||||
for (i = 0; i < ARRAY_SIZE(omapdss_compat_names); ++i) {
|
||||
node = of_find_compatible_node(NULL, NULL,
|
||||
omapdss_compat_names[i]);
|
||||
if (node)
|
||||
return node;
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
@@ -48,6 +48,27 @@
|
||||
* IP blocks
|
||||
*/
|
||||
|
||||
/*
|
||||
* 'dmm' class
|
||||
* instance(s): dmm
|
||||
*/
|
||||
static struct omap_hwmod_class dra7xx_dmm_hwmod_class = {
|
||||
.name = "dmm",
|
||||
};
|
||||
|
||||
/* dmm */
|
||||
static struct omap_hwmod dra7xx_dmm_hwmod = {
|
||||
.name = "dmm",
|
||||
.class = &dra7xx_dmm_hwmod_class,
|
||||
.clkdm_name = "emif_clkdm",
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_offs = DRA7XX_CM_EMIF_DMM_CLKCTRL_OFFSET,
|
||||
.context_offs = DRA7XX_RM_EMIF_DMM_CONTEXT_OFFSET,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* 'l3' class
|
||||
* instance(s): l3_instr, l3_main_1, l3_main_2
|
||||
@@ -438,6 +459,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = {
|
||||
{ .role = "video2_clk", .clk = "dss_video2_clk" },
|
||||
{ .role = "video1_clk", .clk = "dss_video1_clk" },
|
||||
{ .role = "hdmi_clk", .clk = "dss_hdmi_clk" },
|
||||
{ .role = "hdcp_clk", .clk = "dss_deshdcp_clk" },
|
||||
};
|
||||
|
||||
static struct omap_hwmod dra7xx_dss_hwmod = {
|
||||
@@ -500,6 +522,7 @@ static struct omap_hwmod dra7xx_dss_dispc_hwmod = {
|
||||
},
|
||||
},
|
||||
.dev_attr = &dss_dispc_dev_attr,
|
||||
.parent_hwmod = &dra7xx_dss_hwmod,
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -541,6 +564,7 @@ static struct omap_hwmod dra7xx_dss_hdmi_hwmod = {
|
||||
},
|
||||
.opt_clks = dss_hdmi_opt_clks,
|
||||
.opt_clks_cnt = ARRAY_SIZE(dss_hdmi_opt_clks),
|
||||
.parent_hwmod = &dra7xx_dss_hwmod,
|
||||
};
|
||||
|
||||
/*
|
||||
@@ -2321,6 +2345,14 @@ static struct omap_hwmod dra7xx_wd_timer2_hwmod = {
|
||||
* Interfaces
|
||||
*/
|
||||
|
||||
/* l3_main_1 -> dmm */
|
||||
static struct omap_hwmod_ocp_if dra7xx_l3_main_1__dmm = {
|
||||
.master = &dra7xx_l3_main_1_hwmod,
|
||||
.slave = &dra7xx_dmm_hwmod,
|
||||
.clk = "l3_iclk_div",
|
||||
.user = OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* l3_main_2 -> l3_instr */
|
||||
static struct omap_hwmod_ocp_if dra7xx_l3_main_2__l3_instr = {
|
||||
.master = &dra7xx_l3_main_2_hwmod,
|
||||
@@ -3289,6 +3321,7 @@ static struct omap_hwmod_ocp_if dra7xx_l4_wkup__wd_timer2 = {
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
|
||||
&dra7xx_l3_main_1__dmm,
|
||||
&dra7xx_l3_main_2__l3_instr,
|
||||
&dra7xx_l4_cfg__l3_main_1,
|
||||
&dra7xx_mpu__l3_main_1,
|
||||
|
||||
@@ -305,13 +305,14 @@ static struct ti_dt_clk dra7xx_clks[] = {
|
||||
DT_CLK("4882c000.timer", "timer_sys_ck", "timer_sys_clk_div"),
|
||||
DT_CLK("4882e000.timer", "timer_sys_ck", "timer_sys_clk_div"),
|
||||
DT_CLK(NULL, "sys_clkin", "sys_clkin1"),
|
||||
DT_CLK(NULL, "dss_deshdcp_clk", "dss_deshdcp_clk"),
|
||||
{ .node_name = NULL },
|
||||
};
|
||||
|
||||
int __init dra7xx_dt_clk_init(void)
|
||||
{
|
||||
int rc;
|
||||
struct clk *abe_dpll_mux, *sys_clkin2, *dpll_ck;
|
||||
struct clk *abe_dpll_mux, *sys_clkin2, *dpll_ck, *hdcp_ck;
|
||||
|
||||
ti_dt_clocks_register(dra7xx_clks);
|
||||
|
||||
@@ -347,5 +348,10 @@ int __init dra7xx_dt_clk_init(void)
|
||||
if (rc)
|
||||
pr_err("%s: failed to set USB_DPLL M2 OUT\n", __func__);
|
||||
|
||||
hdcp_ck = clk_get_sys(NULL, "dss_deshdcp_clk");
|
||||
rc = clk_prepare_enable(hdcp_ck);
|
||||
if (rc)
|
||||
pr_err("%s: failed to set dss_deshdcp_clk\n", __func__);
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
@@ -687,7 +687,7 @@ static int newport_scroll(struct vc_data *vc, int t, int b, int dir,
|
||||
static void newport_bmove(struct vc_data *vc, int sy, int sx, int dy,
|
||||
int dx, int h, int w)
|
||||
{
|
||||
short xs, ys, xe, ye, xoffs, yoffs, tmp;
|
||||
short xs, ys, xe, ye, xoffs, yoffs;
|
||||
|
||||
xs = sx << 3;
|
||||
xe = ((sx + w) << 3) - 1;
|
||||
@@ -701,9 +701,7 @@ static void newport_bmove(struct vc_data *vc, int sy, int sx, int dy,
|
||||
yoffs = (dy - sy) << 4;
|
||||
if (xoffs > 0) {
|
||||
/* move to the right, exchange starting points */
|
||||
tmp = xe;
|
||||
xe = xs;
|
||||
xs = tmp;
|
||||
swap(xe, xs);
|
||||
}
|
||||
newport_wait(npregs);
|
||||
npregs->set.drawmode0 = (NPORT_DMODE0_S2S | NPORT_DMODE0_BLOCK |
|
||||
|
||||
@@ -2326,13 +2326,6 @@ config FB_PRE_INIT_FB
|
||||
Select this option if display contents should be inherited as set by
|
||||
the bootloader.
|
||||
|
||||
config FB_MSM
|
||||
tristate "MSM Framebuffer support"
|
||||
depends on FB && ARCH_MSM
|
||||
select FB_CFB_FILLRECT
|
||||
select FB_CFB_COPYAREA
|
||||
select FB_CFB_IMAGEBLIT
|
||||
|
||||
config FB_MX3
|
||||
tristate "MX3 Framebuffer support"
|
||||
depends on FB && MX3_IPU
|
||||
@@ -2478,6 +2471,7 @@ config FB_SSD1307
|
||||
select FB_SYS_IMAGEBLIT
|
||||
select FB_DEFERRED_IO
|
||||
select PWM
|
||||
select FB_BACKLIGHT
|
||||
help
|
||||
This driver implements support for the Solomon SSD1307
|
||||
OLED controller over I2C.
|
||||
|
||||
@@ -126,7 +126,6 @@ obj-y += omap2/
|
||||
obj-$(CONFIG_XEN_FBDEV_FRONTEND) += xen-fbfront.o
|
||||
obj-$(CONFIG_FB_CARMINE) += carminefb.o
|
||||
obj-$(CONFIG_FB_MB862XX) += mb862xx/
|
||||
obj-$(CONFIG_FB_MSM) += msm/
|
||||
obj-$(CONFIG_FB_NUC900) += nuc900fb.o
|
||||
obj-$(CONFIG_FB_JZ4740) += jz4740_fb.o
|
||||
obj-$(CONFIG_FB_PUV3_UNIGFX) += fb-puv3.o
|
||||
|
||||
@@ -2052,7 +2052,7 @@ static void ami_set_sprite(const struct amifb_par *par)
|
||||
{
|
||||
copins *copl, *cops;
|
||||
u_short hs, vs, ve;
|
||||
u_long pl, ps, pt;
|
||||
u_long pl, ps;
|
||||
short mx, my;
|
||||
|
||||
cops = copdisplay.list[currentcop][0];
|
||||
@@ -2078,7 +2078,7 @@ static void ami_set_sprite(const struct amifb_par *par)
|
||||
if (mod2(vs)) {
|
||||
lofsprite[1 << par->crsr.fmode] = spr2hw_ctl(vs, hs, ve);
|
||||
shfsprite[1 << par->crsr.fmode] = spr2hw_ctl(vs + 1, hs, ve + 1);
|
||||
pt = pl; pl = ps; ps = pt;
|
||||
swap(pl, ps);
|
||||
} else {
|
||||
lofsprite[1 << par->crsr.fmode] = spr2hw_ctl(vs, hs, ve + 1);
|
||||
shfsprite[1 << par->crsr.fmode] = spr2hw_ctl(vs + 1, hs, ve);
|
||||
|
||||
@@ -1266,7 +1266,8 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev)
|
||||
goto stop_clk;
|
||||
}
|
||||
|
||||
info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
|
||||
info->screen_base = ioremap_wc(info->fix.smem_start,
|
||||
info->fix.smem_len);
|
||||
if (!info->screen_base) {
|
||||
ret = -ENOMEM;
|
||||
goto release_intmem;
|
||||
|
||||
@@ -80,10 +80,6 @@
|
||||
#include <asm/btext.h>
|
||||
#endif /* CONFIG_BOOTX_TEXT */
|
||||
|
||||
#ifdef CONFIG_MTRR
|
||||
#include <asm/mtrr.h>
|
||||
#endif
|
||||
|
||||
#include <video/aty128.h>
|
||||
|
||||
/* Debug flag */
|
||||
@@ -399,10 +395,7 @@ static int default_cmode = CMODE_8;
|
||||
|
||||
static int default_crt_on = 0;
|
||||
static int default_lcd_on = 1;
|
||||
|
||||
#ifdef CONFIG_MTRR
|
||||
static bool mtrr = true;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_FB_ATY128_BACKLIGHT
|
||||
#ifdef CONFIG_PMAC_BACKLIGHT
|
||||
@@ -456,9 +449,7 @@ struct aty128fb_par {
|
||||
u32 vram_size; /* onboard video ram */
|
||||
int chip_gen;
|
||||
const struct aty128_meminfo *mem; /* onboard mem info */
|
||||
#ifdef CONFIG_MTRR
|
||||
struct { int vram; int vram_valid; } mtrr;
|
||||
#endif
|
||||
int wc_cookie;
|
||||
int blitter_may_be_busy;
|
||||
int fifo_slots; /* free slots in FIFO (64 max) */
|
||||
|
||||
@@ -1725,12 +1716,10 @@ static int aty128fb_setup(char *options)
|
||||
#endif
|
||||
continue;
|
||||
}
|
||||
#ifdef CONFIG_MTRR
|
||||
if(!strncmp(this_opt, "nomtrr", 6)) {
|
||||
mtrr = 0;
|
||||
continue;
|
||||
}
|
||||
#endif
|
||||
#ifdef CONFIG_PPC_PMAC
|
||||
/* vmode and cmode deprecated */
|
||||
if (!strncmp(this_opt, "vmode:", 6)) {
|
||||
@@ -2133,7 +2122,7 @@ static int aty128_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
par->vram_size = aty_ld_le32(CNFG_MEMSIZE) & 0x03FFFFFF;
|
||||
|
||||
/* Virtualize the framebuffer */
|
||||
info->screen_base = ioremap(fb_addr, par->vram_size);
|
||||
info->screen_base = ioremap_wc(fb_addr, par->vram_size);
|
||||
if (!info->screen_base)
|
||||
goto err_unmap_out;
|
||||
|
||||
@@ -2170,15 +2159,9 @@ static int aty128_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
|
||||
if (!aty128_init(pdev, ent))
|
||||
goto err_out;
|
||||
|
||||
#ifdef CONFIG_MTRR
|
||||
if (mtrr) {
|
||||
par->mtrr.vram = mtrr_add(info->fix.smem_start,
|
||||
par->vram_size, MTRR_TYPE_WRCOMB, 1);
|
||||
par->mtrr.vram_valid = 1;
|
||||
/* let there be speed */
|
||||
printk(KERN_INFO "aty128fb: Rage128 MTRR set to ON\n");
|
||||
}
|
||||
#endif /* CONFIG_MTRR */
|
||||
if (mtrr)
|
||||
par->wc_cookie = arch_phys_wc_add(info->fix.smem_start,
|
||||
par->vram_size);
|
||||
return 0;
|
||||
|
||||
err_out:
|
||||
@@ -2212,11 +2195,7 @@ static void aty128_remove(struct pci_dev *pdev)
|
||||
aty128_bl_exit(info->bl_dev);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MTRR
|
||||
if (par->mtrr.vram_valid)
|
||||
mtrr_del(par->mtrr.vram, info->fix.smem_start,
|
||||
par->vram_size);
|
||||
#endif /* CONFIG_MTRR */
|
||||
arch_phys_wc_del(par->wc_cookie);
|
||||
iounmap(par->regbase);
|
||||
iounmap(info->screen_base);
|
||||
|
||||
@@ -2625,8 +2604,5 @@ MODULE_DESCRIPTION("FBDev driver for ATI Rage128 / Pro cards");
|
||||
MODULE_LICENSE("GPL");
|
||||
module_param(mode_option, charp, 0);
|
||||
MODULE_PARM_DESC(mode_option, "Specify resolution as \"<xres>x<yres>[-<bpp>][@<refresh>]\" ");
|
||||
#ifdef CONFIG_MTRR
|
||||
module_param_named(nomtrr, mtrr, invbool, 0);
|
||||
MODULE_PARM_DESC(nomtrr, "bool: Disable MTRR support (0 or 1=disabled) (default=0)");
|
||||
#endif
|
||||
|
||||
|
||||
@@ -85,10 +85,6 @@
|
||||
|
||||
#endif /* CONFIG_PPC */
|
||||
|
||||
#ifdef CONFIG_MTRR
|
||||
#include <asm/mtrr.h>
|
||||
#endif
|
||||
|
||||
#include <video/radeon.h>
|
||||
#include <linux/radeonfb.h>
|
||||
|
||||
@@ -271,9 +267,7 @@ static bool mirror = 0;
|
||||
static int panel_yres = 0;
|
||||
static bool force_dfp = 0;
|
||||
static bool force_measure_pll = 0;
|
||||
#ifdef CONFIG_MTRR
|
||||
static bool nomtrr = 0;
|
||||
#endif
|
||||
static bool force_sleep;
|
||||
static bool ignore_devlist;
|
||||
#ifdef CONFIG_PMAC_BACKLIGHT
|
||||
@@ -2260,8 +2254,8 @@ static int radeonfb_pci_register(struct pci_dev *pdev,
|
||||
rinfo->mapped_vram = min_t(unsigned long, MAX_MAPPED_VRAM, rinfo->video_ram);
|
||||
|
||||
do {
|
||||
rinfo->fb_base = ioremap (rinfo->fb_base_phys,
|
||||
rinfo->mapped_vram);
|
||||
rinfo->fb_base = ioremap_wc(rinfo->fb_base_phys,
|
||||
rinfo->mapped_vram);
|
||||
} while (rinfo->fb_base == NULL &&
|
||||
((rinfo->mapped_vram /= 2) >= MIN_MAPPED_VRAM));
|
||||
|
||||
@@ -2359,11 +2353,9 @@ static int radeonfb_pci_register(struct pci_dev *pdev,
|
||||
goto err_unmap_fb;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MTRR
|
||||
rinfo->mtrr_hdl = nomtrr ? -1 : mtrr_add(rinfo->fb_base_phys,
|
||||
rinfo->video_ram,
|
||||
MTRR_TYPE_WRCOMB, 1);
|
||||
#endif
|
||||
if (!nomtrr)
|
||||
rinfo->wc_cookie = arch_phys_wc_add(rinfo->fb_base_phys,
|
||||
rinfo->video_ram);
|
||||
|
||||
if (backlight)
|
||||
radeonfb_bl_init(rinfo);
|
||||
@@ -2428,12 +2420,7 @@ static void radeonfb_pci_unregister(struct pci_dev *pdev)
|
||||
#endif
|
||||
|
||||
del_timer_sync(&rinfo->lvds_timer);
|
||||
|
||||
#ifdef CONFIG_MTRR
|
||||
if (rinfo->mtrr_hdl >= 0)
|
||||
mtrr_del(rinfo->mtrr_hdl, 0, 0);
|
||||
#endif
|
||||
|
||||
arch_phys_wc_del(rinfo->wc_cookie);
|
||||
unregister_framebuffer(info);
|
||||
|
||||
radeonfb_bl_exit(rinfo);
|
||||
@@ -2489,10 +2476,8 @@ static int __init radeonfb_setup (char *options)
|
||||
panel_yres = simple_strtoul((this_opt+11), NULL, 0);
|
||||
} else if (!strncmp(this_opt, "backlight:", 10)) {
|
||||
backlight = simple_strtoul(this_opt+10, NULL, 0);
|
||||
#ifdef CONFIG_MTRR
|
||||
} else if (!strncmp(this_opt, "nomtrr", 6)) {
|
||||
nomtrr = 1;
|
||||
#endif
|
||||
} else if (!strncmp(this_opt, "nomodeset", 9)) {
|
||||
nomodeset = 1;
|
||||
} else if (!strncmp(this_opt, "force_measure_pll", 17)) {
|
||||
@@ -2552,10 +2537,8 @@ module_param(monitor_layout, charp, 0);
|
||||
MODULE_PARM_DESC(monitor_layout, "Specify monitor mapping (like XFree86)");
|
||||
module_param(force_measure_pll, bool, 0);
|
||||
MODULE_PARM_DESC(force_measure_pll, "Force measurement of PLL (debug)");
|
||||
#ifdef CONFIG_MTRR
|
||||
module_param(nomtrr, bool, 0);
|
||||
MODULE_PARM_DESC(nomtrr, "bool: disable use of MTRR registers");
|
||||
#endif
|
||||
module_param(panel_yres, int, 0);
|
||||
MODULE_PARM_DESC(panel_yres, "int: set panel yres");
|
||||
module_param(mode_option, charp, 0);
|
||||
|
||||
@@ -340,7 +340,7 @@ struct radeonfb_info {
|
||||
|
||||
struct pll_info pll;
|
||||
|
||||
int mtrr_hdl;
|
||||
int wc_cookie;
|
||||
|
||||
u32 save_regs[100];
|
||||
int asleep;
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user