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drm/nouveau/devinit: convert to new-style nvkm_subdev

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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs
2015-08-20 14:54:20 +10:00
parent 6625f55c08
commit 151abd44c2
32 changed files with 434 additions and 476 deletions
Download Patch File Download Diff File Expand all files Collapse all files
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/init.h
+1
View File
@@ -1,5 +1,6 @@
#ifndef __NVBIOS_INIT_H__
#define __NVBIOS_INIT_H__
struct nvbios_init {
struct nvkm_subdev *subdev;
struct nvkm_bios *bios;
drivers/gpu/drm/nouveau/include/nvkm/subdev/devinit.h
+19 -21
View File
@@ -1,32 +1,30 @@
#ifndef __NVKM_DEVINIT_H__
#define __NVKM_DEVINIT_H__
#include <core/subdev.h>
struct nvkm_devinit;
struct nvkm_devinit {
const struct nvkm_devinit_func *func;
struct nvkm_subdev subdev;
bool post;
void (*meminit)(struct nvkm_devinit *);
int (*pll_set)(struct nvkm_devinit *, u32 type, u32 freq);
u32 (*mmio)(struct nvkm_devinit *, u32 addr);
};
static inline struct nvkm_devinit *
nvkm_devinit(void *obj)
{
return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_DEVINIT);
}
u32 nvkm_devinit_mmio(struct nvkm_devinit *, u32 addr);
int nvkm_devinit_pll_set(struct nvkm_devinit *, u32 type, u32 khz);
void nvkm_devinit_meminit(struct nvkm_devinit *);
u64 nvkm_devinit_disable(struct nvkm_devinit *);
extern struct nvkm_oclass *nv04_devinit_oclass;
extern struct nvkm_oclass *nv05_devinit_oclass;
extern struct nvkm_oclass *nv10_devinit_oclass;
extern struct nvkm_oclass *nv1a_devinit_oclass;
extern struct nvkm_oclass *nv20_devinit_oclass;
extern struct nvkm_oclass *nv50_devinit_oclass;
extern struct nvkm_oclass *g84_devinit_oclass;
extern struct nvkm_oclass *g98_devinit_oclass;
extern struct nvkm_oclass *gt215_devinit_oclass;
extern struct nvkm_oclass *mcp89_devinit_oclass;
extern struct nvkm_oclass *gf100_devinit_oclass;
extern struct nvkm_oclass *gm107_devinit_oclass;
extern struct nvkm_oclass *gm204_devinit_oclass;
int nv04_devinit_new(struct nvkm_device *, int, struct nvkm_devinit **);
int nv05_devinit_new(struct nvkm_device *, int, struct nvkm_devinit **);
int nv10_devinit_new(struct nvkm_device *, int, struct nvkm_devinit **);
int nv1a_devinit_new(struct nvkm_device *, int, struct nvkm_devinit **);
int nv20_devinit_new(struct nvkm_device *, int, struct nvkm_devinit **);
int nv50_devinit_new(struct nvkm_device *, int, struct nvkm_devinit **);
int g84_devinit_new(struct nvkm_device *, int, struct nvkm_devinit **);
int g98_devinit_new(struct nvkm_device *, int, struct nvkm_devinit **);
int gt215_devinit_new(struct nvkm_device *, int, struct nvkm_devinit **);
int mcp89_devinit_new(struct nvkm_device *, int, struct nvkm_devinit **);
int gf100_devinit_new(struct nvkm_device *, int, struct nvkm_devinit **);
int gm107_devinit_new(struct nvkm_device *, int, struct nvkm_devinit **);
int gm204_devinit_new(struct nvkm_device *, int, struct nvkm_devinit **);
#endif
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+67 -67
View File
File diff suppressed because it is too large Load Diff
drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c
-9
View File
@@ -33,7 +33,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = gf100_fb_oclass;
@@ -61,7 +60,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = gf100_fb_oclass;
@@ -89,7 +87,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = gf100_fb_oclass;
@@ -116,7 +113,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = gf100_fb_oclass;
@@ -144,7 +140,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = gf100_fb_oclass;
@@ -171,7 +166,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = gf100_fb_oclass;
@@ -198,7 +192,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = gf100_fb_oclass;
@@ -226,7 +219,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = gf100_fb_oclass;
@@ -253,7 +245,6 @@ gf100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = gf100_fb_oclass;
drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c
-7
View File
@@ -33,7 +33,6 @@ gk104_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
@@ -62,7 +61,6 @@ gk104_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
@@ -91,7 +89,6 @@ gk104_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
@@ -138,7 +135,6 @@ gk104_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
@@ -167,7 +163,6 @@ gk104_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
@@ -196,7 +191,6 @@ gk104_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
@@ -224,7 +218,6 @@ gk104_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &gf100_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = gf100_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = gk104_fb_oclass;
drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
-3
View File
@@ -33,7 +33,6 @@ gm100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = gm107_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = gm107_fb_oclass;
@@ -72,7 +71,6 @@ gm100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
#endif
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = gm204_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = gm107_fb_oclass;
@@ -108,7 +106,6 @@ gm100_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
#endif
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = gm204_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = gm107_fb_oclass;
drivers/gpu/drm/nouveau/nvkm/engine/device/nv04.c
-2
View File
@@ -29,7 +29,6 @@ nv04_identify(struct nvkm_device *device)
switch (device->chipset) {
case 0x04:
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv04_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv04_fb_oclass;
@@ -43,7 +42,6 @@ nv04_identify(struct nvkm_device *device)
break;
case 0x05:
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv05_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv04_fb_oclass;
drivers/gpu/drm/nouveau/nvkm/engine/device/nv10.c
-8
View File
@@ -30,7 +30,6 @@ nv10_identify(struct nvkm_device *device)
case 0x10:
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv10_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv10_fb_oclass;
@@ -43,7 +42,6 @@ nv10_identify(struct nvkm_device *device)
case 0x15:
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv10_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv10_fb_oclass;
@@ -58,7 +56,6 @@ nv10_identify(struct nvkm_device *device)
case 0x16:
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv10_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv10_fb_oclass;
@@ -73,7 +70,6 @@ nv10_identify(struct nvkm_device *device)
case 0x1a:
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv1a_fb_oclass;
@@ -88,7 +84,6 @@ nv10_identify(struct nvkm_device *device)
case 0x11:
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv10_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv10_fb_oclass;
@@ -103,7 +98,6 @@ nv10_identify(struct nvkm_device *device)
case 0x17:
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv10_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv10_fb_oclass;
@@ -118,7 +112,6 @@ nv10_identify(struct nvkm_device *device)
case 0x1f:
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv1a_fb_oclass;
@@ -133,7 +126,6 @@ nv10_identify(struct nvkm_device *device)
case 0x18:
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv10_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv10_fb_oclass;
drivers/gpu/drm/nouveau/nvkm/engine/device/nv20.c
-4
View File
@@ -30,7 +30,6 @@ nv20_identify(struct nvkm_device *device)
case 0x20:
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv20_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv20_fb_oclass;
@@ -45,7 +44,6 @@ nv20_identify(struct nvkm_device *device)
case 0x25:
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv20_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv25_fb_oclass;
@@ -60,7 +58,6 @@ nv20_identify(struct nvkm_device *device)
case 0x28:
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv20_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv25_fb_oclass;
@@ -75,7 +72,6 @@ nv20_identify(struct nvkm_device *device)
case 0x2a:
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv20_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv25_fb_oclass;
drivers/gpu/drm/nouveau/nvkm/engine/device/nv30.c
-5
View File
@@ -30,7 +30,6 @@ nv30_identify(struct nvkm_device *device)
case 0x30:
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv20_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv30_fb_oclass;
@@ -45,7 +44,6 @@ nv30_identify(struct nvkm_device *device)
case 0x35:
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv20_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv35_fb_oclass;
@@ -60,7 +58,6 @@ nv30_identify(struct nvkm_device *device)
case 0x31:
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv20_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv30_fb_oclass;
@@ -76,7 +73,6 @@ nv30_identify(struct nvkm_device *device)
case 0x36:
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv20_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv36_fb_oclass;
@@ -92,7 +88,6 @@ nv30_identify(struct nvkm_device *device)
case 0x34:
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv10_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv10_fb_oclass;
drivers/gpu/drm/nouveau/nvkm/engine/device/nv40.c
-16
View File
@@ -31,7 +31,6 @@ nv40_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv40_fb_oclass;
@@ -50,7 +49,6 @@ nv40_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv41_fb_oclass;
@@ -69,7 +67,6 @@ nv40_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv41_fb_oclass;
@@ -88,7 +85,6 @@ nv40_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv41_fb_oclass;
@@ -107,7 +103,6 @@ nv40_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv40_fb_oclass;
@@ -126,7 +121,6 @@ nv40_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv47_fb_oclass;
@@ -145,7 +139,6 @@ nv40_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv49_fb_oclass;
@@ -164,7 +157,6 @@ nv40_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv49_fb_oclass;
@@ -183,7 +175,6 @@ nv40_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv44_fb_oclass;
@@ -202,7 +193,6 @@ nv40_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv46_fb_oclass;
@@ -221,7 +211,6 @@ nv40_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv44_fb_oclass;
@@ -240,7 +229,6 @@ nv40_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv46_fb_oclass;
@@ -259,7 +247,6 @@ nv40_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv4e_i2c_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv4e_fb_oclass;
@@ -278,7 +265,6 @@ nv40_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv46_fb_oclass;
@@ -297,7 +283,6 @@ nv40_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv46_fb_oclass;
@@ -316,7 +301,6 @@ nv40_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_GPIO ] = nv10_gpio_oclass;
device->oclass[NVDEV_SUBDEV_I2C ] = nv04_i2c_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv1a_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv4c_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv46_fb_oclass;
drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c
-14
View File
@@ -33,7 +33,6 @@ nv50_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &nv50_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = nv50_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = nv50_fb_oclass;
@@ -54,7 +53,6 @@ nv50_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = g84_fb_oclass;
@@ -78,7 +76,6 @@ nv50_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = g84_fb_oclass;
@@ -102,7 +99,6 @@ nv50_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = g84_fb_oclass;
@@ -126,7 +122,6 @@ nv50_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = g94_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = g84_fb_oclass;
@@ -150,7 +145,6 @@ nv50_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = g94_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = g84_fb_oclass;
@@ -174,7 +168,6 @@ nv50_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = g98_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = g84_fb_oclass;
@@ -198,7 +191,6 @@ nv50_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = g84_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = g84_fb_oclass;
@@ -222,7 +214,6 @@ nv50_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = g98_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = mcp77_fb_oclass;
@@ -246,7 +237,6 @@ nv50_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = g98_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = mcp77_fb_oclass;
@@ -270,7 +260,6 @@ nv50_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = gt215_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = gt215_fb_oclass;
@@ -296,7 +285,6 @@ nv50_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = gt215_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = gt215_fb_oclass;
@@ -321,7 +309,6 @@ nv50_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = gt215_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = gt215_fb_oclass;
@@ -346,7 +333,6 @@ nv50_identify(struct nvkm_device *device)
device->oclass[NVDEV_SUBDEV_FUSE ] = &nv50_fuse_oclass;
device->oclass[NVDEV_SUBDEV_THERM ] = &gt215_therm_oclass;
device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
device->oclass[NVDEV_SUBDEV_DEVINIT] = mcp89_devinit_oclass;
device->oclass[NVDEV_SUBDEV_MC ] = g98_mc_oclass;
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
device->oclass[NVDEV_SUBDEV_FB ] = mcp89_fb_oclass;
drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c
+1 -1
View File
@@ -236,7 +236,7 @@ gf119_disp_intr_unk2_1(struct nv50_disp *disp, int head)
struct nvkm_devinit *devinit = device->devinit;
u32 pclk = nvkm_rd32(device, 0x660450 + (head * 0x300)) / 1000;
if (pclk)
devinit->pll_set(devinit, PLL_VPLL0 + head, pclk);
nvkm_devinit_pll_set(devinit, PLL_VPLL0 + head, pclk);
nvkm_wr32(device, 0x612200 + (head * 0x800), 0x00000000);
}
drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c
+1 -1
View File
@@ -358,7 +358,7 @@ nv50_disp_intr_unk20_1(struct nv50_disp *disp, int head)
struct nvkm_devinit *devinit = device->devinit;
u32 pclk = nvkm_rd32(device, 0x610ad0 + (head * 0x540)) & 0x3fffff;
if (pclk)
devinit->pll_set(devinit, PLL_VPLL0 + head, pclk);
nvkm_devinit_pll_set(devinit, PLL_VPLL0 + head, pclk);
}
static void
drivers/gpu/drm/nouveau/nvkm/subdev/bios/init.c
+5 -7
View File
@@ -173,9 +173,7 @@ init_nvreg(struct nvbios_init *init, u32 reg)
if (reg & ~0x00fffffc)
warn("unknown bits in register 0x%08x\n", reg);
if (devinit->mmio)
reg = devinit->mmio(devinit, reg);
return reg;
return nvkm_devinit_mmio(devinit, reg);
}
static u32
@@ -338,8 +336,8 @@ static void
init_prog_pll(struct nvbios_init *init, u32 id, u32 freq)
{
struct nvkm_devinit *devinit = init->bios->subdev.device->devinit;
if (devinit->pll_set && init_exec(init)) {
int ret = devinit->pll_set(devinit, id, freq);
if (init_exec(init)) {
int ret = nvkm_devinit_pll_set(devinit, id, freq);
if (ret)
warn("failed to prog pll 0x%08x to %dkHz\n", id, freq);
}
@@ -1453,8 +1451,8 @@ init_compute_mem(struct nvbios_init *init)
init->offset += 1;
init_exec_force(init, true);
if (init_exec(init) && devinit->meminit)
devinit->meminit(devinit);
if (init_exec(init))
nvkm_devinit_meminit(devinit);
init_exec_force(init, false);
}
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/base.c
+82 -48
View File
@@ -26,70 +26,104 @@
#include <core/option.h>
#include <subdev/vga.h>
int
_nvkm_devinit_fini(struct nvkm_object *object, bool suspend)
u32
nvkm_devinit_mmio(struct nvkm_devinit *init, u32 addr)
{
struct nvkm_devinit *init = (void *)object;
/* force full reinit on resume */
if (suspend)
init->post = true;
/* unlock the extended vga crtc regs */
nvkm_lockvgac(init->subdev.device, false);
return nvkm_subdev_fini_old(&init->subdev, suspend);
if (init->func->mmio)
addr = init->func->mmio(init, addr);
return addr;
}
int
_nvkm_devinit_init(struct nvkm_object *object)
nvkm_devinit_pll_set(struct nvkm_devinit *init, u32 type, u32 khz)
{
struct nvkm_devinit_impl *impl = (void *)object->oclass;
struct nvkm_devinit *init = (void *)object;
int ret;
ret = nvkm_subdev_init_old(&init->subdev);
if (ret)
return ret;
ret = impl->post(&init->subdev, init->post);
if (ret)
return ret;
if (impl->disable)
nv_device(init)->disable_mask |= impl->disable(init);
return 0;
return init->func->pll_set(init, type, khz);
}
void
_nvkm_devinit_dtor(struct nvkm_object *object)
nvkm_devinit_meminit(struct nvkm_devinit *init)
{
struct nvkm_devinit *init = (void *)object;
/* lock crtc regs */
nvkm_lockvgac(init->subdev.device, true);
nvkm_subdev_destroy(&init->subdev);
if (init->func->meminit)
init->func->meminit(init);
}
int
nvkm_devinit_create_(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, int size, void **pobject)
u64
nvkm_devinit_disable(struct nvkm_devinit *init)
{
struct nvkm_devinit_impl *impl = (void *)oclass;
struct nvkm_device *device = nv_device(parent);
struct nvkm_devinit *init;
if (init->func->disable)
return init->func->disable(init);
return 0;
}
static int
nvkm_devinit_fini(struct nvkm_subdev *subdev, bool suspend)
{
struct nvkm_devinit *init = nvkm_devinit(subdev);
/* force full reinit on resume */
if (suspend)
init->post = true;
return 0;
}
static int
nvkm_devinit_preinit(struct nvkm_subdev *subdev)
{
struct nvkm_devinit *init = nvkm_devinit(subdev);
if (init->func->preinit)
init->func->preinit(init);
/* unlock the extended vga crtc regs */
nvkm_lockvgac(subdev->device, false);
return 0;
}
static int
nvkm_devinit_init(struct nvkm_subdev *subdev)
{
struct nvkm_devinit *init = nvkm_devinit(subdev);
int ret;
ret = nvkm_subdev_create_(parent, engine, oclass, 0, "DEVINIT",
"init", size, pobject);
init = *pobject;
ret = init->func->post(init, init->post);
if (ret)
return ret;
init->post = nvkm_boolopt(device->cfgopt, "NvForcePost", false);
init->meminit = impl->meminit;
init->pll_set = impl->pll_set;
init->mmio = impl->mmio;
if (init->func->init)
init->func->init(init);
if (init->func->disable)
subdev->device->disable_mask |= init->func->disable(init);
return 0;
}
static void *
nvkm_devinit_dtor(struct nvkm_subdev *subdev)
{
struct nvkm_devinit *init = nvkm_devinit(subdev);
void *data = init;
if (init->func->dtor)
data = init->func->dtor(init);
/* lock crtc regs */
nvkm_lockvgac(subdev->device, true);
return data;
}
static const struct nvkm_subdev_func
nvkm_devinit = {
.dtor = nvkm_devinit_dtor,
.preinit = nvkm_devinit_preinit,
.init = nvkm_devinit_init,
.fini = nvkm_devinit_fini,
};
void
nvkm_devinit_ctor(const struct nvkm_devinit_func *func,
struct nvkm_device *device, int index,
struct nvkm_devinit *init)
{
nvkm_subdev_ctor(&nvkm_devinit, device, index, 0, &init->subdev);
init->func = func;
init->post = nvkm_boolopt(device->cfgopt, "NvForcePost", false);
}
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g84.c
+13 -11
View File
@@ -51,16 +51,18 @@ g84_devinit_disable(struct nvkm_devinit *init)
return disable;
}
struct nvkm_oclass *
g84_devinit_oclass = &(struct nvkm_devinit_impl) {
.base.handle = NV_SUBDEV(DEVINIT, 0x84),
.base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = nv50_devinit_ctor,
.dtor = _nvkm_devinit_dtor,
.init = nv50_devinit_init,
.fini = _nvkm_devinit_fini,
},
static const struct nvkm_devinit_func
g84_devinit = {
.preinit = nv50_devinit_preinit,
.init = nv50_devinit_init,
.post = nv04_devinit_post,
.pll_set = nv50_devinit_pll_set,
.disable = g84_devinit_disable,
.post = nvbios_init,
}.base;
};
int
g84_devinit_new(struct nvkm_device *device, int index,
struct nvkm_devinit **pinit)
{
return nv50_devinit_new_(&g84_devinit, device, index, pinit);
}
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g98.c
+13 -11
View File
@@ -50,16 +50,18 @@ g98_devinit_disable(struct nvkm_devinit *init)
return disable;
}
struct nvkm_oclass *
g98_devinit_oclass = &(struct nvkm_devinit_impl) {
.base.handle = NV_SUBDEV(DEVINIT, 0x98),
.base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = nv50_devinit_ctor,
.dtor = _nvkm_devinit_dtor,
.init = nv50_devinit_init,
.fini = _nvkm_devinit_fini,
},
static const struct nvkm_devinit_func
g98_devinit = {
.preinit = nv50_devinit_preinit,
.init = nv50_devinit_init,
.post = nv04_devinit_post,
.pll_set = nv50_devinit_pll_set,
.disable = g98_devinit_disable,
.post = nvbios_init,
}.base;
};
int
g98_devinit_new(struct nvkm_device *device, int index,
struct nvkm_devinit **pinit)
{
return nv50_devinit_new_(&g98_devinit, device, index, pinit);
}
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c
+13 -33
View File
@@ -90,38 +90,18 @@ gf100_devinit_disable(struct nvkm_devinit *init)
return disable;
}
int
gf100_devinit_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
struct nvkm_devinit_impl *impl = (void *)oclass;
struct nv50_devinit *init;
u64 disable;
int ret;
ret = nvkm_devinit_create(parent, engine, oclass, &init);
*pobject = nv_object(init);
if (ret)
return ret;
disable = impl->disable(&init->base);
if (disable & (1ULL << NVDEV_ENGINE_DISP))
init->base.post = true;
return 0;
}
struct nvkm_oclass *
gf100_devinit_oclass = &(struct nvkm_devinit_impl) {
.base.handle = NV_SUBDEV(DEVINIT, 0xc0),
.base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = gf100_devinit_ctor,
.dtor = _nvkm_devinit_dtor,
.init = nv50_devinit_init,
.fini = _nvkm_devinit_fini,
},
static const struct nvkm_devinit_func
gf100_devinit = {
.preinit = nv50_devinit_preinit,
.init = nv50_devinit_init,
.post = nv04_devinit_post,
.pll_set = gf100_devinit_pll_set,
.disable = gf100_devinit_disable,
.post = nvbios_init,
}.base;
};
int
gf100_devinit_new(struct nvkm_device *device, int index,
struct nvkm_devinit **pinit)
{
return nv50_devinit_new_(&gf100_devinit, device, index, pinit);
}
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c
+13 -11
View File
@@ -44,16 +44,18 @@ gm107_devinit_disable(struct nvkm_devinit *init)
return disable;
}
struct nvkm_oclass *
gm107_devinit_oclass = &(struct nvkm_devinit_impl) {
.base.handle = NV_SUBDEV(DEVINIT, 0x07),
.base.ofuncs = &(struct nvkm_ofuncs) {
.ctor = gf100_devinit_ctor,
.dtor = _nvkm_devinit_dtor,
.init = nv50_devinit_init,
.fini = _nvkm_devinit_fini,
},
static const struct nvkm_devinit_func
gm107_devinit = {
.preinit = nv50_devinit_preinit,
.init = nv50_devinit_init,
.post = nv04_devinit_post,
.pll_set = gf100_devinit_pll_set,
.disable = gm107_devinit_disable,
.post = nvbios_init,
}.base;
};
int
gm107_devinit_new(struct nvkm_device *device, int index,
struct nvkm_devinit **pinit)
{
return nv50_devinit_new_(&gm107_devinit, device, index, pinit);
}

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