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Merge branch 'sh-pfc-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

Browse Source
This commit is contained in:
Linus Walleij
2015-10-02 02:25:01 -07:00
parent b4b05b9af3 819fd4bfcc
commit 12597e4539
16 changed files with 5047 additions and 2237 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt
+1
View File
@@ -19,6 +19,7 @@ Required Properties:
- "renesas,pfc-r8a7791": for R8A7791 (R-Car M2-W) compatible pin-controller.
- "renesas,pfc-r8a7793": for R8A7793 (R-Car M2-N) compatible pin-controller.
- "renesas,pfc-r8a7794": for R8A7794 (R-Car E2) compatible pin-controller.
- "renesas,pfc-r8a7795": for R8A7795 (R-Car H3) compatible pin-controller.
- "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller.
- reg: Base address and length of each memory resource used by the pin
drivers/pinctrl/sh-pfc/Kconfig
+5
View File
@@ -65,6 +65,11 @@ config PINCTRL_PFC_R8A7794
depends on ARCH_R8A7794
select PINCTRL_SH_PFC
config PINCTRL_PFC_R8A7795
def_bool y
depends on ARCH_R8A7795
select PINCTRL_SH_PFC
config PINCTRL_PFC_SH7203
def_bool y
depends on CPU_SUBTYPE_SH7203
drivers/pinctrl/sh-pfc/Makefile
+1
View File
@@ -12,6 +12,7 @@ obj-$(CONFIG_PINCTRL_PFC_R8A7790) += pfc-r8a7790.o
obj-$(CONFIG_PINCTRL_PFC_R8A7791) += pfc-r8a7791.o
obj-$(CONFIG_PINCTRL_PFC_R8A7793) += pfc-r8a7791.o
obj-$(CONFIG_PINCTRL_PFC_R8A7794) += pfc-r8a7794.o
obj-$(CONFIG_PINCTRL_PFC_R8A7795) += pfc-r8a7795.o
obj-$(CONFIG_PINCTRL_PFC_SH7203) += pfc-sh7203.o
obj-$(CONFIG_PINCTRL_PFC_SH7264) += pfc-sh7264.o
obj-$(CONFIG_PINCTRL_PFC_SH7269) += pfc-sh7269.o
drivers/pinctrl/sh-pfc/core.c
+6
View File
@@ -489,6 +489,12 @@ static const struct of_device_id sh_pfc_of_table[] = {
.data = &r8a7794_pinmux_info,
},
#endif
#ifdef CONFIG_PINCTRL_PFC_R8A7795
{
.compatible = "renesas,pfc-r8a7795",
.data = &r8a7795_pinmux_info,
},
#endif
#ifdef CONFIG_PINCTRL_PFC_SH73A0
{
.compatible = "renesas,pfc-sh73a0",
drivers/pinctrl/sh-pfc/core.h
+3
View File
@@ -46,7 +46,9 @@ struct sh_pfc {
unsigned int nr_gpio_pins;
struct sh_pfc_chip *gpio;
#ifdef CONFIG_SUPERH
struct sh_pfc_chip *func;
#endif
struct sh_pfc_pinctrl *pinctrl;
};
@@ -73,6 +75,7 @@ extern const struct sh_pfc_soc_info r8a7790_pinmux_info;
extern const struct sh_pfc_soc_info r8a7791_pinmux_info;
extern const struct sh_pfc_soc_info r8a7793_pinmux_info;
extern const struct sh_pfc_soc_info r8a7794_pinmux_info;
extern const struct sh_pfc_soc_info r8a7795_pinmux_info;
extern const struct sh_pfc_soc_info sh7203_pinmux_info;
extern const struct sh_pfc_soc_info sh7264_pinmux_info;
extern const struct sh_pfc_soc_info sh7269_pinmux_info;
drivers/pinctrl/sh-pfc/gpio.c
+19 -18
View File
@@ -219,10 +219,7 @@ static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset)
return -ENOSYS;
found:
if (pfc->num_irqs)
return pfc->irqs[i];
else
return pfc->info->gpio_irq[i].irq;
return pfc->irqs[i];
}
static int gpio_pin_setup(struct sh_pfc_chip *chip)
@@ -261,6 +258,7 @@ static int gpio_pin_setup(struct sh_pfc_chip *chip)
* Function GPIOs
*/
#ifdef CONFIG_SUPERH
static int gpio_function_request(struct gpio_chip *gc, unsigned offset)
{
static bool __print_once;
@@ -286,17 +284,12 @@ static int gpio_function_request(struct gpio_chip *gc, unsigned offset)
return ret;
}
static void gpio_function_free(struct gpio_chip *gc, unsigned offset)
{
}
static int gpio_function_setup(struct sh_pfc_chip *chip)
{
struct sh_pfc *pfc = chip->pfc;
struct gpio_chip *gc = &chip->gpio_chip;
gc->request = gpio_function_request;
gc->free = gpio_function_free;
gc->label = pfc->info->name;
gc->owner = THIS_MODULE;
@@ -305,6 +298,7 @@ static int gpio_function_setup(struct sh_pfc_chip *chip)
return 0;
}
#endif
/* -----------------------------------------------------------------------------
* Register/unregister
@@ -344,7 +338,6 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
struct sh_pfc_chip *chip;
phys_addr_t address;
unsigned int i;
int ret;
if (pfc->info->data_regs == NULL)
return 0;
@@ -367,7 +360,7 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
return 0;
/* If we have IRQ resources make sure their number is correct. */
if (pfc->num_irqs && pfc->num_irqs != pfc->info->gpio_irq_size) {
if (pfc->num_irqs != pfc->info->gpio_irq_size) {
dev_err(pfc->dev, "invalid number of IRQ resources\n");
return -EINVAL;
}
@@ -379,20 +372,26 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
pfc->gpio = chip;
/* Register the GPIO to pin mappings. As pins with GPIO ports must come
* first in the ranges, skip the pins without GPIO ports by stopping at
* the first range that contains such a pin.
if (IS_ENABLED(CONFIG_OF) && pfc->dev->of_node)
return 0;
#ifdef CONFIG_SUPERH
/*
* Register the GPIO to pin mappings. As pins with GPIO ports
* must come first in the ranges, skip the pins without GPIO
* ports by stopping at the first range that contains such a
* pin.
*/
for (i = 0; i < pfc->nr_ranges; ++i) {
const struct sh_pfc_pin_range *range = &pfc->ranges[i];
int ret;
if (range->start >= pfc->nr_gpio_pins)
break;
ret = gpiochip_add_pin_range(&chip->gpio_chip,
dev_name(pfc->dev),
range->start, range->start,
range->end - range->start + 1);
dev_name(pfc->dev), range->start, range->start,
range->end - range->start + 1);
if (ret < 0)
return ret;
}
@@ -406,6 +405,7 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
return PTR_ERR(chip);
pfc->func = chip;
#endif /* CONFIG_SUPERH */
return 0;
}
@@ -413,7 +413,8 @@ int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc)
{
gpiochip_remove(&pfc->gpio->gpio_chip);
#ifdef CONFIG_SUPERH
gpiochip_remove(&pfc->func->gpio_chip);
#endif
return 0;
}
drivers/pinctrl/sh-pfc/pfc-r8a73a4.c
+58 -58
View File
@@ -2603,64 +2603,64 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
};
static const struct pinmux_irq pinmux_irqs[] = {
PINMUX_IRQ(irq_pin(0), 0),
PINMUX_IRQ(irq_pin(1), 1),
PINMUX_IRQ(irq_pin(2), 2),
PINMUX_IRQ(irq_pin(3), 3),
PINMUX_IRQ(irq_pin(4), 4),
PINMUX_IRQ(irq_pin(5), 5),
PINMUX_IRQ(irq_pin(6), 6),
PINMUX_IRQ(irq_pin(7), 7),
PINMUX_IRQ(irq_pin(8), 8),
PINMUX_IRQ(irq_pin(9), 9),
PINMUX_IRQ(irq_pin(10), 10),
PINMUX_IRQ(irq_pin(11), 11),
PINMUX_IRQ(irq_pin(12), 12),
PINMUX_IRQ(irq_pin(13), 13),
PINMUX_IRQ(irq_pin(14), 14),
PINMUX_IRQ(irq_pin(15), 15),
PINMUX_IRQ(irq_pin(16), 320),
PINMUX_IRQ(irq_pin(17), 321),
PINMUX_IRQ(irq_pin(18), 85),
PINMUX_IRQ(irq_pin(19), 84),
PINMUX_IRQ(irq_pin(20), 160),
PINMUX_IRQ(irq_pin(21), 161),
PINMUX_IRQ(irq_pin(22), 162),
PINMUX_IRQ(irq_pin(23), 163),
PINMUX_IRQ(irq_pin(24), 175),
PINMUX_IRQ(irq_pin(25), 176),
PINMUX_IRQ(irq_pin(26), 177),
PINMUX_IRQ(irq_pin(27), 178),
PINMUX_IRQ(irq_pin(28), 322),
PINMUX_IRQ(irq_pin(29), 323),
PINMUX_IRQ(irq_pin(30), 324),
PINMUX_IRQ(irq_pin(31), 192),
PINMUX_IRQ(irq_pin(32), 193),
PINMUX_IRQ(irq_pin(33), 194),
PINMUX_IRQ(irq_pin(34), 195),
PINMUX_IRQ(irq_pin(35), 196),
PINMUX_IRQ(irq_pin(36), 197),
PINMUX_IRQ(irq_pin(37), 198),
PINMUX_IRQ(irq_pin(38), 199),
PINMUX_IRQ(irq_pin(39), 200),
PINMUX_IRQ(irq_pin(40), 66),
PINMUX_IRQ(irq_pin(41), 102),
PINMUX_IRQ(irq_pin(42), 103),
PINMUX_IRQ(irq_pin(43), 109),
PINMUX_IRQ(irq_pin(44), 110),
PINMUX_IRQ(irq_pin(45), 111),
PINMUX_IRQ(irq_pin(46), 112),
PINMUX_IRQ(irq_pin(47), 113),
PINMUX_IRQ(irq_pin(48), 114),
PINMUX_IRQ(irq_pin(49), 115),
PINMUX_IRQ(irq_pin(50), 301),
PINMUX_IRQ(irq_pin(51), 290),
PINMUX_IRQ(irq_pin(52), 296),
PINMUX_IRQ(irq_pin(53), 325),
PINMUX_IRQ(irq_pin(54), 326),
PINMUX_IRQ(irq_pin(55), 327),
PINMUX_IRQ(irq_pin(56), 328),
PINMUX_IRQ(irq_pin(57), 329),
PINMUX_IRQ(0), /* IRQ0 */
PINMUX_IRQ(1), /* IRQ1 */
PINMUX_IRQ(2), /* IRQ2 */
PINMUX_IRQ(3), /* IRQ3 */
PINMUX_IRQ(4), /* IRQ4 */
PINMUX_IRQ(5), /* IRQ5 */
PINMUX_IRQ(6), /* IRQ6 */
PINMUX_IRQ(7), /* IRQ7 */
PINMUX_IRQ(8), /* IRQ8 */
PINMUX_IRQ(9), /* IRQ9 */
PINMUX_IRQ(10), /* IRQ10 */
PINMUX_IRQ(11), /* IRQ11 */
PINMUX_IRQ(12), /* IRQ12 */
PINMUX_IRQ(13), /* IRQ13 */
PINMUX_IRQ(14), /* IRQ14 */
PINMUX_IRQ(15), /* IRQ15 */
PINMUX_IRQ(320), /* IRQ16 */
PINMUX_IRQ(321), /* IRQ17 */
PINMUX_IRQ(85), /* IRQ18 */
PINMUX_IRQ(84), /* IRQ19 */
PINMUX_IRQ(160), /* IRQ20 */
PINMUX_IRQ(161), /* IRQ21 */
PINMUX_IRQ(162), /* IRQ22 */
PINMUX_IRQ(163), /* IRQ23 */
PINMUX_IRQ(175), /* IRQ24 */
PINMUX_IRQ(176), /* IRQ25 */
PINMUX_IRQ(177), /* IRQ26 */
PINMUX_IRQ(178), /* IRQ27 */
PINMUX_IRQ(322), /* IRQ28 */
PINMUX_IRQ(323), /* IRQ29 */
PINMUX_IRQ(324), /* IRQ30 */
PINMUX_IRQ(192), /* IRQ31 */
PINMUX_IRQ(193), /* IRQ32 */
PINMUX_IRQ(194), /* IRQ33 */
PINMUX_IRQ(195), /* IRQ34 */
PINMUX_IRQ(196), /* IRQ35 */
PINMUX_IRQ(197), /* IRQ36 */
PINMUX_IRQ(198), /* IRQ37 */
PINMUX_IRQ(199), /* IRQ38 */
PINMUX_IRQ(200), /* IRQ39 */
PINMUX_IRQ(66), /* IRQ40 */
PINMUX_IRQ(102), /* IRQ41 */
PINMUX_IRQ(103), /* IRQ42 */
PINMUX_IRQ(109), /* IRQ43 */
PINMUX_IRQ(110), /* IRQ44 */
PINMUX_IRQ(111), /* IRQ45 */
PINMUX_IRQ(112), /* IRQ46 */
PINMUX_IRQ(113), /* IRQ47 */
PINMUX_IRQ(114), /* IRQ48 */
PINMUX_IRQ(115), /* IRQ49 */
PINMUX_IRQ(301), /* IRQ50 */
PINMUX_IRQ(290), /* IRQ51 */
PINMUX_IRQ(296), /* IRQ52 */
PINMUX_IRQ(325), /* IRQ53 */
PINMUX_IRQ(326), /* IRQ54 */
PINMUX_IRQ(327), /* IRQ55 */
PINMUX_IRQ(328), /* IRQ56 */
PINMUX_IRQ(329), /* IRQ57 */
};
#define PORTCR_PULMD_OFF (0 << 6)
drivers/pinctrl/sh-pfc/pfc-r8a7740.c
+32 -32
View File
@@ -3651,38 +3651,38 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
};
static const struct pinmux_irq pinmux_irqs[] = {
PINMUX_IRQ(irq_pin(0), 2, 13), /* IRQ0A */
PINMUX_IRQ(irq_pin(1), 20), /* IRQ1A */
PINMUX_IRQ(irq_pin(2), 11, 12), /* IRQ2A */
PINMUX_IRQ(irq_pin(3), 10, 14), /* IRQ3A */
PINMUX_IRQ(irq_pin(4), 15, 172), /* IRQ4A */
PINMUX_IRQ(irq_pin(5), 0, 1), /* IRQ5A */
PINMUX_IRQ(irq_pin(6), 121, 173), /* IRQ6A */
PINMUX_IRQ(irq_pin(7), 120, 209), /* IRQ7A */
PINMUX_IRQ(irq_pin(8), 119), /* IRQ8A */
PINMUX_IRQ(irq_pin(9), 118, 210), /* IRQ9A */
PINMUX_IRQ(irq_pin(10), 19), /* IRQ10A */
PINMUX_IRQ(irq_pin(11), 104), /* IRQ11A */
PINMUX_IRQ(irq_pin(12), 42, 97), /* IRQ12A */
PINMUX_IRQ(irq_pin(13), 64, 98), /* IRQ13A */
PINMUX_IRQ(irq_pin(14), 63, 99), /* IRQ14A */
PINMUX_IRQ(irq_pin(15), 62, 100), /* IRQ15A */
PINMUX_IRQ(irq_pin(16), 68, 211), /* IRQ16A */
PINMUX_IRQ(irq_pin(17), 69), /* IRQ17A */
PINMUX_IRQ(irq_pin(18), 70), /* IRQ18A */
PINMUX_IRQ(irq_pin(19), 71), /* IRQ19A */
PINMUX_IRQ(irq_pin(20), 67), /* IRQ20A */
PINMUX_IRQ(irq_pin(21), 202), /* IRQ21A */
PINMUX_IRQ(irq_pin(22), 95), /* IRQ22A */
PINMUX_IRQ(irq_pin(23), 96), /* IRQ23A */
PINMUX_IRQ(irq_pin(24), 180), /* IRQ24A */
PINMUX_IRQ(irq_pin(25), 38), /* IRQ25A */
PINMUX_IRQ(irq_pin(26), 58, 81), /* IRQ26A */
PINMUX_IRQ(irq_pin(27), 57, 168), /* IRQ27A */
PINMUX_IRQ(irq_pin(28), 56, 169), /* IRQ28A */
PINMUX_IRQ(irq_pin(29), 50, 170), /* IRQ29A */
PINMUX_IRQ(irq_pin(30), 49, 171), /* IRQ30A */
PINMUX_IRQ(irq_pin(31), 41, 167), /* IRQ31A */
PINMUX_IRQ(2, 13), /* IRQ0A */
PINMUX_IRQ(20), /* IRQ1A */
PINMUX_IRQ(11, 12), /* IRQ2A */
PINMUX_IRQ(10, 14), /* IRQ3A */
PINMUX_IRQ(15, 172), /* IRQ4A */
PINMUX_IRQ(0, 1), /* IRQ5A */
PINMUX_IRQ(121, 173), /* IRQ6A */
PINMUX_IRQ(120, 209), /* IRQ7A */
PINMUX_IRQ(119), /* IRQ8A */
PINMUX_IRQ(118, 210), /* IRQ9A */
PINMUX_IRQ(19), /* IRQ10A */
PINMUX_IRQ(104), /* IRQ11A */
PINMUX_IRQ(42, 97), /* IRQ12A */
PINMUX_IRQ(64, 98), /* IRQ13A */
PINMUX_IRQ(63, 99), /* IRQ14A */
PINMUX_IRQ(62, 100), /* IRQ15A */
PINMUX_IRQ(68, 211), /* IRQ16A */
PINMUX_IRQ(69), /* IRQ17A */
PINMUX_IRQ(70), /* IRQ18A */
PINMUX_IRQ(71), /* IRQ19A */
PINMUX_IRQ(67), /* IRQ20A */
PINMUX_IRQ(202), /* IRQ21A */
PINMUX_IRQ(95), /* IRQ22A */
PINMUX_IRQ(96), /* IRQ23A */
PINMUX_IRQ(180), /* IRQ24A */
PINMUX_IRQ(38), /* IRQ25A */
PINMUX_IRQ(58, 81), /* IRQ26A */
PINMUX_IRQ(57, 168), /* IRQ27A */
PINMUX_IRQ(56, 169), /* IRQ28A */
PINMUX_IRQ(50, 170), /* IRQ29A */
PINMUX_IRQ(49, 171), /* IRQ30A */
PINMUX_IRQ(41, 167), /* IRQ31A */
};
#define PORTnCR_PULMD_OFF (0 << 6)
drivers/pinctrl/sh-pfc/pfc-r8a7779.c
+210 -210
View File
File diff suppressed because it is too large Load Diff
drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+519 -519
View File
File diff suppressed because it is too large Load Diff
drivers/pinctrl/sh-pfc/pfc-r8a7791.c
+538 -538
View File
File diff suppressed because it is too large Load Diff
drivers/pinctrl/sh-pfc/pfc-r8a7794.c
+414 -432
View File
File diff suppressed because it is too large Load Diff
drivers/pinctrl/sh-pfc/pfc-r8a7795.c
+2817
View File
File diff suppressed because it is too large Load Diff
drivers/pinctrl/sh-pfc/pfc-sh73a0.c
+32 -32
View File
@@ -3649,38 +3649,38 @@ static const struct pinmux_data_reg pinmux_data_regs[] = {
};
static const struct pinmux_irq pinmux_irqs[] = {
PINMUX_IRQ(irq_pin(0), 11),
PINMUX_IRQ(irq_pin(1), 10),
PINMUX_IRQ(irq_pin(2), 149),
PINMUX_IRQ(irq_pin(3), 224),
PINMUX_IRQ(irq_pin(4), 159),
PINMUX_IRQ(irq_pin(5), 227),
PINMUX_IRQ(irq_pin(6), 147),
PINMUX_IRQ(irq_pin(7), 150),
PINMUX_IRQ(irq_pin(8), 223),
PINMUX_IRQ(irq_pin(9), 56, 308),
PINMUX_IRQ(irq_pin(10), 54),
PINMUX_IRQ(irq_pin(11), 238),
PINMUX_IRQ(irq_pin(12), 156),
PINMUX_IRQ(irq_pin(13), 239),
PINMUX_IRQ(irq_pin(14), 251),
PINMUX_IRQ(irq_pin(15), 0),
PINMUX_IRQ(irq_pin(16), 249),
PINMUX_IRQ(irq_pin(17), 234),
PINMUX_IRQ(irq_pin(18), 13),
PINMUX_IRQ(irq_pin(19), 9),
PINMUX_IRQ(irq_pin(20), 14),
PINMUX_IRQ(irq_pin(21), 15),
PINMUX_IRQ(irq_pin(22), 40),
PINMUX_IRQ(irq_pin(23), 53),
PINMUX_IRQ(irq_pin(24), 118),
PINMUX_IRQ(irq_pin(25), 164),
PINMUX_IRQ(irq_pin(26), 115),
PINMUX_IRQ(irq_pin(27), 116),
PINMUX_IRQ(irq_pin(28), 117),
PINMUX_IRQ(irq_pin(29), 28),
PINMUX_IRQ(irq_pin(30), 27),
PINMUX_IRQ(irq_pin(31), 26),
PINMUX_IRQ(11), /* IRQ0 */
PINMUX_IRQ(10), /* IRQ1 */
PINMUX_IRQ(149), /* IRQ2 */
PINMUX_IRQ(224), /* IRQ3 */
PINMUX_IRQ(159), /* IRQ4 */
PINMUX_IRQ(227), /* IRQ5 */
PINMUX_IRQ(147), /* IRQ6 */
PINMUX_IRQ(150), /* IRQ7 */
PINMUX_IRQ(223), /* IRQ8 */
PINMUX_IRQ(56, 308), /* IRQ9 */
PINMUX_IRQ(54), /* IRQ10 */
PINMUX_IRQ(238), /* IRQ11 */
PINMUX_IRQ(156), /* IRQ12 */
PINMUX_IRQ(239), /* IRQ13 */
PINMUX_IRQ(251), /* IRQ14 */
PINMUX_IRQ(0), /* IRQ15 */
PINMUX_IRQ(249), /* IRQ16 */
PINMUX_IRQ(234), /* IRQ17 */
PINMUX_IRQ(13), /* IRQ18 */
PINMUX_IRQ(9), /* IRQ19 */
PINMUX_IRQ(14), /* IRQ20 */
PINMUX_IRQ(15), /* IRQ21 */
PINMUX_IRQ(40), /* IRQ22 */
PINMUX_IRQ(53), /* IRQ23 */
PINMUX_IRQ(118), /* IRQ24 */
PINMUX_IRQ(164), /* IRQ25 */
PINMUX_IRQ(115), /* IRQ26 */
PINMUX_IRQ(116), /* IRQ27 */
PINMUX_IRQ(117), /* IRQ28 */
PINMUX_IRQ(28), /* IRQ29 */
PINMUX_IRQ(27), /* IRQ30 */
PINMUX_IRQ(26), /* IRQ31 */
};
/* -----------------------------------------------------------------------------
drivers/pinctrl/sh-pfc/pfc-sh7734.c
+389 -389
View File
File diff suppressed because it is too large Load Diff
drivers/pinctrl/sh-pfc/sh_pfc.h
+3 -9
View File
@@ -98,17 +98,11 @@ struct pinmux_data_reg {
.enum_ids = (const u16 [r_width]) \
struct pinmux_irq {
int irq;
const short *gpios;
};
#ifdef CONFIG_ARCH_MULTIPLATFORM
#define PINMUX_IRQ(irq_nr, ids...) \
#define PINMUX_IRQ(ids...) \
{ .gpios = (const short []) { ids, -1 } }
#else
#define PINMUX_IRQ(irq_nr, ids...) \
{ .irq = irq_nr, .gpios = (const short []) { ids, -1 } }
#endif
struct pinmux_range {
u16 begin;
@@ -143,8 +137,10 @@ struct sh_pfc_soc_info {
const struct sh_pfc_function *functions;
unsigned int nr_functions;
#ifdef CONFIG_SUPERH
const struct pinmux_func *func_gpios;
unsigned int nr_func_gpios;
#endif
const struct pinmux_cfg_reg *cfg_regs;
const struct pinmux_data_reg *data_regs;
@@ -177,8 +173,6 @@ struct sh_pfc_soc_info {
#define PINMUX_IPSR_NOFN(ipsr, fn, ms) \
PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##ms)
#define PINMUX_IPSR_MSEL(ipsr, fn, ms) \
PINMUX_DATA(fn##_MARK, FN_##fn, FN_##ipsr, FN_##ms)
#define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) \
PINMUX_DATA(fn##_MARK, FN_##ms, FN_##ipsr, FN_##fn)
/*