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Merge tag 'drivers-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver changes from Olof Johansson:
"A handful of driver-related changes. We've had a bunch of them going
in through other branches as well, so it's only a part of what we
really have this release.
Larger pieces are:
- Removal of a now unused PWM driver for atmel
[ This includes AVR32 changes that have been appropriately acked ]
- Performance counter support for the arm CCN interconnect
- OMAP mailbox driver cleanups and consolidation
- PCI and SATA PHY drivers for SPEAr 13xx platforms
- Redefinition (with backwards compatibility!) of PCI DT bindings for
Tegra to better model regulators/power"
Note: this merge also fixes up the semantic conflict with the new
calling convention for devm_phy_create(), see commit f0ed817638 ("phy:
core: Let node ptr of PHY point to PHY and not of PHY provider") that
came in through Greg's USB tree.
Semantic merge patch by Stephen Rothwell <sfr@canb.auug.org.au> through
the next tree.
* tag 'drivers-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (38 commits)
bus: arm-ccn: Fix error handling at event allocation
mailbox/omap: add a parent structure for every IP instance
mailbox/omap: remove the private mailbox structure
mailbox/omap: consolidate OMAP mailbox driver
mailbox/omap: simplify the fifo assignment by using macros
mailbox/omap: remove omap_mbox_type_t from mailbox ops
mailbox/omap: remove OMAP1 mailbox driver
mailbox/omap: use devm_* interfaces
bus: ARM CCN: add PERF_EVENTS dependency
bus: ARM CCN PMU driver
PCI: spear: Remove spear13xx_pcie_remove()
PCI: spear: Fix Section mismatch compilation warning for probe()
ARM: tegra: Remove legacy PCIe power supply properties
PCI: tegra: Remove deprecated power supply properties
PCI: tegra: Implement accurate power supply scheme
ARM: SPEAr13xx: Update defconfigs
ARM: SPEAr13xx: Add pcie and miphy DT nodes
ARM: SPEAr13xx: Add bindings and dt node for misc block
ARM: SPEAr13xx: Fix static mapping table
phy: Add drivers for PCIe and SATA phy on SPEAr13xx
...
This commit is contained in:
Linus Torvalds
@@ -0,0 +1,52 @@
|
||||
ARM Cache Coherent Network
|
||||
==========================
|
||||
|
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CCN-504 is a ring-bus interconnect consisting of 11 crosspoints
|
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(XPs), with each crosspoint supporting up to two device ports,
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so nodes (devices) 0 and 1 are connected to crosspoint 0,
|
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nodes 2 and 3 to crosspoint 1 etc.
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||||
|
||||
PMU (perf) driver
|
||||
-----------------
|
||||
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The CCN driver registers a perf PMU driver, which provides
|
||||
description of available events and configuration options
|
||||
in sysfs, see /sys/bus/event_source/devices/ccn*.
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The "format" directory describes format of the config, config1
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and config2 fields of the perf_event_attr structure. The "events"
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directory provides configuration templates for all documented
|
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events, that can be used with perf tool. For example "xp_valid_flit"
|
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is an equivalent of "type=0x8,event=0x4". Other parameters must be
|
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explicitly specified. For events originating from device, "node"
|
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defines its index. All crosspoint events require "xp" (index),
|
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"port" (device port number) and "vc" (virtual channel ID) and
|
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"dir" (direction). Watchpoints (special "event" value 0xfe) also
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require comparator values ("cmp_l" and "cmp_h") and "mask", being
|
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index of the comparator mask.
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Masks are defined separately from the event description
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(due to limited number of the config values) in the "cmp_mask"
|
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directory, with first 8 configurable by user and additional
|
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4 hardcoded for the most frequent use cases.
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Cycle counter is described by a "type" value 0xff and does
|
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not require any other settings.
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Example of perf tool use:
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/ # perf list | grep ccn
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ccn/cycles/ [Kernel PMU event]
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<...>
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ccn/xp_valid_flit/ [Kernel PMU event]
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<...>
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/ # perf stat -C 0 -e ccn/cycles/,ccn/xp_valid_flit,xp=1,port=0,vc=1,dir=1/ \
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sleep 1
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The driver does not support sampling, therefore "perf record" will
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not work. Also notice that only single cpu is being selected
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("-C 0") - this is because perf framework does not support
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"non-CPU related" counters (yet?) so system-wide session ("-a")
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would try (and in most cases fail) to set up the same event
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per each CPU.
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@@ -0,0 +1,21 @@
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* ARM CCN (Cache Coherent Network)
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Required properties:
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- compatible: (standard compatible string) should be one of:
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"arm,ccn-504"
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"arm,ccn-508"
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- reg: (standard registers property) physical address and size
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(16MB) of the configuration registers block
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- interrupts: (standard interrupt property) single interrupt
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generated by the control block
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Example:
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ccn@0x2000000000 {
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compatible = "arm,ccn-504";
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reg = <0x20 0x00000000 0 0x1000000>;
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interrupts = <0 181 4>;
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};
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@@ -0,0 +1,9 @@
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SPEAr Misc configuration
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===========================
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SPEAr SOCs have some miscellaneous registers which are used to configure
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few properties of different peripheral controllers.
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misc node required properties:
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- compatible Should be "st,spear1340-misc", "syscon".
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- reg: Address range of misc space upto 8K
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@@ -14,9 +14,6 @@ Required properties:
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- interrupt-names: Must include the following entries:
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"intr": The Tegra interrupt that is asserted for controller interrupts
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"msi": The Tegra interrupt that is asserted when an MSI is received
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- pex-clk-supply: Supply voltage for internal reference clock
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- vdd-supply: Power supply for controller (1.05V)
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- avdd-supply: Power supply for controller (1.05V) (not required for Tegra20)
|
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- bus-range: Range of bus numbers associated with this controller
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- #address-cells: Address representation for root ports (must be 3)
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- cell 0 specifies the bus and device numbers of the root port:
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@@ -60,6 +57,33 @@ Required properties:
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- afi
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- pcie_x
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Power supplies for Tegra20:
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- avdd-pex-supply: Power supply for analog PCIe logic. Must supply 1.05 V.
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- vdd-pex-supply: Power supply for digital PCIe I/O. Must supply 1.05 V.
|
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- avdd-pex-pll-supply: Power supply for dedicated (internal) PCIe PLL. Must
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supply 1.05 V.
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- avdd-plle-supply: Power supply for PLLE, which is shared with SATA. Must
|
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supply 1.05 V.
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- vddio-pex-clk-supply: Power supply for PCIe clock. Must supply 3.3 V.
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Power supplies for Tegra30:
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- Required:
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- avdd-pex-pll-supply: Power supply for dedicated (internal) PCIe PLL. Must
|
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supply 1.05 V.
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- avdd-plle-supply: Power supply for PLLE, which is shared with SATA. Must
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supply 1.05 V.
|
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- vddio-pex-ctl-supply: Power supply for PCIe control I/O partition. Must
|
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supply 1.8 V.
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- hvdd-pex-supply: High-voltage supply for PCIe I/O and PCIe output clocks.
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Must supply 3.3 V.
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- Optional:
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- If lanes 0 to 3 are used:
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- avdd-pexa-supply: Power supply for analog PCIe logic. Must supply 1.05 V.
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- vdd-pexa-supply: Power supply for digital PCIe I/O. Must supply 1.05 V.
|
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- If lanes 4 or 5 are used:
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- avdd-pexb-supply: Power supply for analog PCIe logic. Must supply 1.05 V.
|
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- vdd-pexb-supply: Power supply for digital PCIe I/O. Must supply 1.05 V.
|
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|
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Root ports are defined as subnodes of the PCIe controller node.
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Required properties:
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@@ -0,0 +1,14 @@
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SPEAr13XX PCIe DT detail:
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================================
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SPEAr13XX uses synopsis designware PCIe controller and ST MiPHY as phy
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controller.
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Required properties:
|
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- compatible : should be "st,spear1340-pcie", "snps,dw-pcie".
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- phys : phandle to phy node associated with pcie controller
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- phy-names : must be "pcie-phy"
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- All other definitions as per generic PCI bindings
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Optional properties:
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- st,pcie-is-gen1 indicates that forced gen1 initialization is needed.
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@@ -0,0 +1,15 @@
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ST SPEAr miphy DT details
|
||||
=========================
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ST Microelectronics SPEAr miphy is a phy controller supporting PCIe and SATA.
|
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Required properties:
|
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- compatible : should be "st,spear1310-miphy" or "st,spear1340-miphy"
|
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- reg : offset and length of the PHY register set.
|
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- misc: phandle for the syscon node to access misc registers
|
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- #phy-cells : from the generic PHY bindings, must be 1.
|
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- cell[1]: 0 if phy used for SATA, 1 for PCIe.
|
||||
|
||||
Optional properties:
|
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- phy-id: Instance id of the phy. Only required when there are multiple phys
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present on a implementation.
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@@ -6902,6 +6902,12 @@ S: Maintained
|
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F: Documentation/devicetree/bindings/pci/host-generic-pci.txt
|
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F: drivers/pci/host/pci-host-generic.c
|
||||
|
||||
PCIE DRIVER FOR ST SPEAR13XX
|
||||
M: Mohit Kumar <mohit.kumar@st.com>
|
||||
L: linux-pci@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/pci/host/*spear*
|
||||
|
||||
PCMCIA SUBSYSTEM
|
||||
P: Linux PCMCIA Team
|
||||
L: linux-pcmcia@lists.infradead.org
|
||||
|
||||
@@ -106,6 +106,10 @@
|
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status = "okay";
|
||||
};
|
||||
|
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miphy@eb800000 {
|
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status = "okay";
|
||||
};
|
||||
|
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cf@b2800000 {
|
||||
status = "okay";
|
||||
};
|
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|
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@@ -29,24 +29,111 @@
|
||||
#gpio-cells = <2>;
|
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};
|
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|
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ahci@b1000000 {
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miphy0: miphy@eb800000 {
|
||||
compatible = "st,spear1310-miphy";
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reg = <0xeb800000 0x4000>;
|
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misc = <&misc>;
|
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phy-id = <0>;
|
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#phy-cells = <1>;
|
||||
status = "disabled";
|
||||
};
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|
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miphy1: miphy@eb804000 {
|
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compatible = "st,spear1310-miphy";
|
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reg = <0xeb804000 0x4000>;
|
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misc = <&misc>;
|
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phy-id = <1>;
|
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#phy-cells = <1>;
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status = "disabled";
|
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};
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|
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miphy2: miphy@eb808000 {
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compatible = "st,spear1310-miphy";
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reg = <0xeb808000 0x4000>;
|
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misc = <&misc>;
|
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phy-id = <2>;
|
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#phy-cells = <1>;
|
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status = "disabled";
|
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};
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|
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ahci0: ahci@b1000000 {
|
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compatible = "snps,spear-ahci";
|
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reg = <0xb1000000 0x10000>;
|
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interrupts = <0 68 0x4>;
|
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phys = <&miphy0 0>;
|
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phy-names = "sata-phy";
|
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status = "disabled";
|
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};
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|
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ahci@b1800000 {
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ahci1: ahci@b1800000 {
|
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compatible = "snps,spear-ahci";
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reg = <0xb1800000 0x10000>;
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interrupts = <0 69 0x4>;
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phys = <&miphy1 0>;
|
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phy-names = "sata-phy";
|
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status = "disabled";
|
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};
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ahci@b4000000 {
|
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ahci2: ahci@b4000000 {
|
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compatible = "snps,spear-ahci";
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reg = <0xb4000000 0x10000>;
|
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interrupts = <0 70 0x4>;
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phys = <&miphy2 0>;
|
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phy-names = "sata-phy";
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status = "disabled";
|
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};
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|
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pcie0: pcie@b1000000 {
|
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compatible = "st,spear1340-pcie", "snps,dw-pcie";
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reg = <0xb1000000 0x4000>;
|
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interrupts = <0 68 0x4>;
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interrupt-map-mask = <0 0 0 0>;
|
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interrupt-map = <0x0 0 &gic 0 68 0x4>;
|
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num-lanes = <1>;
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phys = <&miphy0 1>;
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phy-names = "pcie-phy";
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#address-cells = <3>;
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#size-cells = <2>;
|
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device_type = "pci";
|
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ranges = <0x00000800 0 0x80000000 0x80000000 0 0x00020000 /* configuration space */
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0x81000000 0 0 0x80020000 0 0x00010000 /* downstream I/O */
|
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0x82000000 0 0x80030000 0xc0030000 0 0x0ffd0000>; /* non-prefetchable memory */
|
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status = "disabled";
|
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};
|
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|
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pcie1: pcie@b1800000 {
|
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compatible = "st,spear1340-pcie", "snps,dw-pcie";
|
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reg = <0xb1800000 0x4000>;
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interrupts = <0 69 0x4>;
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interrupt-map-mask = <0 0 0 0>;
|
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interrupt-map = <0x0 0 &gic 0 69 0x4>;
|
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num-lanes = <1>;
|
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phys = <&miphy1 1>;
|
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phy-names = "pcie-phy";
|
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#address-cells = <3>;
|
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#size-cells = <2>;
|
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device_type = "pci";
|
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ranges = <0x00000800 0 0x90000000 0x90000000 0 0x00020000 /* configuration space */
|
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0x81000000 0 0 0x90020000 0 0x00010000 /* downstream I/O */
|
||||
0x82000000 0 0x90030000 0x90030000 0 0x0ffd0000>; /* non-prefetchable memory */
|
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status = "disabled";
|
||||
};
|
||||
|
||||
pcie2: pcie@b4000000 {
|
||||
compatible = "st,spear1340-pcie", "snps,dw-pcie";
|
||||
reg = <0xb4000000 0x4000>;
|
||||
interrupts = <0 70 0x4>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0x0 0 &gic 0 70 0x4>;
|
||||
num-lanes = <1>;
|
||||
phys = <&miphy2 1>;
|
||||
phy-names = "pcie-phy";
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
ranges = <0x00000800 0 0xc0000000 0xc0000000 0 0x00020000 /* configuration space */
|
||||
0x81000000 0 0 0xc0020000 0 0x00010000 /* downstream I/O */
|
||||
0x82000000 0 0xc0030000 0xc0030000 0 0x0ffd0000>; /* non-prefetchable memory */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
||||
@@ -122,6 +122,10 @@
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
miphy@eb800000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
dma@ea800000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -31,10 +31,38 @@
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ahci@b1000000 {
|
||||
miphy0: miphy@eb800000 {
|
||||
compatible = "st,spear1340-miphy";
|
||||
reg = <0xeb800000 0x4000>;
|
||||
misc = <&misc>;
|
||||
#phy-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ahci0: ahci@b1000000 {
|
||||
compatible = "snps,spear-ahci";
|
||||
reg = <0xb1000000 0x10000>;
|
||||
interrupts = <0 72 0x4>;
|
||||
phys = <&miphy0 0>;
|
||||
phy-names = "sata-phy";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pcie0: pcie@b1000000 {
|
||||
compatible = "st,spear1340-pcie", "snps,dw-pcie";
|
||||
reg = <0xb1000000 0x4000>;
|
||||
interrupts = <0 68 0x4>;
|
||||
interrupt-map-mask = <0 0 0 0>;
|
||||
interrupt-map = <0x0 0 &gic 0 68 0x4>;
|
||||
num-lanes = <1>;
|
||||
phys = <&miphy0 1>;
|
||||
phy-names = "pcie-phy";
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
device_type = "pci";
|
||||
ranges = <0x00000800 0 0x80000000 0x80000000 0 0x00020000 /* configuration space */
|
||||
0x81000000 0 0 0x80020000 0 0x00010000 /* downstream I/O */
|
||||
0x82000000 0 0x80030000 0xc0030000 0 0x0ffd0000>; /* non-prefetchable memory */
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
||||
@@ -83,8 +83,8 @@
|
||||
#size-cells = <1>;
|
||||
compatible = "simple-bus";
|
||||
ranges = <0x50000000 0x50000000 0x10000000
|
||||
0xb0000000 0xb0000000 0x10000000
|
||||
0xd0000000 0xd0000000 0x02000000
|
||||
0x80000000 0x80000000 0x20000000
|
||||
0xb0000000 0xb0000000 0x22000000
|
||||
0xd8000000 0xd8000000 0x01000000
|
||||
0xe0000000 0xe0000000 0x10000000>;
|
||||
|
||||
@@ -220,6 +220,11 @@
|
||||
0xd8000000 0xd8000000 0x01000000
|
||||
0xe0000000 0xe0000000 0x10000000>;
|
||||
|
||||
misc: syscon@e0700000 {
|
||||
compatible = "st,spear1340-misc", "syscon";
|
||||
reg = <0xe0700000 0x1000>;
|
||||
};
|
||||
|
||||
gpio0: gpio@e0600000 {
|
||||
compatible = "arm,pl061", "arm,primecell";
|
||||
reg = <0xe0600000 0x1000>;
|
||||
|
||||
@@ -562,10 +562,14 @@
|
||||
};
|
||||
|
||||
pcie-controller@80003000 {
|
||||
pex-clk-supply = <&pci_clk_reg>;
|
||||
vdd-supply = <&pci_vdd_reg>;
|
||||
status = "okay";
|
||||
|
||||
avdd-pex-supply = <&pci_vdd_reg>;
|
||||
vdd-pex-supply = <&pci_vdd_reg>;
|
||||
avdd-pex-pll-supply = <&pci_vdd_reg>;
|
||||
avdd-plle-supply = <&pci_vdd_reg>;
|
||||
vddio-pex-clk-supply = <&pci_clk_reg>;
|
||||
|
||||
pci@1,0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -474,8 +474,11 @@
|
||||
};
|
||||
|
||||
pcie-controller@80003000 {
|
||||
pex-clk-supply = <&pci_clk_reg>;
|
||||
vdd-supply = <&pci_vdd_reg>;
|
||||
avdd-pex-supply = <&pci_vdd_reg>;
|
||||
vdd-pex-supply = <&pci_vdd_reg>;
|
||||
avdd-pex-pll-supply = <&pci_vdd_reg>;
|
||||
avdd-plle-supply = <&pci_vdd_reg>;
|
||||
vddio-pex-clk-supply = <&pci_clk_reg>;
|
||||
};
|
||||
|
||||
usb@c5008000 {
|
||||
|
||||
@@ -318,8 +318,12 @@
|
||||
|
||||
pcie-controller@80003000 {
|
||||
status = "okay";
|
||||
pex-clk-supply = <&pci_clk_reg>;
|
||||
vdd-supply = <&pci_vdd_reg>;
|
||||
|
||||
avdd-pex-supply = <&pci_vdd_reg>;
|
||||
vdd-pex-supply = <&pci_vdd_reg>;
|
||||
avdd-pex-pll-supply = <&pci_vdd_reg>;
|
||||
avdd-plle-supply = <&pci_vdd_reg>;
|
||||
vddio-pex-clk-supply = <&pci_clk_reg>;
|
||||
|
||||
pci@1,0 {
|
||||
status = "okay";
|
||||
|
||||
@@ -17,9 +17,15 @@
|
||||
|
||||
pcie-controller@00003000 {
|
||||
status = "okay";
|
||||
pex-clk-supply = <&sys_3v3_pexs_reg>;
|
||||
vdd-supply = <&ldo1_reg>;
|
||||
avdd-supply = <&ldo2_reg>;
|
||||
|
||||
avdd-pexa-supply = <&ldo1_reg>;
|
||||
vdd-pexa-supply = <&ldo1_reg>;
|
||||
avdd-pexb-supply = <&ldo1_reg>;
|
||||
vdd-pexb-supply = <&ldo1_reg>;
|
||||
avdd-pex-pll-supply = <&ldo1_reg>;
|
||||
avdd-plle-supply = <&ldo1_reg>;
|
||||
vddio-pex-ctl-supply = <&sys_3v3_reg>;
|
||||
hvdd-pex-supply = <&sys_3v3_pexs_reg>;
|
||||
|
||||
pci@1,0 {
|
||||
status = "okay";
|
||||
|
||||
@@ -38,9 +38,14 @@
|
||||
|
||||
pcie-controller@00003000 {
|
||||
status = "okay";
|
||||
pex-clk-supply = <&pex_hvdd_3v3_reg>;
|
||||
vdd-supply = <&ldo1_reg>;
|
||||
avdd-supply = <&ldo2_reg>;
|
||||
|
||||
/* AVDD_PEXA and VDD_PEXA inputs are grounded on Cardhu. */
|
||||
avdd-pexb-supply = <&ldo1_reg>;
|
||||
vdd-pexb-supply = <&ldo1_reg>;
|
||||
avdd-pex-pll-supply = <&ldo1_reg>;
|
||||
hvdd-pex-supply = <&pex_hvdd_3v3_reg>;
|
||||
vddio-pex-ctl-supply = <&sys_3v3_reg>;
|
||||
avdd-plle-supply = <&ldo2_reg>;
|
||||
|
||||
pci@1,0 {
|
||||
nvidia,num-lanes = <4>;
|
||||
|
||||
@@ -26,8 +26,6 @@ CONFIG_ARCH_OMAP=y
|
||||
CONFIG_ARCH_OMAP1=y
|
||||
CONFIG_OMAP_RESET_CLOCKS=y
|
||||
# CONFIG_OMAP_MUX is not set
|
||||
CONFIG_MAILBOX=y
|
||||
CONFIG_OMAP1_MBOX=y
|
||||
CONFIG_OMAP_32K_TIMER=y
|
||||
CONFIG_OMAP_DM_TIMER=y
|
||||
CONFIG_ARCH_OMAP730=y
|
||||
|
||||
@@ -11,13 +11,24 @@ CONFIG_ARCH_SPEAR13XX=y
|
||||
CONFIG_MACH_SPEAR1310=y
|
||||
CONFIG_MACH_SPEAR1340=y
|
||||
# CONFIG_SWP_EMULATE is not set
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCI_MSI=y
|
||||
CONFIG_PCIE_SPEAR13XX=y
|
||||
CONFIG_SMP=y
|
||||
# CONFIG_SMP_ON_UP is not set
|
||||
# CONFIG_ARM_CPU_TOPOLOGY is not set
|
||||
CONFIG_AEABI=y
|
||||
CONFIG_ARM_APPENDED_DTB=y
|
||||
CONFIG_ARM_ATAG_DTB_COMPAT=y
|
||||
CONFIG_VFP=y
|
||||
CONFIG_BINFMT_MISC=y
|
||||
CONFIG_NET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_PNP_BOOTP=y
|
||||
CONFIG_NET_IPIP=y
|
||||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_OF_PARTS=y
|
||||
@@ -27,6 +38,7 @@ CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_FSMC=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_SIZE=16384
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_ATA=y
|
||||
# CONFIG_SATA_PMP is not set
|
||||
CONFIG_SATA_AHCI_PLATFORM=y
|
||||
@@ -66,6 +78,7 @@ CONFIG_USB=y
|
||||
# CONFIG_USB_DEVICE_CLASS is not set
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_SPEAR=y
|
||||
@@ -79,11 +92,14 @@ CONFIG_EXT2_FS_SECURITY=y
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT3_FS_SECURITY=y
|
||||
CONFIG_AUTOFS4_FS=m
|
||||
CONFIG_FUSE_FS=y
|
||||
CONFIG_MSDOS_FS=m
|
||||
CONFIG_VFAT_FS=m
|
||||
CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
|
||||
CONFIG_TMPFS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_NLS_DEFAULT="utf8"
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ASCII=m
|
||||
|
||||
@@ -200,6 +200,7 @@ static struct clk_lookup periph_clocks_lookups[] = {
|
||||
CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk),
|
||||
CLKDEV_CON_DEV_ID(NULL, "at91sam9rl-pwm", &pwm_clk),
|
||||
/* fake hclk clock */
|
||||
CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk),
|
||||
CLKDEV_CON_ID("pioA", &pioA_clk),
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user