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Backmerge tag 'v4.13-rc2' into drm-next
Linux 4.13-rc2 This is required for drm-misc fixing.
This commit is contained in:
Dave Airlie
@@ -11,6 +11,7 @@ Required properties:
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- reg-names: Names of the registers.
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"amac_base": Address and length of the GMAC registers
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"idm_base": Address and length of the GMAC IDM registers
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(required for NSP and Northstar2)
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"nicpm_base": Address and length of the NIC Port Manager
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registers (required for Northstar2)
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- interrupts: Interrupt number
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@@ -1,24 +0,0 @@
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Broadcom GMAC Ethernet Controller Device Tree Bindings
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-------------------------------------------------------------
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Required properties:
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- compatible: "brcm,bgmac-nsp"
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- reg: Address and length of the GMAC registers,
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Address and length of the GMAC IDM registers
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- reg-names: Names of the registers. Must have both "gmac_base" and
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"idm_base"
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- interrupts: Interrupt number
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Optional properties:
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- mac-address: See ethernet.txt file in the same directory
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Examples:
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gmac0: ethernet@18022000 {
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compatible = "brcm,bgmac-nsp";
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reg = <0x18022000 0x1000>,
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<0x18110000 0x1000>;
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reg-names = "gmac_base", "idm_base";
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interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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@@ -4,7 +4,7 @@ Required properties:
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- compatible: Should be one of the following.
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- "rockchip,rk3066a-efuse" - for RK3066a SoCs.
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- "rockchip,rk3188-efuse" - for RK3188 SoCs.
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- "rockchip,rk322x-efuse" - for RK322x SoCs.
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- "rockchip,rk3228-efuse" - for RK3228 SoCs.
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- "rockchip,rk3288-efuse" - for RK3288 SoCs.
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- "rockchip,rk3399-efuse" - for RK3399 SoCs.
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- reg: Should contain the registers location and exact eFuse size
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@@ -1,13 +1,20 @@
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* Broadcom Digital Timing Engine(DTE) based PTP clock driver
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* Broadcom Digital Timing Engine(DTE) based PTP clock
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Required properties:
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- compatible: should be "brcm,ptp-dte"
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- compatible: should contain the core compatibility string
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and the SoC compatibility string. The SoC
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compatibility string is to handle SoC specific
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hardware differences.
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Core compatibility string:
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"brcm,ptp-dte"
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SoC compatibility strings:
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"brcm,iproc-ptp-dte" - for iproc based SoC's
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- reg: address and length of the DTE block's NCO registers
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Example:
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ptp_dte: ptp_dte@180af650 {
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compatible = "brcm,ptp-dte";
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ptp: ptp-dte@180af650 {
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compatible = "brcm,iproc-ptp-dte", "brcm,ptp-dte";
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reg = <0x180af650 0x10>;
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status = "okay";
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};
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@@ -9,7 +9,6 @@ Optional properties:
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- fsl,irda-mode : Indicate the uart supports irda mode
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- fsl,dte-mode : Indicate the uart works in DTE mode. The uart works
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in DCE mode by default.
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- fsl,dma-size : Indicate the size of the DMA buffer and its periods
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Please check Documentation/devicetree/bindings/serial/serial.txt
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for the complete list of generic properties.
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@@ -29,5 +28,4 @@ uart1: serial@73fbc000 {
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interrupts = <31>;
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uart-has-rtscts;
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fsl,dte-mode;
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fsl,dma-size = <1024 4>;
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};
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+2563
-2555
File diff suppressed because it is too large
Load Diff
@@ -1,7 +1,7 @@
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VERSION = 4
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PATCHLEVEL = 13
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SUBLEVEL = 0
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EXTRAVERSION = -rc1
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EXTRAVERSION = -rc2
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NAME = Fearless Coyote
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# *DOCUMENTATION*
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@@ -100,7 +100,7 @@
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#define TIOCGPKT _IOR('T', 0x38, int) /* Get packet mode state */
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#define TIOCGPTLCK _IOR('T', 0x39, int) /* Get Pty lock state */
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#define TIOCGEXCL _IOR('T', 0x40, int) /* Get exclusive mode state */
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#define TIOCGPTPEER _IOR('T', 0x41, int) /* Safely open the slave */
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#define TIOCGPTPEER _IO('T', 0x41) /* Safely open the slave */
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#define TIOCSERCONFIG 0x5453
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#define TIOCSERGWILD 0x5454
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@@ -37,7 +37,7 @@ do { \
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".pushsection .rodata.str, \"aMS\", %progbits, 1\n" \
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"2:\t.asciz " #__file "\n" \
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".popsection\n" \
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".pushsection __bug_table,\"a\"\n" \
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".pushsection __bug_table,\"aw\"\n" \
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".align 2\n" \
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"3:\t.word 1b, 2b\n" \
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"\t.hword " #__line ", 0\n" \
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@@ -116,7 +116,7 @@ struct cpu_cache_fns {
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void (*dma_unmap_area)(const void *, size_t, int);
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void (*dma_flush_range)(const void *, const void *);
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};
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} __no_randomize_layout;
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/*
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* Select the calling method
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@@ -36,7 +36,7 @@
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#ifdef CONFIG_GENERIC_BUG
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#define __BUG_ENTRY(flags) \
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".pushsection __bug_table,\"a\"\n\t" \
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".pushsection __bug_table,\"aw\"\n\t" \
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".align 2\n\t" \
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"0: .long 1f - 0b\n\t" \
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_BUGVERBOSE_LOCATION(__FILE__, __LINE__) \
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@@ -21,7 +21,7 @@
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#define _BUG_OR_WARN(flags) \
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asm volatile( \
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"1: .hword %0\n" \
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" .section __bug_table,\"a\",@progbits\n" \
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" .section __bug_table,\"aw\",@progbits\n" \
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"2: .long 1b\n" \
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" .long %1\n" \
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" .short %2\n" \
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@@ -38,7 +38,7 @@
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#define _BUG_OR_WARN(flags) \
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asm volatile( \
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"1: .hword %0\n" \
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" .section __bug_table,\"a\",@progbits\n" \
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" .section __bug_table,\"aw\",@progbits\n" \
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"2: .long 1b\n" \
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" .short %1\n" \
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" .org 2b + %2\n" \
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@@ -44,8 +44,7 @@ flat_get_relocate_addr (unsigned long relval)
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return relval & 0x03ffffff; /* Mask out top 6 bits */
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}
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static inline int flat_set_persistent(unsigned long relval,
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unsigned long *persistent)
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static inline int flat_set_persistent(u32 relval, u32 *persistent)
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{
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int type = (relval >> 26) & 7;
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if (type == 3) {
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@@ -32,7 +32,7 @@ unsigned long bfin_get_addr_from_rp(u32 *ptr,
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break;
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case FLAT_BFIN_RELOC_TYPE_32_BIT:
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pr_debug("*ptr = %lx", get_unaligned(ptr));
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pr_debug("*ptr = %x", get_unaligned(ptr));
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val = get_unaligned(ptr);
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break;
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@@ -77,7 +77,7 @@ void bfin_put_addr_at_rp(u32 *ptr, u32 addr, u32 relval)
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case FLAT_BFIN_RELOC_TYPE_32_BIT:
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put_unaligned(addr, ptr);
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pr_debug("new ptr =%lx", get_unaligned(ptr));
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pr_debug("new ptr =%x", get_unaligned(ptr));
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break;
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}
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}
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@@ -24,7 +24,7 @@ static inline int flat_get_addr_from_rp(u32 __user *rp, u32 relval, u32 flags,
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u32 *addr, u32 *persistent)
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{
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u32 val = get_unaligned((__force u32 *)rp);
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if (!(flags & FLAT_FLAG_GOTPIC)
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if (!(flags & FLAT_FLAG_GOTPIC))
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val &= 0x00ffffff;
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*addr = val;
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return 0;
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@@ -30,8 +30,7 @@ static inline int flat_put_addr_at_rp(u32 __user *rp, u32 addr, u32 rel)
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}
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#define flat_get_relocate_addr(rel) (rel)
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static inline int flat_set_persistent(unsigned long relval,
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unsigned long *persistent)
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static inline int flat_set_persistent(u32 relval, u32 *persistent)
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{
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return 0;
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}
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@@ -91,7 +91,7 @@
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#define TIOCGPKT _IOR('T', 0x38, int) /* Get packet mode state */
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#define TIOCGPTLCK _IOR('T', 0x39, int) /* Get Pty lock state */
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#define TIOCGEXCL _IOR('T', 0x40, int) /* Get exclusive mode state */
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#define TIOCGPTPEER _IOR('T', 0x41, int) /* Safely open the slave */
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#define TIOCGPTPEER _IO('T', 0x41) /* Safely open the slave */
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/* I hope the range from 0x5480 on is free ... */
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#define TIOCSCTTY 0x5480 /* become controlling tty */
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@@ -21,7 +21,7 @@ do { \
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asm volatile( \
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" syscall 15 \n" \
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"0: \n" \
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" .section __bug_table,\"a\" \n" \
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" .section __bug_table,\"aw\" \n" \
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" .long 0b,%0,%1 \n" \
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" .previous \n" \
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: \
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@@ -27,7 +27,7 @@
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do { \
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asm volatile("\n" \
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"1:\t" PARISC_BUG_BREAK_ASM "\n" \
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"\t.pushsection __bug_table,\"a\"\n" \
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"\t.pushsection __bug_table,\"aw\"\n" \
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"2:\t" ASM_WORD_INSN "1b, %c0\n" \
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"\t.short %c1, %c2\n" \
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"\t.org 2b+%c3\n" \
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@@ -50,7 +50,7 @@
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do { \
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asm volatile("\n" \
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"1:\t" PARISC_BUG_BREAK_ASM "\n" \
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"\t.pushsection __bug_table,\"a\"\n" \
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"\t.pushsection __bug_table,\"aw\"\n" \
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"2:\t" ASM_WORD_INSN "1b, %c0\n" \
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"\t.short %c1, %c2\n" \
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"\t.org 2b+%c3\n" \
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@@ -64,7 +64,7 @@
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do { \
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asm volatile("\n" \
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"1:\t" PARISC_BUG_BREAK_ASM "\n" \
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"\t.pushsection __bug_table,\"a\"\n" \
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"\t.pushsection __bug_table,\"aw\"\n" \
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"2:\t" ASM_WORD_INSN "1b\n" \
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"\t.short %c0\n" \
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"\t.org 2b+%c1\n" \
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@@ -60,7 +60,7 @@
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#define TIOCGPKT _IOR('T', 0x38, int) /* Get packet mode state */
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#define TIOCGPTLCK _IOR('T', 0x39, int) /* Get Pty lock state */
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#define TIOCGEXCL _IOR('T', 0x40, int) /* Get exclusive mode state */
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#define TIOCGPTPEER _IOR('T', 0x41, int) /* Safely open the slave */
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#define TIOCGPTPEER _IO('T', 0x41) /* Safely open the slave */
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#define FIONCLEX 0x5450 /* these numbers need to be adjusted. */
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#define FIOCLEX 0x5451
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