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generic: sparse irqs: use irq_desc() together with dyn_array, instead of irq_desc[]
add CONFIG_HAVE_SPARSE_IRQ to for use condensed array. Get rid of irq_desc[] array assumptions. Preallocate 32 irq_desc, and irq_desc() will try to get more. ( No change in functionality is expected anywhere, except the odd build failure where we missed a code site or where a crossing commit itroduces new irq_desc[] usage. ) v2: according to Eric, change get_irq_desc() to irq_desc() Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
@@ -105,3 +105,7 @@ config HAVE_CLK
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config HAVE_DYN_ARRAY
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def_bool n
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config HAVE_SPARSE_IRQ
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def_bool n
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@@ -34,6 +34,7 @@ config X86
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select HAVE_GENERIC_DMA_COHERENT if X86_32
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select HAVE_EFFICIENT_UNALIGNED_ACCESS
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select HAVE_DYN_ARRAY
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select HAVE_SPARSE_IRQ if X86_64
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config ARCH_DEFCONFIG
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string
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@@ -345,6 +345,7 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t cpumask)
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struct irq_pin_list *entry = irq_2_pin + irq;
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unsigned int apicid_value;
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cpumask_t tmp;
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struct irq_desc *desc;
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cpus_and(tmp, cpumask, cpu_online_map);
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if (cpus_empty(tmp))
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@@ -365,7 +366,8 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t cpumask)
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break;
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entry = irq_2_pin + entry->next;
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}
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irq_desc[irq].affinity = cpumask;
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desc = irq_to_desc(irq);
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desc->affinity = cpumask;
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spin_unlock_irqrestore(&ioapic_lock, flags);
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}
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@@ -475,10 +477,12 @@ static inline void balance_irq(int cpu, int irq)
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static inline void rotate_irqs_among_cpus(unsigned long useful_load_threshold)
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{
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int i, j;
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struct irq_desc *desc;
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for_each_online_cpu(i) {
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for (j = 0; j < nr_irqs; j++) {
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if (!irq_desc[j].action)
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desc = irq_to_desc(j);
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if (!desc->action)
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continue;
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/* Is it a significant load ? */
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if (IRQ_DELTA(CPU_TO_PACKAGEINDEX(i), j) <
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@@ -505,6 +509,7 @@ static void do_irq_balance(void)
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unsigned long tmp_cpu_irq;
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unsigned long imbalance = 0;
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cpumask_t allowed_mask, target_cpu_mask, tmp;
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struct irq_desc *desc;
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for_each_possible_cpu(i) {
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int package_index;
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@@ -515,7 +520,8 @@ static void do_irq_balance(void)
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for (j = 0; j < nr_irqs; j++) {
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unsigned long value_now, delta;
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/* Is this an active IRQ or balancing disabled ? */
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if (!irq_desc[j].action || irq_balancing_disabled(j))
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desc = irq_to_desc(j);
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if (!desc->action || irq_balancing_disabled(j))
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continue;
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if (package_index == i)
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IRQ_DELTA(package_index, j) = 0;
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@@ -609,7 +615,8 @@ tryanotherirq:
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selected_irq = -1;
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for (j = 0; j < nr_irqs; j++) {
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/* Is this an active IRQ? */
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if (!irq_desc[j].action)
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desc = irq_to_desc(j);
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if (!desc->action)
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continue;
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if (imbalance <= IRQ_DELTA(max_loaded, j))
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continue;
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@@ -682,10 +689,12 @@ static int balanced_irq(void *unused)
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int i;
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unsigned long prev_balance_time = jiffies;
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long time_remaining = balanced_irq_interval;
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struct irq_desc *desc;
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/* push everything to CPU 0 to give us a starting point. */
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for (i = 0 ; i < nr_irqs ; i++) {
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irq_desc[i].pending_mask = cpumask_of_cpu(0);
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desc = irq_to_desc(i);
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desc->pending_mask = cpumask_of_cpu(0);
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set_pending_irq(i, cpumask_of_cpu(0));
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}
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@@ -1254,13 +1263,16 @@ static struct irq_chip ioapic_chip;
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static void ioapic_register_intr(int irq, int vector, unsigned long trigger)
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{
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struct irq_desc *desc;
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desc = irq_to_desc(irq);
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if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) ||
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trigger == IOAPIC_LEVEL) {
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irq_desc[irq].status |= IRQ_LEVEL;
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desc->status |= IRQ_LEVEL;
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set_irq_chip_and_handler_name(irq, &ioapic_chip,
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handle_fasteoi_irq, "fasteoi");
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} else {
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irq_desc[irq].status &= ~IRQ_LEVEL;
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desc->status &= ~IRQ_LEVEL;
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set_irq_chip_and_handler_name(irq, &ioapic_chip,
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handle_edge_irq, "edge");
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}
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@@ -2027,6 +2039,7 @@ static struct irq_chip ioapic_chip __read_mostly = {
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static inline void init_IO_APIC_traps(void)
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{
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int irq;
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struct irq_desc *desc;
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/*
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* NOTE! The local APIC isn't very good at handling
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@@ -2048,9 +2061,11 @@ static inline void init_IO_APIC_traps(void)
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*/
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if (irq < 16)
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make_8259A_irq(irq);
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else
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else {
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desc = irq_to_desc(irq);
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/* Strange. Oh, well.. */
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irq_desc[irq].chip = &no_irq_chip;
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desc->chip = &no_irq_chip;
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}
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}
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}
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}
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@@ -2089,7 +2104,10 @@ static struct irq_chip lapic_chip __read_mostly = {
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static void lapic_register_intr(int irq, int vector)
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{
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irq_desc[irq].status &= ~IRQ_LEVEL;
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struct irq_desc *desc;
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desc = irq_to_desc(irq);
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desc->status &= ~IRQ_LEVEL;
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set_irq_chip_and_handler_name(irq, &lapic_chip, handle_edge_irq,
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"edge");
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set_intr_gate(vector, interrupt[irq]);
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@@ -2556,6 +2574,7 @@ static void set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
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unsigned int dest;
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cpumask_t tmp;
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int vector;
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struct irq_desc *desc;
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cpus_and(tmp, mask, cpu_online_map);
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if (cpus_empty(tmp))
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@@ -2575,7 +2594,8 @@ static void set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
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msg.address_lo |= MSI_ADDR_DEST_ID(dest);
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write_msi_msg(irq, &msg);
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irq_desc[irq].affinity = mask;
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desc = irq_to_desc(irq);
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desc->affinity = mask;
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}
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#endif /* CONFIG_SMP */
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@@ -2649,6 +2669,7 @@ static void set_ht_irq_affinity(unsigned int irq, cpumask_t mask)
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{
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unsigned int dest;
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cpumask_t tmp;
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struct irq_desc *desc;
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cpus_and(tmp, mask, cpu_online_map);
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if (cpus_empty(tmp))
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@@ -2659,7 +2680,8 @@ static void set_ht_irq_affinity(unsigned int irq, cpumask_t mask)
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dest = cpu_mask_to_apicid(mask);
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target_ht_irq(irq, dest);
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irq_desc[irq].affinity = mask;
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desc = irq_to_desc(irq);
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desc->affinity = mask;
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}
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#endif
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@@ -345,6 +345,7 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t mask)
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unsigned long flags;
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unsigned int dest;
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cpumask_t tmp;
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struct irq_desc *desc;
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cpus_and(tmp, mask, cpu_online_map);
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if (cpus_empty(tmp))
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@@ -361,9 +362,10 @@ static void set_ioapic_affinity_irq(unsigned int irq, cpumask_t mask)
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*/
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dest = SET_APIC_LOGICAL_ID(dest);
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desc = irq_to_desc(irq);
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spin_lock_irqsave(&ioapic_lock, flags);
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__target_IO_APIC_irq(irq, dest, cfg->vector);
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irq_desc[irq].affinity = mask;
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desc->affinity = mask;
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spin_unlock_irqrestore(&ioapic_lock, flags);
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}
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#endif
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@@ -933,14 +935,17 @@ static struct irq_chip ir_ioapic_chip;
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static void ioapic_register_intr(int irq, unsigned long trigger)
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{
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struct irq_desc *desc;
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desc = irq_to_desc(irq);
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if (trigger)
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irq_desc[irq].status |= IRQ_LEVEL;
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desc->status |= IRQ_LEVEL;
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else
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irq_desc[irq].status &= ~IRQ_LEVEL;
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desc->status &= ~IRQ_LEVEL;
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#ifdef CONFIG_INTR_REMAP
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if (irq_remapped(irq)) {
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irq_desc[irq].status |= IRQ_MOVE_PCNTXT;
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desc->status |= IRQ_MOVE_PCNTXT;
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if (trigger)
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set_irq_chip_and_handler_name(irq, &ir_ioapic_chip,
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handle_fasteoi_irq,
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@@ -1596,10 +1601,10 @@ static DECLARE_DELAYED_WORK(ir_migration_work, ir_irq_migration);
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static void migrate_ioapic_irq(int irq, cpumask_t mask)
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{
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struct irq_cfg *cfg = irq_cfg + irq;
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struct irq_desc *desc = irq_desc + irq;
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struct irq_desc *desc;
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cpumask_t tmp, cleanup_mask;
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struct irte irte;
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int modify_ioapic_rte = desc->status & IRQ_LEVEL;
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int modify_ioapic_rte;
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unsigned int dest;
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unsigned long flags;
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@@ -1616,6 +1621,8 @@ static void migrate_ioapic_irq(int irq, cpumask_t mask)
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cpus_and(tmp, cfg->domain, mask);
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dest = cpu_mask_to_apicid(tmp);
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desc = irq_to_desc(irq);
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modify_ioapic_rte = desc->status & IRQ_LEVEL;
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if (modify_ioapic_rte) {
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spin_lock_irqsave(&ioapic_lock, flags);
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__target_IO_APIC_irq(irq, dest, cfg->vector);
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@@ -1637,12 +1644,13 @@ static void migrate_ioapic_irq(int irq, cpumask_t mask)
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cfg->move_in_progress = 0;
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}
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irq_desc[irq].affinity = mask;
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desc->affinity = mask;
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}
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static int migrate_irq_remapped_level(int irq)
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{
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int ret = -1;
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struct irq_desc *desc = irq_to_desc(irq);
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mask_IO_APIC_irq(irq);
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@@ -1658,11 +1666,11 @@ static int migrate_irq_remapped_level(int irq)
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}
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/* everthing is clear. we have right of way */
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migrate_ioapic_irq(irq, irq_desc[irq].pending_mask);
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migrate_ioapic_irq(irq, desc->pending_mask);
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ret = 0;
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irq_desc[irq].status &= ~IRQ_MOVE_PENDING;
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cpus_clear(irq_desc[irq].pending_mask);
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desc->status &= ~IRQ_MOVE_PENDING;
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cpus_clear(desc->pending_mask);
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unmask:
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unmask_IO_APIC_irq(irq);
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@@ -1674,7 +1682,7 @@ static void ir_irq_migration(struct work_struct *work)
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int irq;
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for (irq = 0; irq < nr_irqs; irq++) {
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struct irq_desc *desc = irq_desc + irq;
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struct irq_desc *desc = irq_to_desc(irq);
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if (desc->status & IRQ_MOVE_PENDING) {
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unsigned long flags;
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@@ -1686,8 +1694,7 @@ static void ir_irq_migration(struct work_struct *work)
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continue;
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}
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desc->chip->set_affinity(irq,
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irq_desc[irq].pending_mask);
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desc->chip->set_affinity(irq, desc->pending_mask);
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spin_unlock_irqrestore(&desc->lock, flags);
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}
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}
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@@ -1698,9 +1705,11 @@ static void ir_irq_migration(struct work_struct *work)
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*/
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static void set_ir_ioapic_affinity_irq(unsigned int irq, cpumask_t mask)
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{
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if (irq_desc[irq].status & IRQ_LEVEL) {
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irq_desc[irq].status |= IRQ_MOVE_PENDING;
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irq_desc[irq].pending_mask = mask;
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struct irq_desc *desc = irq_to_desc(irq);
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if (desc->status & IRQ_LEVEL) {
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desc->status |= IRQ_MOVE_PENDING;
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desc->pending_mask = mask;
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migrate_irq_remapped_level(irq);
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return;
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}
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@@ -1725,7 +1734,7 @@ asmlinkage void smp_irq_move_cleanup_interrupt(void)
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if (irq >= nr_irqs)
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continue;
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desc = irq_desc + irq;
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desc = irq_to_desc(irq);
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cfg = irq_cfg + irq;
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spin_lock(&desc->lock);
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if (!cfg->move_cleanup_count)
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@@ -1791,7 +1800,7 @@ static void ack_apic_level(unsigned int irq)
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irq_complete_move(irq);
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#ifdef CONFIG_GENERIC_PENDING_IRQ
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/* If we are moving the irq we need to mask it */
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if (unlikely(irq_desc[irq].status & IRQ_MOVE_PENDING)) {
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if (unlikely(irq_to_desc(irq)->status & IRQ_MOVE_PENDING)) {
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do_unmask_irq = 1;
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mask_IO_APIC_irq(irq);
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}
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@@ -1868,6 +1877,7 @@ static struct irq_chip ir_ioapic_chip __read_mostly = {
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static inline void init_IO_APIC_traps(void)
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{
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int irq;
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struct irq_desc *desc;
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/*
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* NOTE! The local APIC isn't very good at handling
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@@ -1889,9 +1899,11 @@ static inline void init_IO_APIC_traps(void)
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*/
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if (irq < 16)
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make_8259A_irq(irq);
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else
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else {
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desc = irq_to_desc(irq);
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/* Strange. Oh, well.. */
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irq_desc[irq].chip = &no_irq_chip;
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desc->chip = &no_irq_chip;
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}
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}
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}
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}
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@@ -1926,7 +1938,10 @@ static struct irq_chip lapic_chip __read_mostly = {
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static void lapic_register_intr(int irq)
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{
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irq_desc[irq].status &= ~IRQ_LEVEL;
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struct irq_desc *desc;
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desc = irq_to_desc(irq);
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desc->status &= ~IRQ_LEVEL;
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set_irq_chip_and_handler_name(irq, &lapic_chip, handle_edge_irq,
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"edge");
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}
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@@ -2402,6 +2417,7 @@ static void set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
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struct msi_msg msg;
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unsigned int dest;
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cpumask_t tmp;
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struct irq_desc *desc;
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cpus_and(tmp, mask, cpu_online_map);
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if (cpus_empty(tmp))
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@@ -2421,7 +2437,8 @@ static void set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
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msg.address_lo |= MSI_ADDR_DEST_ID(dest);
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write_msi_msg(irq, &msg);
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irq_desc[irq].affinity = mask;
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desc = irq_to_desc(irq);
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desc->affinity = mask;
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}
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#ifdef CONFIG_INTR_REMAP
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@@ -2435,6 +2452,7 @@ static void ir_set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
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unsigned int dest;
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cpumask_t tmp, cleanup_mask;
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struct irte irte;
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struct irq_desc *desc;
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cpus_and(tmp, mask, cpu_online_map);
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if (cpus_empty(tmp))
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@@ -2469,7 +2487,8 @@ static void ir_set_msi_irq_affinity(unsigned int irq, cpumask_t mask)
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cfg->move_in_progress = 0;
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}
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irq_desc[irq].affinity = mask;
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desc = irq_to_desc(irq);
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desc->affinity = mask;
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}
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#endif
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#endif /* CONFIG_SMP */
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@@ -2543,7 +2562,7 @@ static int setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc, int irq)
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#ifdef CONFIG_INTR_REMAP
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if (irq_remapped(irq)) {
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struct irq_desc *desc = irq_desc + irq;
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struct irq_desc *desc = irq_to_desc(irq);
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/*
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* irq migration in process context
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*/
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@@ -2655,6 +2674,7 @@ static void dmar_msi_set_affinity(unsigned int irq, cpumask_t mask)
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struct msi_msg msg;
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unsigned int dest;
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cpumask_t tmp;
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struct irq_desc *desc;
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cpus_and(tmp, mask, cpu_online_map);
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if (cpus_empty(tmp))
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@@ -2674,7 +2694,8 @@ static void dmar_msi_set_affinity(unsigned int irq, cpumask_t mask)
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msg.address_lo |= MSI_ADDR_DEST_ID(dest);
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dmar_msi_write(irq, &msg);
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irq_desc[irq].affinity = mask;
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desc = irq_to_desc(irq);
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desc->affinity = mask;
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}
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#endif /* CONFIG_SMP */
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|
||||
@@ -2731,6 +2752,7 @@ static void set_ht_irq_affinity(unsigned int irq, cpumask_t mask)
|
||||
struct irq_cfg *cfg = irq_cfg + irq;
|
||||
unsigned int dest;
|
||||
cpumask_t tmp;
|
||||
struct irq_desc *desc;
|
||||
|
||||
cpus_and(tmp, mask, cpu_online_map);
|
||||
if (cpus_empty(tmp))
|
||||
@@ -2743,7 +2765,8 @@ static void set_ht_irq_affinity(unsigned int irq, cpumask_t mask)
|
||||
dest = cpu_mask_to_apicid(tmp);
|
||||
|
||||
target_ht_irq(irq, dest, cfg->vector);
|
||||
irq_desc[irq].affinity = mask;
|
||||
desc = irq_to_desc(irq);
|
||||
desc->affinity = mask;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
+14
-10
@@ -224,7 +224,7 @@ unsigned int do_IRQ(struct pt_regs *regs)
|
||||
struct pt_regs *old_regs;
|
||||
/* high bit used in ret_from_ code */
|
||||
int overflow, irq = ~regs->orig_ax;
|
||||
struct irq_desc *desc = irq_desc + irq;
|
||||
struct irq_desc *desc = irq_to_desc(irq);
|
||||
|
||||
if (unlikely((unsigned)irq >= nr_irqs)) {
|
||||
printk(KERN_EMERG "%s: cannot handle IRQ %d\n",
|
||||
@@ -273,15 +273,16 @@ int show_interrupts(struct seq_file *p, void *v)
|
||||
|
||||
if (i < nr_irqs) {
|
||||
unsigned any_count = 0;
|
||||
struct irq_desc *desc = irq_to_desc(i);
|
||||
|
||||
spin_lock_irqsave(&irq_desc[i].lock, flags);
|
||||
spin_lock_irqsave(&desc->lock, flags);
|
||||
#ifndef CONFIG_SMP
|
||||
any_count = kstat_irqs(i);
|
||||
#else
|
||||
for_each_online_cpu(j)
|
||||
any_count |= kstat_cpu(j).irqs[i];
|
||||
#endif
|
||||
action = irq_desc[i].action;
|
||||
action = desc->action;
|
||||
if (!action && !any_count)
|
||||
goto skip;
|
||||
seq_printf(p, "%3d: ",i);
|
||||
@@ -291,8 +292,8 @@ int show_interrupts(struct seq_file *p, void *v)
|
||||
for_each_online_cpu(j)
|
||||
seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
|
||||
#endif
|
||||
seq_printf(p, " %8s", irq_desc[i].chip->name);
|
||||
seq_printf(p, "-%-8s", irq_desc[i].name);
|
||||
seq_printf(p, " %8s", desc->chip->name);
|
||||
seq_printf(p, "-%-8s", desc->name);
|
||||
|
||||
if (action) {
|
||||
seq_printf(p, " %s", action->name);
|
||||
@@ -302,7 +303,7 @@ int show_interrupts(struct seq_file *p, void *v)
|
||||
|
||||
seq_putc(p, '\n');
|
||||
skip:
|
||||
spin_unlock_irqrestore(&irq_desc[i].lock, flags);
|
||||
spin_unlock_irqrestore(&desc->lock, flags);
|
||||
} else if (i == nr_irqs) {
|
||||
seq_printf(p, "NMI: ");
|
||||
for_each_online_cpu(j)
|
||||
@@ -398,17 +399,20 @@ void fixup_irqs(cpumask_t map)
|
||||
|
||||
for (irq = 0; irq < nr_irqs; irq++) {
|
||||
cpumask_t mask;
|
||||
struct irq_desc *desc;
|
||||
|
||||
if (irq == 2)
|
||||
continue;
|
||||
|
||||
cpus_and(mask, irq_desc[irq].affinity, map);
|
||||
desc = irq_to_desc(irq);
|
||||
cpus_and(mask, desc->affinity, map);
|
||||
if (any_online_cpu(mask) == NR_CPUS) {
|
||||
printk("Breaking affinity for irq %i\n", irq);
|
||||
mask = map;
|
||||
}
|
||||
if (irq_desc[irq].chip->set_affinity)
|
||||
irq_desc[irq].chip->set_affinity(irq, mask);
|
||||
else if (irq_desc[irq].action && !(warned++))
|
||||
if (desc->chip->set_affinity)
|
||||
desc->chip->set_affinity(irq, mask);
|
||||
else if (desc->action && !(warned++))
|
||||
printk("Cannot set affinity for irq %i\n", irq);
|
||||
}
|
||||
|
||||
|
||||
+19
-16
@@ -83,15 +83,16 @@ int show_interrupts(struct seq_file *p, void *v)
|
||||
|
||||
if (i < nr_irqs) {
|
||||
unsigned any_count = 0;
|
||||
struct irq_desc *desc = irq_to_desc(i);
|
||||
|
||||
spin_lock_irqsave(&irq_desc[i].lock, flags);
|
||||
spin_lock_irqsave(&desc->lock, flags);
|
||||
#ifndef CONFIG_SMP
|
||||
any_count = kstat_irqs(i);
|
||||
#else
|
||||
for_each_online_cpu(j)
|
||||
any_count |= kstat_cpu(j).irqs[i];
|
||||
#endif
|
||||
action = irq_desc[i].action;
|
||||
action = desc->action;
|
||||
if (!action && !any_count)
|
||||
goto skip;
|
||||
seq_printf(p, "%3d: ",i);
|
||||
@@ -101,8 +102,8 @@ int show_interrupts(struct seq_file *p, void *v)
|
||||
for_each_online_cpu(j)
|
||||
seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
|
||||
#endif
|
||||
seq_printf(p, " %8s", irq_desc[i].chip->name);
|
||||
seq_printf(p, "-%-8s", irq_desc[i].name);
|
||||
seq_printf(p, " %8s", desc->chip->name);
|
||||
seq_printf(p, "-%-8s", desc->name);
|
||||
|
||||
if (action) {
|
||||
seq_printf(p, " %s", action->name);
|
||||
@@ -111,7 +112,7 @@ int show_interrupts(struct seq_file *p, void *v)
|
||||
}
|
||||
seq_putc(p, '\n');
|
||||
skip:
|
||||
spin_unlock_irqrestore(&irq_desc[i].lock, flags);
|
||||
spin_unlock_irqrestore(&desc->lock, flags);
|
||||
} else if (i == nr_irqs) {
|
||||
seq_printf(p, "NMI: ");
|
||||
for_each_online_cpu(j)
|
||||
@@ -228,37 +229,39 @@ void fixup_irqs(cpumask_t map)
|
||||
cpumask_t mask;
|
||||
int break_affinity = 0;
|
||||
int set_affinity = 1;
|
||||
struct irq_desc *desc;
|
||||
|
||||
if (irq == 2)
|
||||
continue;
|
||||
|
||||
desc = irq_to_desc(irq);
|
||||
/* interrupt's are disabled at this point */
|
||||
spin_lock(&irq_desc[irq].lock);
|
||||
spin_lock(&desc->lock);
|
||||
|
||||
if (!irq_has_action(irq) ||
|
||||
cpus_equal(irq_desc[irq].affinity, map)) {
|
||||
spin_unlock(&irq_desc[irq].lock);
|
||||
cpus_equal(desc->affinity, map)) {
|
||||
spin_unlock(&desc->lock);
|
||||
continue;
|
||||
}
|
||||
|
||||
cpus_and(mask, irq_desc[irq].affinity, map);
|
||||
cpus_and(mask, desc->affinity, map);
|
||||
if (cpus_empty(mask)) {
|
||||
break_affinity = 1;
|
||||
mask = map;
|
||||
}
|
||||
|
||||
if (irq_desc[irq].chip->mask)
|
||||
irq_desc[irq].chip->mask(irq);
|
||||
if (desc->chip->mask)
|
||||
desc->chip->mask(irq);
|
||||
|
||||
if (irq_desc[irq].chip->set_affinity)
|
||||
irq_desc[irq].chip->set_affinity(irq, mask);
|
||||
if (desc->chip->set_affinity)
|
||||
desc->chip->set_affinity(irq, mask);
|
||||
else if (!(warned++))
|
||||
set_affinity = 0;
|
||||
|
||||
if (irq_desc[irq].chip->unmask)
|
||||
irq_desc[irq].chip->unmask(irq);
|
||||
if (desc->chip->unmask)
|
||||
desc->chip->unmask(irq);
|
||||
|
||||
spin_unlock(&irq_desc[irq].lock);
|
||||
spin_unlock(&desc->lock);
|
||||
|
||||
if (break_affinity && set_affinity)
|
||||
printk("Broke affinity for irq %i\n", irq);
|
||||
|
||||
@@ -143,9 +143,11 @@ void __init init_ISA_irqs(void)
|
||||
init_8259A(0);
|
||||
|
||||
for (i = 0; i < nr_irqs; i++) {
|
||||
irq_desc[i].status = IRQ_DISABLED;
|
||||
irq_desc[i].action = NULL;
|
||||
irq_desc[i].depth = 1;
|
||||
struct irq_desc *desc = irq_to_desc(i);
|
||||
|
||||
desc->status = IRQ_DISABLED;
|
||||
desc->action = NULL;
|
||||
desc->depth = 1;
|
||||
|
||||
if (i < 16) {
|
||||
/*
|
||||
@@ -157,7 +159,7 @@ void __init init_ISA_irqs(void)
|
||||
/*
|
||||
* 'high' PCI IRQs filled in on demand
|
||||
*/
|
||||
irq_desc[i].chip = &no_irq_chip;
|
||||
desc->chip = &no_irq_chip;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@@ -484,10 +484,11 @@ static void disable_cobalt_irq(unsigned int irq)
|
||||
static unsigned int startup_cobalt_irq(unsigned int irq)
|
||||
{
|
||||
unsigned long flags;
|
||||
struct irq_desc *desc = irq_to_desc(irq);
|
||||
|
||||
spin_lock_irqsave(&cobalt_lock, flags);
|
||||
if ((irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS | IRQ_WAITING)))
|
||||
irq_desc[irq].status &= ~(IRQ_DISABLED | IRQ_INPROGRESS | IRQ_WAITING);
|
||||
if ((desc->status & (IRQ_DISABLED | IRQ_INPROGRESS | IRQ_WAITING)))
|
||||
desc->status &= ~(IRQ_DISABLED | IRQ_INPROGRESS | IRQ_WAITING);
|
||||
enable_cobalt_irq(irq);
|
||||
spin_unlock_irqrestore(&cobalt_lock, flags);
|
||||
return 0;
|
||||
@@ -506,9 +507,10 @@ static void ack_cobalt_irq(unsigned int irq)
|
||||
static void end_cobalt_irq(unsigned int irq)
|
||||
{
|
||||
unsigned long flags;
|
||||
struct irq_desc *desc = irq_to_desc(irq);
|
||||
|
||||
spin_lock_irqsave(&cobalt_lock, flags);
|
||||
if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
|
||||
if (!(desc->status & (IRQ_DISABLED | IRQ_INPROGRESS)))
|
||||
enable_cobalt_irq(irq);
|
||||
spin_unlock_irqrestore(&cobalt_lock, flags);
|
||||
}
|
||||
@@ -626,7 +628,7 @@ static irqreturn_t piix4_master_intr(int irq, void *dev_id)
|
||||
|
||||
spin_unlock_irqrestore(&i8259A_lock, flags);
|
||||
|
||||
desc = irq_desc + realirq;
|
||||
desc = irq_to_desc(realirq);
|
||||
|
||||
/*
|
||||
* handle this 'virtual interrupt' as a Cobalt one now.
|
||||
@@ -662,27 +664,29 @@ void init_VISWS_APIC_irqs(void)
|
||||
int i;
|
||||
|
||||
for (i = 0; i < CO_IRQ_APIC0 + CO_APIC_LAST + 1; i++) {
|
||||
irq_desc[i].status = IRQ_DISABLED;
|
||||
irq_desc[i].action = 0;
|
||||
irq_desc[i].depth = 1;
|
||||
struct irq_desc *desc = irq_to_desc(i);
|
||||
|
||||
desc->status = IRQ_DISABLED;
|
||||
desc->action = 0;
|
||||
desc->depth = 1;
|
||||
|
||||
if (i == 0) {
|
||||
irq_desc[i].chip = &cobalt_irq_type;
|
||||
desc->chip = &cobalt_irq_type;
|
||||
}
|
||||
else if (i == CO_IRQ_IDE0) {
|
||||
irq_desc[i].chip = &cobalt_irq_type;
|
||||
desc->chip = &cobalt_irq_type;
|
||||
}
|
||||
else if (i == CO_IRQ_IDE1) {
|
||||
irq_desc[i].chip = &cobalt_irq_type;
|
||||
desc->chip = &cobalt_irq_type;
|
||||
}
|
||||
else if (i == CO_IRQ_8259) {
|
||||
irq_desc[i].chip = &piix4_master_irq_type;
|
||||
desc->chip = &piix4_master_irq_type;
|
||||
}
|
||||
else if (i < CO_IRQ_APIC0) {
|
||||
irq_desc[i].chip = &piix4_virtual_irq_type;
|
||||
desc->chip = &piix4_virtual_irq_type;
|
||||
}
|
||||
else if (IS_CO_APIC(i)) {
|
||||
irq_desc[i].chip = &cobalt_irq_type;
|
||||
desc->chip = &cobalt_irq_type;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -1483,7 +1483,7 @@ static void disable_local_vic_irq(unsigned int irq)
|
||||
* the interrupt off to another CPU */
|
||||
static void before_handle_vic_irq(unsigned int irq)
|
||||
{
|
||||
irq_desc_t *desc = irq_desc + irq;
|
||||
irq_desc_t *desc = irq_to_desc(irq);
|
||||
__u8 cpu = smp_processor_id();
|
||||
|
||||
_raw_spin_lock(&vic_irq_lock);
|
||||
@@ -1518,7 +1518,7 @@ static void before_handle_vic_irq(unsigned int irq)
|
||||
/* Finish the VIC interrupt: basically mask */
|
||||
static void after_handle_vic_irq(unsigned int irq)
|
||||
{
|
||||
irq_desc_t *desc = irq_desc + irq;
|
||||
irq_desc_t *desc = irq_to_desc(irq);
|
||||
|
||||
_raw_spin_lock(&vic_irq_lock);
|
||||
{
|
||||
|
||||
@@ -1058,7 +1058,7 @@ static void gpiolib_dbg_show(struct seq_file *s, struct gpio_chip *chip)
|
||||
|
||||
if (!is_out) {
|
||||
int irq = gpio_to_irq(gpio);
|
||||
struct irq_desc *desc = irq_desc + irq;
|
||||
struct irq_desc *desc = irq_to_desc(irq);
|
||||
|
||||
/* This races with request_irq(), set_irq_type(),
|
||||
* and set_irq_wake() ... but those are "rare".
|
||||
|
||||
+2
-2
@@ -123,7 +123,7 @@ static void asic3_irq_demux(unsigned int irq, struct irq_desc *desc)
|
||||
irqnr = asic->irq_base +
|
||||
(ASIC3_GPIOS_PER_BANK * bank)
|
||||
+ i;
|
||||
desc = irq_desc + irqnr;
|
||||
desc = irq_to_desc(irqnr);
|
||||
desc->handle_irq(irqnr, desc);
|
||||
if (asic->irq_bothedge[bank] & bit)
|
||||
asic3_irq_flip_edge(asic, base,
|
||||
@@ -136,7 +136,7 @@ static void asic3_irq_demux(unsigned int irq, struct irq_desc *desc)
|
||||
for (i = ASIC3_NUM_GPIOS; i < ASIC3_NR_IRQS; i++) {
|
||||
/* They start at bit 4 and go up */
|
||||
if (status & (1 << (i - ASIC3_NUM_GPIOS + 4))) {
|
||||
desc = irq_desc + asic->irq_base + i;
|
||||
desc = irq_to_desc(asic->irq_base + i);
|
||||
desc->handle_irq(asic->irq_base + i,
|
||||
desc);
|
||||
}
|
||||
|
||||
@@ -112,7 +112,7 @@ static void egpio_handler(unsigned int irq, struct irq_desc *desc)
|
||||
/* Run irq handler */
|
||||
pr_debug("got IRQ %d\n", irqpin);
|
||||
irq = ei->irq_start + irqpin;
|
||||
desc = &irq_desc[irq];
|
||||
desc = irq_to_desc(irq);
|
||||
desc->handle_irq(irq, desc);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -298,7 +298,8 @@ struct pci_port_ops dino_port_ops = {
|
||||
|
||||
static void dino_disable_irq(unsigned int irq)
|
||||
{
|
||||
struct dino_device *dino_dev = irq_desc[irq].chip_data;
|
||||
struct irq_desc *desc = irq_to_desc(irq);
|
||||
struct dino_device *dino_dev = desc->chip_data;
|
||||
int local_irq = gsc_find_local_irq(irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
|
||||
|
||||
DBG(KERN_WARNING "%s(0x%p, %d)\n", __func__, dino_dev, irq);
|
||||
@@ -310,7 +311,8 @@ static void dino_disable_irq(unsigned int irq)
|
||||
|
||||
static void dino_enable_irq(unsigned int irq)
|
||||
{
|
||||
struct dino_device *dino_dev = irq_desc[irq].chip_data;
|
||||
struct irq_desc *desc = irq_to_desc(irq);
|
||||
struct dino_device *dino_dev = desc->chip_data;
|
||||
int local_irq = gsc_find_local_irq(irq, dino_dev->global_irq, DINO_LOCAL_IRQS);
|
||||
u32 tmp;
|
||||
|
||||
|
||||
@@ -346,10 +346,10 @@ static int __init eisa_probe(struct parisc_device *dev)
|
||||
}
|
||||
|
||||
/* Reserve IRQ2 */
|
||||
irq_desc[2].action = &irq2_action;
|
||||
irq_to_desc(2)->action = &irq2_action;
|
||||
|
||||
for (i = 0; i < 16; i++) {
|
||||
irq_desc[i].chip = &eisa_interrupt_type;
|
||||
irq_to_desc(i)->chip = &eisa_interrupt_type;
|
||||
}
|
||||
|
||||
EISA_bus = 1;
|
||||
|
||||
@@ -108,7 +108,8 @@ int gsc_find_local_irq(unsigned int irq, int *global_irqs, int limit)
|
||||
|
||||
static void gsc_asic_disable_irq(unsigned int irq)
|
||||
{
|
||||
struct gsc_asic *irq_dev = irq_desc[irq].chip_data;
|
||||
struct irq_desc *desc = irq_to_desc(irq);
|
||||
struct gsc_asic *irq_dev = desc->chip_data;
|
||||
int local_irq = gsc_find_local_irq(irq, irq_dev->global_irq, 32);
|
||||
u32 imr;
|
||||
|
||||
@@ -123,7 +124,8 @@ static void gsc_asic_disable_irq(unsigned int irq)
|
||||
|
||||
static void gsc_asic_enable_irq(unsigned int irq)
|
||||
{
|
||||
struct gsc_asic *irq_dev = irq_desc[irq].chip_data;
|
||||
struct irq_desc *desc = irq_to_desc(irq);
|
||||
struct gsc_asic *irq_dev = desc->chip_data;
|
||||
int local_irq = gsc_find_local_irq(irq, irq_dev->global_irq, 32);
|
||||
u32 imr;
|
||||
|
||||
@@ -159,12 +161,14 @@ static struct hw_interrupt_type gsc_asic_interrupt_type = {
|
||||
int gsc_assign_irq(struct hw_interrupt_type *type, void *data)
|
||||
{
|
||||
static int irq = GSC_IRQ_BASE;
|
||||
struct irq_desc *desc;
|
||||
|
||||
if (irq > GSC_IRQ_MAX)
|
||||
return NO_IRQ;
|
||||
|
||||
irq_desc[irq].chip = type;
|
||||
irq_desc[irq].chip_data = data;
|
||||
desc = irq_to_desc(irq);
|
||||
desc->chip = type;
|
||||
desc->chip_data = data;
|
||||
return irq++;
|
||||
}
|
||||
|
||||
|
||||
@@ -619,7 +619,9 @@ iosapic_set_irt_data( struct vector_info *vi, u32 *dp0, u32 *dp1)
|
||||
|
||||
static struct vector_info *iosapic_get_vector(unsigned int irq)
|
||||
{
|
||||
return irq_desc[irq].chip_data;
|
||||
struct irq_desc *desc = irq_to_desc(irq);
|
||||
|
||||
return desc->chip_data;
|
||||
}
|
||||
|
||||
static void iosapic_disable_irq(unsigned int irq)
|
||||
|
||||
@@ -363,7 +363,9 @@ int superio_fixup_irq(struct pci_dev *pcidev)
|
||||
#endif
|
||||
|
||||
for (i = 0; i < 16; i++) {
|
||||
irq_desc[i].chip = &superio_interrupt_type;
|
||||
struct irq_desc *desc = irq_to_desc(i);
|
||||
|
||||
desc->chip = &superio_interrupt_type;
|
||||
}
|
||||
|
||||
/*
|
||||
|
||||
@@ -233,15 +233,18 @@ static struct hw_interrupt_type hd64465_ss_irq_type = {
|
||||
*/
|
||||
static void hs_map_irq(hs_socket_t *sp, unsigned int irq)
|
||||
{
|
||||
struct irq_desc *desc;
|
||||
|
||||
DPRINTK("hs_map_irq(sock=%d irq=%d)\n", sp->number, irq);
|
||||
|
||||
if (irq >= HS_NUM_MAPPED_IRQS)
|
||||
return;
|
||||
|
||||
desc = irq_to_desc(irq);
|
||||
hs_mapped_irq[irq].sock = sp;
|
||||
/* insert ourselves as the irq controller */
|
||||
hs_mapped_irq[irq].old_handler = irq_desc[irq].chip;
|
||||
irq_desc[irq].chip = &hd64465_ss_irq_type;
|
||||
hs_mapped_irq[irq].old_handler = desc->chip;
|
||||
desc->chip = &hd64465_ss_irq_type;
|
||||
}
|
||||
|
||||
|
||||
@@ -250,13 +253,16 @@ static void hs_map_irq(hs_socket_t *sp, unsigned int irq)
|
||||
*/
|
||||
static void hs_unmap_irq(hs_socket_t *sp, unsigned int irq)
|
||||
{
|
||||
struct irq_desc *desc;
|
||||
|
||||
DPRINTK("hs_unmap_irq(sock=%d irq=%d)\n", sp->number, irq);
|
||||
|
||||
if (irq >= HS_NUM_MAPPED_IRQS)
|
||||
return;
|
||||
|
||||
desc = irq_to_desc(irq);
|
||||
/* restore the original irq controller */
|
||||
irq_desc[irq].chip = hs_mapped_irq[irq].old_handler;
|
||||
desc->chip = hs_mapped_irq[irq].old_handler;
|
||||
}
|
||||
|
||||
/*============================================================*/
|
||||
|
||||
@@ -125,7 +125,7 @@ static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
|
||||
|
||||
BUG_ON(irq == -1);
|
||||
#ifdef CONFIG_SMP
|
||||
irq_desc[irq].affinity = cpumask_of_cpu(cpu);
|
||||
irq_to_desc(irq)->affinity = cpumask_of_cpu(cpu);
|
||||
#endif
|
||||
|
||||
__clear_bit(chn, cpu_evtchn_mask[cpu_evtchn[chn]]);
|
||||
@@ -139,8 +139,10 @@ static void init_evtchn_cpu_bindings(void)
|
||||
#ifdef CONFIG_SMP
|
||||
int i;
|
||||
/* By default all event channels notify CPU#0. */
|
||||
for (i = 0; i < nr_irqs; i++)
|
||||
irq_desc[i].affinity = cpumask_of_cpu(0);
|
||||
for (i = 0; i < nr_irqs; i++) {
|
||||
struct irq_desc *desc = irq_to_desc(i);
|
||||
desc->affinity = cpumask_of_cpu(0);
|
||||
}
|
||||
#endif
|
||||
|
||||
memset(cpu_evtchn, 0, sizeof(cpu_evtchn));
|
||||
|
||||
+21
-11
@@ -152,6 +152,10 @@ struct irq_chip {
|
||||
* @name: flow handler name for /proc/interrupts output
|
||||
*/
|
||||
struct irq_desc {
|
||||
unsigned int irq;
|
||||
#ifdef CONFIG_HAVE_SPARSE_IRQ
|
||||
struct irq_desc *next;
|
||||
#endif
|
||||
irq_flow_handler_t handle_irq;
|
||||
struct irq_chip *chip;
|
||||
struct msi_desc *msi_desc;
|
||||
@@ -179,9 +183,9 @@ struct irq_desc {
|
||||
const char *name;
|
||||
} ____cacheline_internodealigned_in_smp;
|
||||
|
||||
#ifdef CONFIG_HAVE_DYN_ARRAY
|
||||
extern struct irq_desc *irq_desc;
|
||||
#else
|
||||
extern struct irq_desc *irq_to_desc(unsigned int irq);
|
||||
#ifndef CONFIG_HAVE_DYN_ARRAY
|
||||
/* could be removed if we get rid of all irq_desc reference */
|
||||
extern struct irq_desc irq_desc[NR_IRQS];
|
||||
#endif
|
||||
|
||||
@@ -249,7 +253,10 @@ extern int no_irq_affinity;
|
||||
|
||||
static inline int irq_balancing_disabled(unsigned int irq)
|
||||
{
|
||||
return irq_desc[irq].status & IRQ_NO_BALANCING_MASK;
|
||||
struct irq_desc *desc;
|
||||
|
||||
desc = irq_to_desc(irq);
|
||||
return desc->status & IRQ_NO_BALANCING_MASK;
|
||||
}
|
||||
|
||||
/* Handle irq action chains: */
|
||||
@@ -281,7 +288,7 @@ extern unsigned int __do_IRQ(unsigned int irq);
|
||||
*/
|
||||
static inline void generic_handle_irq(unsigned int irq)
|
||||
{
|
||||
struct irq_desc *desc = irq_desc + irq;
|
||||
struct irq_desc *desc = irq_to_desc(irq);
|
||||
|
||||
#ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
|
||||
desc->handle_irq(irq, desc);
|
||||
@@ -325,7 +332,10 @@ __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
|
||||
static inline void __set_irq_handler_unlocked(int irq,
|
||||
irq_flow_handler_t handler)
|
||||
{
|
||||
irq_desc[irq].handle_irq = handler;
|
||||
struct irq_desc *desc;
|
||||
|
||||
desc = irq_to_desc(irq);
|
||||
desc->handle_irq = handler;
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -359,7 +369,7 @@ extern void destroy_irq(unsigned int irq);
|
||||
/* Test to see if a driver has successfully requested an irq */
|
||||
static inline int irq_has_action(unsigned int irq)
|
||||
{
|
||||
struct irq_desc *desc = irq_desc + irq;
|
||||
struct irq_desc *desc = irq_to_desc(irq);
|
||||
return desc->action != NULL;
|
||||
}
|
||||
|
||||
@@ -374,10 +384,10 @@ extern int set_irq_chip_data(unsigned int irq, void *data);
|
||||
extern int set_irq_type(unsigned int irq, unsigned int type);
|
||||
extern int set_irq_msi(unsigned int irq, struct msi_desc *entry);
|
||||
|
||||
#define get_irq_chip(irq) (irq_desc[irq].chip)
|
||||
#define get_irq_chip_data(irq) (irq_desc[irq].chip_data)
|
||||
#define get_irq_data(irq) (irq_desc[irq].handler_data)
|
||||
#define get_irq_msi(irq) (irq_desc[irq].msi_desc)
|
||||
#define get_irq_chip(irq) (irq_to_desc(irq)->chip)
|
||||
#define get_irq_chip_data(irq) (irq_to_desc(irq)->chip_data)
|
||||
#define get_irq_data(irq) (irq_to_desc(irq)->handler_data)
|
||||
#define get_irq_msi(irq) (irq_to_desc(irq)->msi_desc)
|
||||
|
||||
#endif /* CONFIG_GENERIC_HARDIRQS */
|
||||
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user