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Fix misc .c/.h comment typos
Fix various .c/.h typos in comments (no code changes). Signed-off-by: Matt LaPlante <kernel1@cyberdogtech.com> Signed-off-by: Adrian Bunk <bunk@stusta.de>
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Adrian Bunk
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@@ -1,7 +1,7 @@
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/*!*****************************************************************************
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*!
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*! Implements an interface for i2c compatible eeproms to run under linux.
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*! Supports 2k, 8k(?) and 16k. Uses adaptive timing adjustents by
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*! Implements an interface for i2c compatible eeproms to run under Linux.
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*! Supports 2k, 8k(?) and 16k. Uses adaptive timing adjustments by
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*! Johan.Adolfsson@axis.com
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*!
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*! Probing results:
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@@ -51,7 +51,7 @@
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*! Revision 1.8 2001/06/15 13:24:29 jonashg
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*! * Added verification of pointers from userspace in read and write.
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*! * Made busy counter volatile.
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*! * Added define for inital write delay.
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*! * Added define for initial write delay.
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*! * Removed warnings by using loff_t instead of unsigned long.
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*!
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*! Revision 1.7 2001/06/14 15:26:54 jonashg
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@@ -47,7 +47,7 @@
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*! Update Port B register and shadow even when running with hardware support
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*! to avoid glitches when reading bits
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*! Never set direction to out in i2c_inbyte
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*! Removed incorrect clock togling at end of i2c_inbyte
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*! Removed incorrect clock toggling at end of i2c_inbyte
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*!
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*! Revision 1.8 2002/08/13 06:31:53 starvik
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*! Made SDA and SCL line configurable
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@@ -33,7 +33,7 @@
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*!
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*! Revision 1.2 2002/11/19 14:35:24 starvik
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*! Changes from linux 2.4
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*! Changed struct initializer syntax to the currently prefered notation
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*! Changed struct initializer syntax to the currently preferred notation
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*!
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*! Revision 1.1 2001/12/17 13:59:27 bjornw
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*! Initial revision
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@@ -75,7 +75,7 @@
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** If a device prefetches beyond the end of a valid pdir entry, it will cause
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** a hard failure, ie. MCA. Version 3.0 and later of the zx1 LBA should
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** disconnect on 4k boundaries and prevent such issues. If the device is
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** particularly agressive, this option will keep the entire pdir valid such
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** particularly aggressive, this option will keep the entire pdir valid such
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** that prefetching will hit a valid address. This could severely impact
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** error containment, and is therefore off by default. The page that is
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** used for spill-over is poisoned, so that should help debugging somewhat.
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@@ -258,10 +258,10 @@ static u64 prefetch_spill_page;
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/*
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** DMA_CHUNK_SIZE is used by the SCSI mid-layer to break up
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** (or rather not merge) DMA's into managable chunks.
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** (or rather not merge) DMAs into manageable chunks.
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** On parisc, this is more of the software/tuning constraint
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** rather than the HW. I/O MMU allocation alogorithms can be
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** faster with smaller size is (to some degree).
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** rather than the HW. I/O MMU allocation algorithms can be
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** faster with smaller sizes (to some degree).
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*/
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#define DMA_CHUNK_SIZE (BITS_PER_LONG*iovp_size)
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+1
-1
@@ -383,7 +383,7 @@ void show_excp_regs(char *from, int trapnr, int signr, struct pt_regs *regs)
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/* ======================================================================= */
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/*
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** Depending on <base> scan the MMU, Data or Instrction side
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** Depending on <base> scan the MMU, Data or Instruction side
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** looking for a valid mapping matching Eaddr & asid.
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** Return -1 if not found or the TLB id entry otherwise.
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** Note: it works only for 4k pages!
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@@ -305,7 +305,7 @@ static void clear_lockup (struct atm_vcc *vcc, IADEV *dev) {
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** | R | NZ | 5-bit exponent | 9-bit mantissa |
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** +----+----+------------------+-------------------------------+
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**
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** R = reserverd (written as 0)
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** R = reserved (written as 0)
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** NZ = 0 if 0 cells/sec; 1 otherwise
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**
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** if NZ = 1, rate = 1.mmmmmmmmm x 2^(eeeee) cells/sec
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@@ -922,7 +922,7 @@ int RIOUnUse(unsigned long iPortP, struct CmdBlk *CmdBlkP)
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**
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** Packet is an actual packet structure to be filled in with the packet
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** information associated with the command. You need to fill in everything,
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** as the command processore doesn't process the command packet in any way.
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** as the command processor doesn't process the command packet in any way.
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**
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** The PreFuncP is called before the packet is enqueued on the host rup.
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** PreFuncP is called as (*PreFuncP)(PreArg, CmdBlkP);. PreFuncP must
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@@ -222,7 +222,7 @@ int RIOBoardTest(unsigned long paddr, void __iomem *caddr, unsigned char type, i
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** which value will be written into memory.
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** Call with op set to zero means that the RAM will not be read and checked
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** before it is written.
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** Call with op not zero, and the RAM will be read and compated with val[op-1]
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** Call with op not zero and the RAM will be read and compared with val[op-1]
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** to check that the data from the previous phase was retained.
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*/
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@@ -87,8 +87,8 @@ static char *_rioparam_c_sccs_ = "@(#)rioparam.c 1.3";
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** command bit set onto the port. The command bit is in the len field,
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** and gets ORed in with the actual byte count.
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**
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** When you send a packet with the command bit set, then the first
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** data byte ( data[0] ) is interpretted as the command to execute.
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** When you send a packet with the command bit set the first
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** data byte (data[0]) is interpreted as the command to execute.
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** It also governs what data structure overlay should accompany the packet.
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** Commands are defined in cirrus/cirrus.h
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**
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@@ -103,7 +103,7 @@ static char *_rioparam_c_sccs_ = "@(#)rioparam.c 1.3";
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**
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** Most commands do not use the remaining bytes in the data array. The
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** exceptions are OPEN MOPEN and CONFIG. (NB. As with the SI CONFIG and
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** OPEN are currently analagous). With these three commands the following
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** OPEN are currently analogous). With these three commands the following
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** 11 data bytes are all used to pass config information such as baud rate etc.
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** The fields are also defined in cirrus.h. Some contain straightforward
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** information such as the transmit XON character. Two contain the transmit and
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@@ -1635,7 +1635,7 @@ static int idefloppy_begin_format(ide_drive_t *drive, int __user *arg)
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/*
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** Get ATAPI_FORMAT_UNIT progress indication.
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**
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** Userland gives a pointer to an int. The int is set to a progresss
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** Userland gives a pointer to an int. The int is set to a progress
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** indicator 0-65536, with 65536=100%.
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**
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** If the drive does not support format progress indication, we just check
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@@ -464,7 +464,7 @@ int diva_4bri_init_card(diva_os_xdi_adapter_t * a)
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/*
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** Cleanup function will be called for master adapter only
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** this is garanteed by design: cleanup callback is set
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** this is guaranteed by design: cleanup callback is set
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** by master adapter only
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*/
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static int diva_4bri_cleanup_adapter(diva_os_xdi_adapter_t * a)
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@@ -16,7 +16,7 @@
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/*
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* include Genero generated HFC-4S/8S header file hfc48scu.h
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* for comlete register description. This will define _HFC48SCU_H_
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* for complete register description. This will define _HFC48SCU_H_
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* to prevent redefinitions
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*/
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@@ -500,14 +500,14 @@ static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_exte
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/* New design (By Emard)
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** this rps1 code will copy internal HS event to GPIO3 pin.
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** GPIO3 is in budget-patch hardware connectd to port B VSYNC
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** GPIO3 is in budget-patch hardware connected to port B VSYNC
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** HS is an internal event of 7146, accessible with RPS
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** and temporarily raised high every n lines
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** (n in defined in the RPS_THRESH1 counter threshold)
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** I think HS is raised high on the beginning of the n-th line
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** and remains high until this n-th line that triggered
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** it is completely received. When the receiption of n-th line
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** it is completely received. When the reception of n-th line
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** ends, HS is lowered.
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** To transmit data over DMA, 7146 needs changing state at
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@@ -541,7 +541,7 @@ static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_exte
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** hardware debug note: a working budget card (including budget patch)
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** with vpeirq() interrupt setup in mode "0x90" (every 64K) will
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** generate 3 interrupts per 25-Hz DMA frame of 2*188*512 bytes
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** and that means 3*25=75 Hz of interrupt freqency, as seen by
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** and that means 3*25=75 Hz of interrupt frequency, as seen by
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** watch cat /proc/interrupts
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**
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** If this frequency is 3x lower (and data received in the DMA
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@@ -550,7 +550,7 @@ static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_exte
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** this means VSYNC line is not connected in the hardware.
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** (check soldering pcb and pins)
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** The same behaviour of missing VSYNC can be duplicated on budget
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** cards, by seting DD1_INIT trigger mode 7 in 3rd nibble.
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** cards, by setting DD1_INIT trigger mode 7 in 3rd nibble.
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*/
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// Setup RPS1 "program" (p35)
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+1
-1
@@ -1215,7 +1215,7 @@ static void e100_setup_ucode(struct nic *nic, struct cb *cb, struct sk_buff *skb
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* the literal in the instruction before the code is loaded, the
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* driver can change the algorithm.
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*
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* INTDELAY - This loads the dead-man timer with its inital value.
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* INTDELAY - This loads the dead-man timer with its initial value.
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* When this timer expires the interrupt is asserted, and the
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* timer is reset each time a new packet is received. (see
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* BUNDLEMAX below to set the limit on number of chained packets)
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@@ -3868,7 +3868,7 @@ e1000_phy_hw_reset(struct e1000_hw *hw)
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*
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* hw - Struct containing variables accessed by shared code
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*
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* Sets bit 15 of the MII Control regiser
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* Sets bit 15 of the MII Control register
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******************************************************************************/
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int32_t
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e1000_phy_reset(struct e1000_hw *hw)
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@@ -160,7 +160,7 @@ struct s_IOCTL {
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/*
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** Interim definition of SK_DRV_TIMER placed in this file until
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** common modules have boon finallized
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** common modules have been finalized
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*/
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#define SK_DRV_TIMER 11
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#define SK_DRV_MODERATION_TIMER 1
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@@ -252,7 +252,7 @@ SkDimEnableModerationIfNeeded(SK_AC *pAC) {
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/*******************************************************************************
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** Function : SkDimDisplayModerationSettings
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** Description : Displays the current settings regaring interrupt moderation
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** Description : Displays the current settings regarding interrupt moderation
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** Programmer : Ralph Roesler
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** Last Modified: 22-mar-03
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** Returns : void (!)
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@@ -510,7 +510,7 @@ EnableIntMod(SK_AC *pAC) {
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/*******************************************************************************
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** Function : DisableIntMod()
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** Description : Disbles the interrupt moderation independent of what inter-
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** Description : Disables the interrupt moderation independent of what inter-
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** rupts are running or not
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** Programmer : Ralph Roesler
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** Last Modified: 23-mar-03
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@@ -6920,8 +6920,8 @@ static int ipw_qos_association(struct ipw_priv *priv,
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}
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/*
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* handling the beaconing responces. if we get different QoS setting
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* of the network from the the associated setting adjust the QoS
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* handling the beaconing responses. if we get different QoS setting
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* off the network from the associated setting, adjust the QoS
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* setting
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*/
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static int ipw_qos_association_resp(struct ipw_priv *priv,
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@@ -486,7 +486,7 @@ typedef unsigned long space_t;
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** This bit tells U2 to do R/M/W for partial cachelines. "Streaming"
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** data can avoid this if the mapping covers full cache lines.
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** o STOP_MOST is needed for atomicity across cachelines.
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** Apperently only "some EISA devices" need this.
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** Apparently only "some EISA devices" need this.
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** Using CONFIG_ISA is hack. Only the IOA with EISA under it needs
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** to use this hint iff the EISA devices needs this feature.
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** According to the U2 ERS, STOP_MOST enabled pages hurt performance.
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@@ -50,12 +50,12 @@
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**
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** PA Firmware
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** -----------
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** PA-RISC platforms have two fundementally different types of firmware.
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** PA-RISC platforms have two fundamentally different types of firmware.
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** For PCI devices, "Legacy" PDC initializes the "INTERRUPT_LINE" register
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** and BARs similar to a traditional PC BIOS.
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** The newer "PAT" firmware supports PDC calls which return tables.
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** PAT firmware only initializes PCI Console and Boot interface.
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** With these tables, the OS can progam all other PCI devices.
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** PAT firmware only initializes the PCI Console and Boot interface.
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** With these tables, the OS can program all other PCI devices.
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**
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** One such PAT PDC call returns the "Interrupt Routing Table" (IRT).
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** The IRT maps each PCI slot's INTA-D "output" line to an I/O SAPIC
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