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ARM: S5P64X0: no more support S5P6440 and S5P6450 SoCs
This patch removes supporting codes for s5p6440 and s5p6450 because seems no more used now. And if its supporting is required, DT based codes should be supprted next time. Acked-by: Arnd Bergmann <arnd@arndb.de> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Kukjin Kim
@@ -13,7 +13,6 @@ Introduction
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- S3C24XX: See Documentation/arm/Samsung-S3C24XX/Overview.txt for full list
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- S3C64XX: S3C6400 and S3C6410
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- S5P6440
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- S5PC100
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- S5PC110 / S5PV210
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@@ -34,7 +33,6 @@ Configuration
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A number of configurations are supplied, as there is no current way of
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unifying all the SoCs into one kernel.
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s5p6440_defconfig - S5P6440 specific default configuration
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s5pc100_defconfig - S5PC100 specific default configuration
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s5pc110_defconfig - S5PC110 specific default configuration
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s5pv210_defconfig - S5PV210 specific default configuration
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+1
-21
@@ -758,24 +758,6 @@ config ARCH_S3C64XX
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help
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Samsung S3C64XX series based systems
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config ARCH_S5P64X0
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bool "Samsung S5P6440 S5P6450"
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select ATAGS
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select CLKDEV_LOOKUP
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select CLKSRC_SAMSUNG_PWM
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select CPU_V6
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select GENERIC_CLOCKEVENTS
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select GPIO_SAMSUNG
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select HAVE_S3C2410_I2C if I2C
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select HAVE_S3C2410_WATCHDOG if WATCHDOG
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select HAVE_S3C_RTC if RTC_CLASS
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select NEED_MACH_GPIO_H
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select SAMSUNG_ATAGS
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select SAMSUNG_WDT_RESET
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help
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Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
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SMDK6450.
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config ARCH_S5PC100
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bool "Samsung S5PC100"
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select ARCH_REQUIRE_GPIOLIB
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@@ -1004,8 +986,6 @@ source "arch/arm/mach-s3c24xx/Kconfig"
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source "arch/arm/mach-s3c64xx/Kconfig"
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source "arch/arm/mach-s5p64x0/Kconfig"
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source "arch/arm/mach-s5pc100/Kconfig"
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source "arch/arm/mach-s5pv210/Kconfig"
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@@ -1569,7 +1549,7 @@ source kernel/Kconfig.preempt
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config HZ_FIXED
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int
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default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
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default 200 if ARCH_EBSA110 || ARCH_S3C24XX || \
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ARCH_S5PV210 || ARCH_EXYNOS4
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default AT91_TIMER_HZ if ARCH_AT91
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default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE_LEGACY
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@@ -187,7 +187,6 @@ machine-$(CONFIG_ARCH_ROCKCHIP) += rockchip
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machine-$(CONFIG_ARCH_RPC) += rpc
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machine-$(CONFIG_ARCH_S3C24XX) += s3c24xx
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machine-$(CONFIG_ARCH_S3C64XX) += s3c64xx
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machine-$(CONFIG_ARCH_S5P64X0) += s5p64x0
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machine-$(CONFIG_ARCH_S5PC100) += s5pc100
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machine-$(CONFIG_ARCH_S5PV210) += s5pv210
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machine-$(CONFIG_ARCH_SA1100) += sa1100
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@@ -1,68 +0,0 @@
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CONFIG_EXPERIMENTAL=y
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CONFIG_SYSFS_DEPRECATED_V2=y
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CONFIG_BLK_DEV_INITRD=y
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CONFIG_KALLSYMS_ALL=y
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CONFIG_MODULES=y
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CONFIG_MODULE_UNLOAD=y
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# CONFIG_BLK_DEV_BSG is not set
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CONFIG_ARCH_S5P64X0=y
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CONFIG_S3C_BOOT_ERROR_RESET=y
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CONFIG_S3C_LOWLEVEL_UART_PORT=1
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CONFIG_MACH_SMDK6440=y
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CONFIG_MACH_SMDK6450=y
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CONFIG_NO_HZ=y
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CONFIG_HIGH_RES_TIMERS=y
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CONFIG_CPU_32v6K=y
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CONFIG_AEABI=y
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CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
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CONFIG_FPE_NWFPE=y
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CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
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# CONFIG_PREVENT_FIRMWARE_BUILD is not set
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CONFIG_BLK_DEV_RAM=y
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CONFIG_BLK_DEV_RAM_SIZE=8192
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# CONFIG_MISC_DEVICES is not set
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CONFIG_SCSI=y
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CONFIG_BLK_DEV_SD=y
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CONFIG_CHR_DEV_SG=y
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CONFIG_INPUT_EVDEV=y
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CONFIG_INPUT_TOUCHSCREEN=y
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CONFIG_SERIAL_8250=y
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CONFIG_SERIAL_8250_NR_UARTS=3
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CONFIG_SERIAL_SAMSUNG=y
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CONFIG_SERIAL_SAMSUNG_CONSOLE=y
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CONFIG_HW_RANDOM=y
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# CONFIG_HWMON is not set
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CONFIG_DISPLAY_SUPPORT=y
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# CONFIG_VGA_CONSOLE is not set
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# CONFIG_HID_SUPPORT is not set
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# CONFIG_USB_SUPPORT is not set
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CONFIG_EXT2_FS=y
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CONFIG_EXT3_FS=y
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CONFIG_EXT3_FS_POSIX_ACL=y
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CONFIG_EXT3_FS_SECURITY=y
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CONFIG_INOTIFY=y
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CONFIG_MSDOS_FS=y
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CONFIG_VFAT_FS=y
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CONFIG_TMPFS=y
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CONFIG_TMPFS_POSIX_ACL=y
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CONFIG_CRAMFS=y
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CONFIG_ROMFS_FS=y
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CONFIG_NLS_CODEPAGE_437=y
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CONFIG_NLS_ASCII=y
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CONFIG_NLS_ISO8859_1=y
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CONFIG_MAGIC_SYSRQ=y
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CONFIG_DEBUG_KERNEL=y
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CONFIG_DEBUG_RT_MUTEXES=y
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CONFIG_DEBUG_SPINLOCK=y
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CONFIG_DEBUG_MUTEXES=y
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CONFIG_DEBUG_SPINLOCK_SLEEP=y
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CONFIG_DEBUG_INFO=y
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# CONFIG_RCU_CPU_STALL_DETECTOR is not set
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CONFIG_SYSCTL_SYSCALL_CHECK=y
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CONFIG_DEBUG_USER=y
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CONFIG_DEBUG_ERRORS=y
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CONFIG_DEBUG_LL=y
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CONFIG_DEBUG_S3C_UART=1
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CONFIG_CRYPTO=y
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# CONFIG_CRYPTO_ANSI_CPRNG is not set
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CONFIG_CRC_CCITT=y
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@@ -1,102 +0,0 @@
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# arch/arm/mach-s5p64x0/Kconfig
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#
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# Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
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# http://www.samsung.com/
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#
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# Licensed under GPLv2
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if ARCH_S5P64X0
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config CPU_S5P6440
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bool
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select ARM_AMBA
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select PL330_DMA if DMADEVICES
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select S5P_SLEEP if PM
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select SAMSUNG_WAKEMASK if PM
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help
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Enable S5P6440 CPU support
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config CPU_S5P6450
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bool
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select ARM_AMBA
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select PL330_DMA if DMADEVICES
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select S5P_SLEEP if PM
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select SAMSUNG_WAKEMASK if PM
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help
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Enable S5P6450 CPU support
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config S5P64X0_SETUP_FB_24BPP
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bool
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help
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Common setup code for S5P64X0 based boards with a LCD display
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through RGB interface.
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config S5P64X0_SETUP_I2C1
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bool
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help
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Common setup code for i2c bus 1.
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config S5P64X0_SETUP_SPI
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bool
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help
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Common setup code for SPI GPIO configurations
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config S5P64X0_SETUP_SDHCI_GPIO
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bool
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help
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Common setup code for SDHCI gpio.
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# machine support
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config MACH_SMDK6440
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bool "SMDK6440"
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select CPU_S5P6440
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select S3C_DEV_FB
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select S3C_DEV_HSMMC
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select S3C_DEV_HSMMC1
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select S3C_DEV_HSMMC2
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select S3C_DEV_I2C1
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select S3C_DEV_RTC
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select S3C_DEV_WDT
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select S5P64X0_SETUP_FB_24BPP
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select S5P64X0_SETUP_I2C1
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select S5P64X0_SETUP_SDHCI_GPIO
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select SAMSUNG_DEV_ADC
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select SAMSUNG_DEV_BACKLIGHT
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select SAMSUNG_DEV_PWM
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select SAMSUNG_DEV_TS
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help
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Machine support for the Samsung SMDK6440
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config MACH_SMDK6450
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bool "SMDK6450"
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select CPU_S5P6450
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select S3C_DEV_FB
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select S3C_DEV_HSMMC
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select S3C_DEV_HSMMC1
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select S3C_DEV_HSMMC2
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select S3C_DEV_I2C1
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select S3C_DEV_RTC
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select S3C_DEV_WDT
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select S5P64X0_SETUP_FB_24BPP
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select S5P64X0_SETUP_I2C1
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select S5P64X0_SETUP_SDHCI_GPIO
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select SAMSUNG_DEV_ADC
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select SAMSUNG_DEV_BACKLIGHT
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select SAMSUNG_DEV_PWM
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select SAMSUNG_DEV_TS
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help
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Machine support for the Samsung SMDK6450
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menu "Use 8-bit SDHCI bus width"
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config S5P64X0_SD_CH1_8BIT
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bool "SDHCI Channel 1 (Slot 1)"
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depends on MACH_SMDK6450 || MACH_SMDK6440
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help
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Support SDHCI Channel 1 8-bit bus.
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If selected, Channel 2 is disabled.
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endmenu
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endif
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@@ -1,36 +0,0 @@
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# arch/arm/mach-s5p64x0/Makefile
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#
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# Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
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# http://www.samsung.com
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#
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# Licensed under GPLv2
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obj-y :=
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obj-m :=
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obj-n :=
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obj- :=
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# Core
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obj-y += common.o clock.o
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obj-$(CONFIG_CPU_S5P6440) += clock-s5p6440.o
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obj-$(CONFIG_CPU_S5P6450) += clock-s5p6450.o
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obj-$(CONFIG_PM) += pm.o irq-pm.o
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obj-y += dma.o
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# machine support
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obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o
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obj-$(CONFIG_MACH_SMDK6450) += mach-smdk6450.o
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# device support
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obj-y += dev-audio.o
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obj-y += setup-i2c0.o
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obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o
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obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP) += setup-fb-24bpp.o
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obj-$(CONFIG_S5P64X0_SETUP_SPI) += setup-spi.o
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obj-$(CONFIG_S5P64X0_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
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@@ -1,2 +0,0 @@
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zreladdr-y += 0x20008000
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params_phys-y := 0x20000100
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,236 +0,0 @@
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/* linux/arch/arm/mach-s5p64x0/clock.c
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* S5P64X0 - Clock support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <mach/map.h>
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#include <mach/regs-clock.h>
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#include <plat/cpu-freq.h>
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#include <plat/clock.h>
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#include <plat/cpu.h>
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#include <plat/pll.h>
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#include <plat/s5p-clock.h>
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#include <plat/clock-clksrc.h>
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#include "common.h"
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struct clksrc_clk clk_mout_apll = {
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.clk = {
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.name = "mout_apll",
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.id = -1,
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},
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.sources = &clk_src_apll,
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.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 0, .size = 1 },
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};
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struct clksrc_clk clk_mout_mpll = {
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.clk = {
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.name = "mout_mpll",
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.id = -1,
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},
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.sources = &clk_src_mpll,
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.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 1, .size = 1 },
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};
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struct clksrc_clk clk_mout_epll = {
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.clk = {
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.name = "mout_epll",
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.id = -1,
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},
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.sources = &clk_src_epll,
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.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 2, .size = 1 },
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};
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enum perf_level {
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L0 = 532*1000,
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L1 = 266*1000,
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L2 = 133*1000,
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};
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static const u32 clock_table[][3] = {
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/*{ARM_CLK, DIVarm, DIVhclk}*/
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{L0 * 1000, (0 << ARM_DIV_RATIO_SHIFT), (3 << S5P64X0_CLKDIV0_HCLK_SHIFT)},
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{L1 * 1000, (1 << ARM_DIV_RATIO_SHIFT), (1 << S5P64X0_CLKDIV0_HCLK_SHIFT)},
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{L2 * 1000, (3 << ARM_DIV_RATIO_SHIFT), (0 << S5P64X0_CLKDIV0_HCLK_SHIFT)},
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};
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static unsigned long s5p64x0_armclk_get_rate(struct clk *clk)
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{
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unsigned long rate = clk_get_rate(clk->parent);
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u32 clkdiv;
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/* divisor mask starts at bit0, so no need to shift */
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clkdiv = __raw_readl(ARM_CLK_DIV) & ARM_DIV_MASK;
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return rate / (clkdiv + 1);
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}
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static unsigned long s5p64x0_armclk_round_rate(struct clk *clk,
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unsigned long rate)
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{
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u32 iter;
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for (iter = 1 ; iter < ARRAY_SIZE(clock_table) ; iter++) {
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if (rate > clock_table[iter][0])
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return clock_table[iter-1][0];
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}
|
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return clock_table[ARRAY_SIZE(clock_table) - 1][0];
|
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}
|
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static int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate)
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{
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u32 round_tmp;
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u32 iter;
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u32 clk_div0_tmp;
|
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u32 cur_rate = clk->ops->get_rate(clk);
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unsigned long flags;
|
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|
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round_tmp = clk->ops->round_rate(clk, rate);
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if (round_tmp == cur_rate)
|
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return 0;
|
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|
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|
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for (iter = 0 ; iter < ARRAY_SIZE(clock_table) ; iter++) {
|
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if (round_tmp == clock_table[iter][0])
|
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break;
|
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}
|
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|
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if (iter >= ARRAY_SIZE(clock_table))
|
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iter = ARRAY_SIZE(clock_table) - 1;
|
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|
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local_irq_save(flags);
|
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if (cur_rate > round_tmp) {
|
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/* Frequency Down */
|
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clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK);
|
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clk_div0_tmp |= clock_table[iter][1];
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__raw_writel(clk_div0_tmp, ARM_CLK_DIV);
|
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|
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clk_div0_tmp = __raw_readl(ARM_CLK_DIV) &
|
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~(S5P64X0_CLKDIV0_HCLK_MASK);
|
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clk_div0_tmp |= clock_table[iter][2];
|
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__raw_writel(clk_div0_tmp, ARM_CLK_DIV);
|
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|
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|
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} else {
|
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/* Frequency Up */
|
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clk_div0_tmp = __raw_readl(ARM_CLK_DIV) &
|
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~(S5P64X0_CLKDIV0_HCLK_MASK);
|
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clk_div0_tmp |= clock_table[iter][2];
|
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__raw_writel(clk_div0_tmp, ARM_CLK_DIV);
|
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|
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clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK);
|
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clk_div0_tmp |= clock_table[iter][1];
|
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__raw_writel(clk_div0_tmp, ARM_CLK_DIV);
|
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}
|
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local_irq_restore(flags);
|
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|
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clk->rate = clock_table[iter][0];
|
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|
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return 0;
|
||||
}
|
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|
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static struct clk_ops s5p64x0_clkarm_ops = {
|
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.get_rate = s5p64x0_armclk_get_rate,
|
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.set_rate = s5p64x0_armclk_set_rate,
|
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.round_rate = s5p64x0_armclk_round_rate,
|
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};
|
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|
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struct clksrc_clk clk_armclk = {
|
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.clk = {
|
||||
.name = "armclk",
|
||||
.id = 1,
|
||||
.parent = &clk_mout_apll.clk,
|
||||
.ops = &s5p64x0_clkarm_ops,
|
||||
},
|
||||
.reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 0, .size = 4 },
|
||||
};
|
||||
|
||||
struct clksrc_clk clk_dout_mpll = {
|
||||
.clk = {
|
||||
.name = "dout_mpll",
|
||||
.id = -1,
|
||||
.parent = &clk_mout_mpll.clk,
|
||||
},
|
||||
.reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 4, .size = 1 },
|
||||
};
|
||||
|
||||
static struct clk *clkset_hclk_low_list[] = {
|
||||
&clk_mout_apll.clk,
|
||||
&clk_mout_mpll.clk,
|
||||
};
|
||||
|
||||
struct clksrc_sources clkset_hclk_low = {
|
||||
.sources = clkset_hclk_low_list,
|
||||
.nr_sources = ARRAY_SIZE(clkset_hclk_low_list),
|
||||
};
|
||||
|
||||
int s5p64x0_pclk_ctrl(struct clk *clk, int enable)
|
||||
{
|
||||
return s5p_gatectrl(S5P64X0_CLK_GATE_PCLK, clk, enable);
|
||||
}
|
||||
|
||||
int s5p64x0_hclk0_ctrl(struct clk *clk, int enable)
|
||||
{
|
||||
return s5p_gatectrl(S5P64X0_CLK_GATE_HCLK0, clk, enable);
|
||||
}
|
||||
|
||||
int s5p64x0_hclk1_ctrl(struct clk *clk, int enable)
|
||||
{
|
||||
return s5p_gatectrl(S5P64X0_CLK_GATE_HCLK1, clk, enable);
|
||||
}
|
||||
|
||||
int s5p64x0_sclk_ctrl(struct clk *clk, int enable)
|
||||
{
|
||||
return s5p_gatectrl(S5P64X0_CLK_GATE_SCLK0, clk, enable);
|
||||
}
|
||||
|
||||
int s5p64x0_sclk1_ctrl(struct clk *clk, int enable)
|
||||
{
|
||||
return s5p_gatectrl(S5P64X0_CLK_GATE_SCLK1, clk, enable);
|
||||
}
|
||||
|
||||
int s5p64x0_mem_ctrl(struct clk *clk, int enable)
|
||||
{
|
||||
return s5p_gatectrl(S5P64X0_CLK_GATE_MEM0, clk, enable);
|
||||
}
|
||||
|
||||
int s5p64x0_clk48m_ctrl(struct clk *clk, int enable)
|
||||
{
|
||||
unsigned long flags;
|
||||
u32 val;
|
||||
|
||||
/* can't rely on clock lock, this register has other usages */
|
||||
local_irq_save(flags);
|
||||
|
||||
val = __raw_readl(S5P64X0_OTHERS);
|
||||
if (enable)
|
||||
val |= S5P64X0_OTHERS_USB_SIG_MASK;
|
||||
else
|
||||
val &= ~S5P64X0_OTHERS_USB_SIG_MASK;
|
||||
|
||||
__raw_writel(val, S5P64X0_OTHERS);
|
||||
|
||||
local_irq_restore(flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -1,38 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com
|
||||
*
|
||||
* Header file for s5p64x0 clock support
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __MACH_S5P64X0_CLOCK_H
|
||||
#define __MACH_S5P64X0_CLOCK_H __FILE__
|
||||
|
||||
#include <linux/clk.h>
|
||||
|
||||
extern struct clksrc_clk clk_mout_apll;
|
||||
extern struct clksrc_clk clk_mout_mpll;
|
||||
extern struct clksrc_clk clk_mout_epll;
|
||||
|
||||
extern int s5p64x0_epll_enable(struct clk *clk, int enable);
|
||||
extern unsigned long s5p64x0_epll_get_rate(struct clk *clk);
|
||||
|
||||
extern struct clksrc_clk clk_armclk;
|
||||
extern struct clksrc_clk clk_dout_mpll;
|
||||
|
||||
extern struct clksrc_sources clkset_hclk_low;
|
||||
|
||||
extern int s5p64x0_pclk_ctrl(struct clk *clk, int enable);
|
||||
extern int s5p64x0_hclk0_ctrl(struct clk *clk, int enable);
|
||||
extern int s5p64x0_hclk1_ctrl(struct clk *clk, int enable);
|
||||
extern int s5p64x0_sclk_ctrl(struct clk *clk, int enable);
|
||||
extern int s5p64x0_sclk1_ctrl(struct clk *clk, int enable);
|
||||
extern int s5p64x0_mem_ctrl(struct clk *clk, int enable);
|
||||
|
||||
extern int s5p64x0_clk48m_ctrl(struct clk *clk, int enable);
|
||||
|
||||
#endif /* __MACH_S5P64X0_CLOCK_H */
|
||||
@@ -1,490 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com
|
||||
*
|
||||
* Common Codes for S5P64X0 machines
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/timer.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/device.h>
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/serial_s3c.h>
|
||||
#include <clocksource/samsung_pwm.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/reboot.h>
|
||||
|
||||
#include <asm/irq.h>
|
||||
#include <asm/proc-fns.h>
|
||||
#include <asm/system_misc.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#include <mach/map.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/regs-clock.h>
|
||||
#include <mach/regs-gpio.h>
|
||||
|
||||
#include <plat/cpu.h>
|
||||
#include <plat/clock.h>
|
||||
#include <plat/devs.h>
|
||||
#include <plat/pm.h>
|
||||
#include <plat/sdhci.h>
|
||||
#include <plat/adc-core.h>
|
||||
#include <plat/fb-core.h>
|
||||
#include <plat/spi-core.h>
|
||||
#include <plat/gpio-cfg.h>
|
||||
#include <plat/pwm-core.h>
|
||||
#include <plat/regs-irqtype.h>
|
||||
#include <plat/watchdog-reset.h>
|
||||
|
||||
#include "common.h"
|
||||
|
||||
static const char name_s5p6440[] = "S5P6440";
|
||||
static const char name_s5p6450[] = "S5P6450";
|
||||
|
||||
static struct cpu_table cpu_ids[] __initdata = {
|
||||
{
|
||||
.idcode = S5P6440_CPU_ID,
|
||||
.idmask = S5P64XX_CPU_MASK,
|
||||
.map_io = s5p6440_map_io,
|
||||
.init_clocks = s5p6440_init_clocks,
|
||||
.init_uarts = s5p6440_init_uarts,
|
||||
.init = s5p64x0_init,
|
||||
.name = name_s5p6440,
|
||||
}, {
|
||||
.idcode = S5P6450_CPU_ID,
|
||||
.idmask = S5P64XX_CPU_MASK,
|
||||
.map_io = s5p6450_map_io,
|
||||
.init_clocks = s5p6450_init_clocks,
|
||||
.init_uarts = s5p6450_init_uarts,
|
||||
.init = s5p64x0_init,
|
||||
.name = name_s5p6450,
|
||||
},
|
||||
};
|
||||
|
||||
/* Initial IO mappings */
|
||||
|
||||
static struct map_desc s5p64x0_iodesc[] __initdata = {
|
||||
{
|
||||
.virtual = (unsigned long)S5P_VA_CHIPID,
|
||||
.pfn = __phys_to_pfn(S5P64X0_PA_CHIPID),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S3C_VA_SYS,
|
||||
.pfn = __phys_to_pfn(S5P64X0_PA_SYSCON),
|
||||
.length = SZ_64K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S3C_VA_TIMER,
|
||||
.pfn = __phys_to_pfn(S5P64X0_PA_TIMER),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S3C_VA_WATCHDOG,
|
||||
.pfn = __phys_to_pfn(S5P64X0_PA_WDT),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S5P_VA_SROMC,
|
||||
.pfn = __phys_to_pfn(S5P64X0_PA_SROMC),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S5P_VA_GPIO,
|
||||
.pfn = __phys_to_pfn(S5P64X0_PA_GPIO),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)VA_VIC0,
|
||||
.pfn = __phys_to_pfn(S5P64X0_PA_VIC0),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)VA_VIC1,
|
||||
.pfn = __phys_to_pfn(S5P64X0_PA_VIC1),
|
||||
.length = SZ_16K,
|
||||
.type = MT_DEVICE,
|
||||
},
|
||||
};
|
||||
|
||||
static struct map_desc s5p6440_iodesc[] __initdata = {
|
||||
{
|
||||
.virtual = (unsigned long)S3C_VA_UART,
|
||||
.pfn = __phys_to_pfn(S5P6440_PA_UART(0)),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
},
|
||||
};
|
||||
|
||||
static struct map_desc s5p6450_iodesc[] __initdata = {
|
||||
{
|
||||
.virtual = (unsigned long)S3C_VA_UART,
|
||||
.pfn = __phys_to_pfn(S5P6450_PA_UART(0)),
|
||||
.length = SZ_512K,
|
||||
.type = MT_DEVICE,
|
||||
}, {
|
||||
.virtual = (unsigned long)S3C_VA_UART + SZ_512K,
|
||||
.pfn = __phys_to_pfn(S5P6450_PA_UART(5)),
|
||||
.length = SZ_4K,
|
||||
.type = MT_DEVICE,
|
||||
},
|
||||
};
|
||||
|
||||
static void s5p64x0_idle(void)
|
||||
{
|
||||
unsigned long val;
|
||||
|
||||
val = __raw_readl(S5P64X0_PWR_CFG);
|
||||
val &= ~(0x3 << 5);
|
||||
val |= (0x1 << 5);
|
||||
__raw_writel(val, S5P64X0_PWR_CFG);
|
||||
|
||||
cpu_do_idle();
|
||||
}
|
||||
|
||||
static struct samsung_pwm_variant s5p64x0_pwm_variant = {
|
||||
.bits = 32,
|
||||
.div_base = 0,
|
||||
.has_tint_cstat = true,
|
||||
.tclk_mask = 0,
|
||||
};
|
||||
|
||||
void __init samsung_set_timer_source(unsigned int event, unsigned int source)
|
||||
{
|
||||
s5p64x0_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
|
||||
s5p64x0_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
|
||||
}
|
||||
|
||||
void __init samsung_timer_init(void)
|
||||
{
|
||||
unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
|
||||
IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
|
||||
IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
|
||||
};
|
||||
|
||||
samsung_pwm_clocksource_init(S3C_VA_TIMER,
|
||||
timer_irqs, &s5p64x0_pwm_variant);
|
||||
}
|
||||
|
||||
/*
|
||||
* s5p64x0_map_io
|
||||
*
|
||||
* register the standard CPU IO areas
|
||||
*/
|
||||
|
||||
void __init s5p64x0_init_io(struct map_desc *mach_desc, int size)
|
||||
{
|
||||
/* initialize the io descriptors we need for initialization */
|
||||
iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
|
||||
if (mach_desc)
|
||||
iotable_init(mach_desc, size);
|
||||
|
||||
/* detect cpu id and rev. */
|
||||
s5p_init_cpu(S5P64X0_SYS_ID);
|
||||
|
||||
s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
|
||||
samsung_wdt_reset_init(S3C_VA_WATCHDOG);
|
||||
|
||||
samsung_pwm_set_platdata(&s5p64x0_pwm_variant);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CPU_S5P6440
|
||||
void __init s5p6440_map_io(void)
|
||||
{
|
||||
/* initialize any device information early */
|
||||
s3c_adc_setname("s3c64xx-adc");
|
||||
s3c_fb_setname("s5p64x0-fb");
|
||||
s3c64xx_spi_setname("s5p64x0-spi");
|
||||
|
||||
s5p64x0_default_sdhci0();
|
||||
s5p64x0_default_sdhci1();
|
||||
s5p6440_default_sdhci2();
|
||||
|
||||
iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CPU_S5P6450
|
||||
void __init s5p6450_map_io(void)
|
||||
{
|
||||
/* initialize any device information early */
|
||||
s3c_adc_setname("s3c64xx-adc");
|
||||
s3c_fb_setname("s5p64x0-fb");
|
||||
s3c64xx_spi_setname("s5p64x0-spi");
|
||||
|
||||
s5p64x0_default_sdhci0();
|
||||
s5p64x0_default_sdhci1();
|
||||
s5p6450_default_sdhci2();
|
||||
|
||||
iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* s5p64x0_init_clocks
|
||||
*
|
||||
* register and setup the CPU clocks
|
||||
*/
|
||||
#ifdef CONFIG_CPU_S5P6440
|
||||
void __init s5p6440_init_clocks(int xtal)
|
||||
{
|
||||
printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
|
||||
|
||||
s3c24xx_register_baseclocks(xtal);
|
||||
s5p_register_clocks(xtal);
|
||||
s5p6440_register_clocks();
|
||||
s5p6440_setup_clocks();
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CPU_S5P6450
|
||||
void __init s5p6450_init_clocks(int xtal)
|
||||
{
|
||||
printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
|
||||
|
||||
s3c24xx_register_baseclocks(xtal);
|
||||
s5p_register_clocks(xtal);
|
||||
s5p6450_register_clocks();
|
||||
s5p6450_setup_clocks();
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* s5p64x0_init_irq
|
||||
*
|
||||
* register the CPU interrupts
|
||||
*/
|
||||
#ifdef CONFIG_CPU_S5P6440
|
||||
void __init s5p6440_init_irq(void)
|
||||
{
|
||||
/* S5P6440 supports 2 VIC */
|
||||
u32 vic[2];
|
||||
|
||||
/*
|
||||
* VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)]
|
||||
* VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22]
|
||||
*/
|
||||
vic[0] = 0xff800ae7;
|
||||
vic[1] = 0xffbf23e5;
|
||||
|
||||
s5p_init_irq(vic, ARRAY_SIZE(vic));
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CPU_S5P6450
|
||||
void __init s5p6450_init_irq(void)
|
||||
{
|
||||
/* S5P6450 supports only 2 VIC */
|
||||
u32 vic[2];
|
||||
|
||||
/*
|
||||
* VIC0 is missing IRQ_VIC0[(13-15), (21-22)]
|
||||
* VIC1 is missing IRQ VIC1[12, 14, 23]
|
||||
*/
|
||||
vic[0] = 0xff9f1fff;
|
||||
vic[1] = 0xff7fafff;
|
||||
|
||||
s5p_init_irq(vic, ARRAY_SIZE(vic));
|
||||
}
|
||||
#endif
|
||||
|
||||
struct bus_type s5p64x0_subsys = {
|
||||
.name = "s5p64x0-core",
|
||||
.dev_name = "s5p64x0-core",
|
||||
};
|
||||
|
||||
static struct device s5p64x0_dev = {
|
||||
.bus = &s5p64x0_subsys,
|
||||
};
|
||||
|
||||
static int __init s5p64x0_core_init(void)
|
||||
{
|
||||
return subsys_system_register(&s5p64x0_subsys, NULL);
|
||||
}
|
||||
core_initcall(s5p64x0_core_init);
|
||||
|
||||
int __init s5p64x0_init(void)
|
||||
{
|
||||
printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n");
|
||||
|
||||
/* set idle function */
|
||||
arm_pm_idle = s5p64x0_idle;
|
||||
|
||||
return device_register(&s5p64x0_dev);
|
||||
}
|
||||
|
||||
/* uart registration process */
|
||||
#ifdef CONFIG_CPU_S5P6440
|
||||
void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
|
||||
{
|
||||
int uart;
|
||||
|
||||
for (uart = 0; uart < no; uart++) {
|
||||
s5p_uart_resources[uart].resources->start = S5P6440_PA_UART(uart);
|
||||
s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART;
|
||||
}
|
||||
|
||||
s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CPU_S5P6450
|
||||
void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no)
|
||||
{
|
||||
s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
|
||||
}
|
||||
#endif
|
||||
|
||||
#define eint_offset(irq) ((irq) - IRQ_EINT(0))
|
||||
|
||||
static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type)
|
||||
{
|
||||
int offs = eint_offset(data->irq);
|
||||
int shift;
|
||||
u32 ctrl, mask;
|
||||
u32 newvalue = 0;
|
||||
|
||||
if (offs > 15)
|
||||
return -EINVAL;
|
||||
|
||||
switch (type) {
|
||||
case IRQ_TYPE_NONE:
|
||||
printk(KERN_WARNING "No edge setting!\n");
|
||||
break;
|
||||
case IRQ_TYPE_EDGE_RISING:
|
||||
newvalue = S3C2410_EXTINT_RISEEDGE;
|
||||
break;
|
||||
case IRQ_TYPE_EDGE_FALLING:
|
||||
newvalue = S3C2410_EXTINT_FALLEDGE;
|
||||
break;
|
||||
case IRQ_TYPE_EDGE_BOTH:
|
||||
newvalue = S3C2410_EXTINT_BOTHEDGE;
|
||||
break;
|
||||
case IRQ_TYPE_LEVEL_LOW:
|
||||
newvalue = S3C2410_EXTINT_LOWLEV;
|
||||
break;
|
||||
case IRQ_TYPE_LEVEL_HIGH:
|
||||
newvalue = S3C2410_EXTINT_HILEV;
|
||||
break;
|
||||
default:
|
||||
printk(KERN_ERR "No such irq type %d", type);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
shift = (offs / 2) * 4;
|
||||
mask = 0x7 << shift;
|
||||
|
||||
ctrl = __raw_readl(S5P64X0_EINT0CON0) & ~mask;
|
||||
ctrl |= newvalue << shift;
|
||||
__raw_writel(ctrl, S5P64X0_EINT0CON0);
|
||||
|
||||
/* Configure the GPIO pin for 6450 or 6440 based on CPU ID */
|
||||
if (soc_is_s5p6450())
|
||||
s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2));
|
||||
else
|
||||
s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* s5p64x0_irq_demux_eint
|
||||
*
|
||||
* This function demuxes the IRQ from the group0 external interrupts,
|
||||
* from IRQ_EINT(0) to IRQ_EINT(15). It is designed to be inlined into
|
||||
* the specific handlers s5p64x0_irq_demux_eintX_Y.
|
||||
*/
|
||||
static inline void s5p64x0_irq_demux_eint(unsigned int start, unsigned int end)
|
||||
{
|
||||
u32 status = __raw_readl(S5P64X0_EINT0PEND);
|
||||
u32 mask = __raw_readl(S5P64X0_EINT0MASK);
|
||||
unsigned int irq;
|
||||
|
||||
status &= ~mask;
|
||||
status >>= start;
|
||||
status &= (1 << (end - start + 1)) - 1;
|
||||
|
||||
for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) {
|
||||
if (status & 1)
|
||||
generic_handle_irq(irq);
|
||||
status >>= 1;
|
||||
}
|
||||
}
|
||||
|
||||
static void s5p64x0_irq_demux_eint0_3(unsigned int irq, struct irq_desc *desc)
|
||||
{
|
||||
s5p64x0_irq_demux_eint(0, 3);
|
||||
}
|
||||
|
||||
static void s5p64x0_irq_demux_eint4_11(unsigned int irq, struct irq_desc *desc)
|
||||
{
|
||||
s5p64x0_irq_demux_eint(4, 11);
|
||||
}
|
||||
|
||||
static void s5p64x0_irq_demux_eint12_15(unsigned int irq,
|
||||
struct irq_desc *desc)
|
||||
{
|
||||
s5p64x0_irq_demux_eint(12, 15);
|
||||
}
|
||||
|
||||
static int s5p64x0_alloc_gc(void)
|
||||
{
|
||||
struct irq_chip_generic *gc;
|
||||
struct irq_chip_type *ct;
|
||||
|
||||
gc = irq_alloc_generic_chip("s5p64x0-eint", 1, S5P_IRQ_EINT_BASE,
|
||||
S5P_VA_GPIO, handle_level_irq);
|
||||
if (!gc) {
|
||||
printk(KERN_ERR "%s: irq_alloc_generic_chip for group 0"
|
||||
"external interrupts failed\n", __func__);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ct = gc->chip_types;
|
||||
ct->chip.irq_ack = irq_gc_ack_set_bit;
|
||||
ct->chip.irq_mask = irq_gc_mask_set_bit;
|
||||
ct->chip.irq_unmask = irq_gc_mask_clr_bit;
|
||||
ct->chip.irq_set_type = s5p64x0_irq_eint_set_type;
|
||||
ct->chip.irq_set_wake = s3c_irqext_wake;
|
||||
ct->regs.ack = EINT0PEND_OFFSET;
|
||||
ct->regs.mask = EINT0MASK_OFFSET;
|
||||
irq_setup_generic_chip(gc, IRQ_MSK(16), IRQ_GC_INIT_MASK_CACHE,
|
||||
IRQ_NOREQUEST | IRQ_NOPROBE, 0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __init s5p64x0_init_irq_eint(void)
|
||||
{
|
||||
int ret = s5p64x0_alloc_gc();
|
||||
irq_set_chained_handler(IRQ_EINT0_3, s5p64x0_irq_demux_eint0_3);
|
||||
irq_set_chained_handler(IRQ_EINT4_11, s5p64x0_irq_demux_eint4_11);
|
||||
irq_set_chained_handler(IRQ_EINT12_15, s5p64x0_irq_demux_eint12_15);
|
||||
|
||||
return ret;
|
||||
}
|
||||
arch_initcall(s5p64x0_init_irq_eint);
|
||||
|
||||
void s5p64x0_restart(enum reboot_mode mode, const char *cmd)
|
||||
{
|
||||
if (mode != REBOOT_SOFT)
|
||||
samsung_wdt_reset();
|
||||
|
||||
soft_restart(0);
|
||||
}
|
||||
@@ -1,56 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2011 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com
|
||||
*
|
||||
* Common Header for S5P64X0 machines
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ARCH_ARM_MACH_S5P64X0_COMMON_H
|
||||
#define __ARCH_ARM_MACH_S5P64X0_COMMON_H
|
||||
|
||||
#include <linux/reboot.h>
|
||||
|
||||
void s5p6440_init_irq(void);
|
||||
void s5p6450_init_irq(void);
|
||||
void s5p64x0_init_io(struct map_desc *mach_desc, int size);
|
||||
|
||||
void s5p6440_register_clocks(void);
|
||||
void s5p6440_setup_clocks(void);
|
||||
|
||||
void s5p6450_register_clocks(void);
|
||||
void s5p6450_setup_clocks(void);
|
||||
|
||||
void s5p64x0_restart(enum reboot_mode mode, const char *cmd);
|
||||
extern int s5p64x0_init(void);
|
||||
|
||||
#ifdef CONFIG_CPU_S5P6440
|
||||
|
||||
extern void s5p6440_map_io(void);
|
||||
extern void s5p6440_init_clocks(int xtal);
|
||||
|
||||
extern void s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no);
|
||||
|
||||
#else
|
||||
#define s5p6440_init_clocks NULL
|
||||
#define s5p6440_init_uarts NULL
|
||||
#define s5p6440_map_io NULL
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CPU_S5P6450
|
||||
|
||||
extern void s5p6450_map_io(void);
|
||||
extern void s5p6450_init_clocks(int xtal);
|
||||
|
||||
extern void s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no);
|
||||
|
||||
#else
|
||||
#define s5p6450_init_clocks NULL
|
||||
#define s5p6450_init_uarts NULL
|
||||
#define s5p6450_map_io NULL
|
||||
#endif
|
||||
|
||||
#endif /* __ARCH_ARM_MACH_S5P64X0_COMMON_H */
|
||||
@@ -1,176 +0,0 @@
|
||||
/* linux/arch/arm/mach-s5p64x0/dev-audio.c
|
||||
*
|
||||
* Copyright (c) 2010 Samsung Electronics Co. Ltd
|
||||
* Jaswinder Singh <jassi.brar@samsung.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#include <plat/gpio-cfg.h>
|
||||
#include <linux/platform_data/asoc-s3c.h>
|
||||
|
||||
#include <mach/map.h>
|
||||
#include <mach/dma.h>
|
||||
#include <mach/irqs.h>
|
||||
|
||||
static int s5p6440_cfg_i2s(struct platform_device *pdev)
|
||||
{
|
||||
switch (pdev->id) {
|
||||
case 0:
|
||||
s3c_gpio_cfgpin_range(S5P6440_GPC(4), 2, S3C_GPIO_SFN(5));
|
||||
s3c_gpio_cfgpin(S5P6440_GPC(7), S3C_GPIO_SFN(5));
|
||||
s3c_gpio_cfgpin_range(S5P6440_GPH(6), 4, S3C_GPIO_SFN(5));
|
||||
break;
|
||||
default:
|
||||
printk(KERN_ERR "Invalid Device %d\n", pdev->id);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct s3c_audio_pdata s5p6440_i2s_pdata = {
|
||||
.cfg_gpio = s5p6440_cfg_i2s,
|
||||
.type = {
|
||||
.i2s = {
|
||||
.quirks = QUIRK_PRI_6CHAN,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
static struct resource s5p64x0_i2s0_resource[] = {
|
||||
[0] = DEFINE_RES_MEM(S5P64X0_PA_I2S, SZ_256),
|
||||
[1] = DEFINE_RES_DMA(DMACH_I2S0_TX),
|
||||
[2] = DEFINE_RES_DMA(DMACH_I2S0_RX),
|
||||
};
|
||||
|
||||
struct platform_device s5p6440_device_iis = {
|
||||
.name = "samsung-i2s",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(s5p64x0_i2s0_resource),
|
||||
.resource = s5p64x0_i2s0_resource,
|
||||
.dev = {
|
||||
.platform_data = &s5p6440_i2s_pdata,
|
||||
},
|
||||
};
|
||||
|
||||
static int s5p6450_cfg_i2s(struct platform_device *pdev)
|
||||
{
|
||||
switch (pdev->id) {
|
||||
case 0:
|
||||
s3c_gpio_cfgpin_range(S5P6450_GPR(4), 5, S3C_GPIO_SFN(5));
|
||||
s3c_gpio_cfgpin_range(S5P6450_GPR(13), 2, S3C_GPIO_SFN(5));
|
||||
break;
|
||||
case 1:
|
||||
s3c_gpio_cfgpin(S5P6440_GPB(4), S3C_GPIO_SFN(5));
|
||||
s3c_gpio_cfgpin_range(S5P6450_GPC(0), 4, S3C_GPIO_SFN(5));
|
||||
break;
|
||||
case 2:
|
||||
s3c_gpio_cfgpin_range(S5P6450_GPK(0), 5, S3C_GPIO_SFN(5));
|
||||
break;
|
||||
default:
|
||||
printk(KERN_ERR "Invalid Device %d\n", pdev->id);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct s3c_audio_pdata s5p6450_i2s0_pdata = {
|
||||
.cfg_gpio = s5p6450_cfg_i2s,
|
||||
.type = {
|
||||
.i2s = {
|
||||
.quirks = QUIRK_PRI_6CHAN,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
struct platform_device s5p6450_device_iis0 = {
|
||||
.name = "samsung-i2s",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(s5p64x0_i2s0_resource),
|
||||
.resource = s5p64x0_i2s0_resource,
|
||||
.dev = {
|
||||
.platform_data = &s5p6450_i2s0_pdata,
|
||||
},
|
||||
};
|
||||
|
||||
static struct s3c_audio_pdata s5p6450_i2s_pdata = {
|
||||
.cfg_gpio = s5p6450_cfg_i2s,
|
||||
};
|
||||
|
||||
static struct resource s5p6450_i2s1_resource[] = {
|
||||
[0] = DEFINE_RES_MEM(S5P6450_PA_I2S1, SZ_256),
|
||||
[1] = DEFINE_RES_DMA(DMACH_I2S1_TX),
|
||||
[2] = DEFINE_RES_DMA(DMACH_I2S1_RX),
|
||||
};
|
||||
|
||||
struct platform_device s5p6450_device_iis1 = {
|
||||
.name = "samsung-i2s",
|
||||
.id = 1,
|
||||
.num_resources = ARRAY_SIZE(s5p6450_i2s1_resource),
|
||||
.resource = s5p6450_i2s1_resource,
|
||||
.dev = {
|
||||
.platform_data = &s5p6450_i2s_pdata,
|
||||
},
|
||||
};
|
||||
|
||||
static struct resource s5p6450_i2s2_resource[] = {
|
||||
[0] = DEFINE_RES_MEM(S5P6450_PA_I2S2, SZ_256),
|
||||
[1] = DEFINE_RES_DMA(DMACH_I2S2_TX),
|
||||
[2] = DEFINE_RES_DMA(DMACH_I2S2_RX),
|
||||
};
|
||||
|
||||
struct platform_device s5p6450_device_iis2 = {
|
||||
.name = "samsung-i2s",
|
||||
.id = 2,
|
||||
.num_resources = ARRAY_SIZE(s5p6450_i2s2_resource),
|
||||
.resource = s5p6450_i2s2_resource,
|
||||
.dev = {
|
||||
.platform_data = &s5p6450_i2s_pdata,
|
||||
},
|
||||
};
|
||||
|
||||
/* PCM Controller platform_devices */
|
||||
|
||||
static int s5p6440_pcm_cfg_gpio(struct platform_device *pdev)
|
||||
{
|
||||
switch (pdev->id) {
|
||||
case 0:
|
||||
s3c_gpio_cfgpin_range(S5P6440_GPR(6), 3, S3C_GPIO_SFN(2));
|
||||
s3c_gpio_cfgpin_range(S5P6440_GPR(13), 2, S3C_GPIO_SFN(2));
|
||||
break;
|
||||
|
||||
default:
|
||||
printk(KERN_DEBUG "Invalid PCM Controller number!");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct s3c_audio_pdata s5p6440_pcm_pdata = {
|
||||
.cfg_gpio = s5p6440_pcm_cfg_gpio,
|
||||
};
|
||||
|
||||
static struct resource s5p6440_pcm0_resource[] = {
|
||||
[0] = DEFINE_RES_MEM(S5P64X0_PA_PCM, SZ_256),
|
||||
[1] = DEFINE_RES_DMA(DMACH_PCM0_TX),
|
||||
[2] = DEFINE_RES_DMA(DMACH_PCM0_RX),
|
||||
};
|
||||
|
||||
struct platform_device s5p6440_device_pcm = {
|
||||
.name = "samsung-pcm",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(s5p6440_pcm0_resource),
|
||||
.resource = s5p6440_pcm0_resource,
|
||||
.dev = {
|
||||
.platform_data = &s5p6440_pcm_pdata,
|
||||
},
|
||||
};
|
||||
@@ -1,128 +0,0 @@
|
||||
/* linux/arch/arm/mach-s5p64x0/dma.c
|
||||
*
|
||||
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com
|
||||
*
|
||||
* Copyright (C) 2010 Samsung Electronics Co. Ltd.
|
||||
* Jaswinder Singh <jassi.brar@samsung.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/amba/bus.h>
|
||||
#include <linux/amba/pl330.h>
|
||||
|
||||
#include <asm/irq.h>
|
||||
|
||||
#include <mach/map.h>
|
||||
#include <mach/irqs.h>
|
||||
#include <mach/regs-clock.h>
|
||||
#include <mach/dma.h>
|
||||
|
||||
#include <plat/cpu.h>
|
||||
#include <plat/devs.h>
|
||||
#include <plat/irqs.h>
|
||||
|
||||
static u8 s5p6440_pdma_peri[] = {
|
||||
DMACH_UART0_RX,
|
||||
DMACH_UART0_TX,
|
||||
DMACH_UART1_RX,
|
||||
DMACH_UART1_TX,
|
||||
DMACH_UART2_RX,
|
||||
DMACH_UART2_TX,
|
||||
DMACH_UART3_RX,
|
||||
DMACH_UART3_TX,
|
||||
DMACH_MAX,
|
||||
DMACH_MAX,
|
||||
DMACH_PCM0_TX,
|
||||
DMACH_PCM0_RX,
|
||||
DMACH_I2S0_TX,
|
||||
DMACH_I2S0_RX,
|
||||
DMACH_SPI0_TX,
|
||||
DMACH_SPI0_RX,
|
||||
DMACH_MAX,
|
||||
DMACH_MAX,
|
||||
DMACH_MAX,
|
||||
DMACH_MAX,
|
||||
DMACH_SPI1_TX,
|
||||
DMACH_SPI1_RX,
|
||||
};
|
||||
|
||||
static struct dma_pl330_platdata s5p6440_pdma_pdata = {
|
||||
.nr_valid_peri = ARRAY_SIZE(s5p6440_pdma_peri),
|
||||
.peri_id = s5p6440_pdma_peri,
|
||||
};
|
||||
|
||||
static u8 s5p6450_pdma_peri[] = {
|
||||
DMACH_UART0_RX,
|
||||
DMACH_UART0_TX,
|
||||
DMACH_UART1_RX,
|
||||
DMACH_UART1_TX,
|
||||
DMACH_UART2_RX,
|
||||
DMACH_UART2_TX,
|
||||
DMACH_UART3_RX,
|
||||
DMACH_UART3_TX,
|
||||
DMACH_UART4_RX,
|
||||
DMACH_UART4_TX,
|
||||
DMACH_PCM0_TX,
|
||||
DMACH_PCM0_RX,
|
||||
DMACH_I2S0_TX,
|
||||
DMACH_I2S0_RX,
|
||||
DMACH_SPI0_TX,
|
||||
DMACH_SPI0_RX,
|
||||
DMACH_PCM1_TX,
|
||||
DMACH_PCM1_RX,
|
||||
DMACH_PCM2_TX,
|
||||
DMACH_PCM2_RX,
|
||||
DMACH_SPI1_TX,
|
||||
DMACH_SPI1_RX,
|
||||
DMACH_USI_TX,
|
||||
DMACH_USI_RX,
|
||||
DMACH_MAX,
|
||||
DMACH_I2S1_TX,
|
||||
DMACH_I2S1_RX,
|
||||
DMACH_I2S2_TX,
|
||||
DMACH_I2S2_RX,
|
||||
DMACH_PWM,
|
||||
DMACH_UART5_RX,
|
||||
DMACH_UART5_TX,
|
||||
};
|
||||
|
||||
static struct dma_pl330_platdata s5p6450_pdma_pdata = {
|
||||
.nr_valid_peri = ARRAY_SIZE(s5p6450_pdma_peri),
|
||||
.peri_id = s5p6450_pdma_peri,
|
||||
};
|
||||
|
||||
static AMBA_AHB_DEVICE(s5p64x0_pdma, "dma-pl330", 0x00041330,
|
||||
S5P64X0_PA_PDMA, {IRQ_DMA0}, NULL);
|
||||
|
||||
static int __init s5p64x0_dma_init(void)
|
||||
{
|
||||
if (soc_is_s5p6450()) {
|
||||
dma_cap_set(DMA_SLAVE, s5p6450_pdma_pdata.cap_mask);
|
||||
dma_cap_set(DMA_CYCLIC, s5p6450_pdma_pdata.cap_mask);
|
||||
s5p64x0_pdma_device.dev.platform_data = &s5p6450_pdma_pdata;
|
||||
} else {
|
||||
dma_cap_set(DMA_SLAVE, s5p6440_pdma_pdata.cap_mask);
|
||||
dma_cap_set(DMA_CYCLIC, s5p6440_pdma_pdata.cap_mask);
|
||||
s5p64x0_pdma_device.dev.platform_data = &s5p6440_pdma_pdata;
|
||||
}
|
||||
|
||||
amba_device_register(&s5p64x0_pdma_device, &iomem_resource);
|
||||
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(s5p64x0_dma_init);
|
||||
@@ -1,16 +0,0 @@
|
||||
/*
|
||||
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com
|
||||
*
|
||||
* S5P64X0 I2C configuration
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
extern void s5p6440_i2c0_cfg_gpio(struct platform_device *dev);
|
||||
extern void s5p6440_i2c1_cfg_gpio(struct platform_device *dev);
|
||||
|
||||
extern void s5p6450_i2c0_cfg_gpio(struct platform_device *dev);
|
||||
extern void s5p6450_i2c1_cfg_gpio(struct platform_device *dev);
|
||||
@@ -1,32 +0,0 @@
|
||||
/* linux/arch/arm/mach-s5p64x0/include/mach/debug-macro.S
|
||||
*
|
||||
* Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
/* pull in the relevant register and map files. */
|
||||
|
||||
#include <linux/serial_s3c.h>
|
||||
#include <plat/map-base.h>
|
||||
#include <plat/map-s5p.h>
|
||||
|
||||
.macro addruart, rp, rv, tmp
|
||||
mov \rp, #0xE0000000
|
||||
orr \rp, \rp, #0x00100000
|
||||
ldr \rp, [\rp, #0x118 ]
|
||||
and \rp, \rp, #0xff000
|
||||
teq \rp, #0x50000 @@ S5P6450
|
||||
ldreq \rp, =0xEC800000
|
||||
movne \rp, #0xEC000000 @@ S5P6440
|
||||
ldrne \rv, = S3C_VA_UART
|
||||
#if CONFIG_DEBUG_S3C_UART != 0
|
||||
add \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART)
|
||||
add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART)
|
||||
#endif
|
||||
.endm
|
||||
|
||||
#include <debug/samsung.S>
|
||||
@@ -1,26 +0,0 @@
|
||||
/*
|
||||
* Copyright (C) 2010 Samsung Electronics Co. Ltd.
|
||||
* Jaswinder Singh <jassi.brar@samsung.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#ifndef __MACH_DMA_H
|
||||
#define __MACH_DMA_H
|
||||
|
||||
/* This platform uses the common common DMA API driver for PL330 */
|
||||
#include <plat/dma-pl330.h>
|
||||
|
||||
#endif /* __MACH_DMA_H */
|
||||
@@ -1,132 +0,0 @@
|
||||
/* linux/arch/arm/mach-s5p64x0/include/mach/gpio.h
|
||||
*
|
||||
* Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com
|
||||
*
|
||||
* S5P64X0 - GPIO lib support
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_GPIO_H
|
||||
#define __ASM_ARCH_GPIO_H __FILE__
|
||||
|
||||
/* GPIO bank sizes */
|
||||
|
||||
#define S5P6440_GPIO_A_NR (6)
|
||||
#define S5P6440_GPIO_B_NR (7)
|
||||
#define S5P6440_GPIO_C_NR (8)
|
||||
#define S5P6440_GPIO_F_NR (16)
|
||||
#define S5P6440_GPIO_G_NR (7)
|
||||
#define S5P6440_GPIO_H_NR (10)
|
||||
#define S5P6440_GPIO_I_NR (16)
|
||||
#define S5P6440_GPIO_J_NR (12)
|
||||
#define S5P6440_GPIO_N_NR (16)
|
||||
#define S5P6440_GPIO_P_NR (8)
|
||||
#define S5P6440_GPIO_R_NR (15)
|
||||
|
||||
#define S5P6450_GPIO_A_NR (6)
|
||||
#define S5P6450_GPIO_B_NR (7)
|
||||
#define S5P6450_GPIO_C_NR (8)
|
||||
#define S5P6450_GPIO_D_NR (8)
|
||||
#define S5P6450_GPIO_F_NR (16)
|
||||
#define S5P6450_GPIO_G_NR (14)
|
||||
#define S5P6450_GPIO_H_NR (10)
|
||||
#define S5P6450_GPIO_I_NR (16)
|
||||
#define S5P6450_GPIO_J_NR (12)
|
||||
#define S5P6450_GPIO_K_NR (5)
|
||||
#define S5P6450_GPIO_N_NR (16)
|
||||
#define S5P6450_GPIO_P_NR (11)
|
||||
#define S5P6450_GPIO_Q_NR (14)
|
||||
#define S5P6450_GPIO_R_NR (15)
|
||||
#define S5P6450_GPIO_S_NR (8)
|
||||
|
||||
/* GPIO bank numbers */
|
||||
|
||||
/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
|
||||
* space for debugging purposes so that any accidental
|
||||
* change from one gpio bank to another can be caught.
|
||||
*/
|
||||
|
||||
#define S5P64X0_GPIO_NEXT(__gpio) \
|
||||
((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
|
||||
|
||||
enum s5p6440_gpio_number {
|
||||
S5P6440_GPIO_A_START = 0,
|
||||
S5P6440_GPIO_B_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_A),
|
||||
S5P6440_GPIO_C_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_B),
|
||||
S5P6440_GPIO_F_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_C),
|
||||
S5P6440_GPIO_G_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_F),
|
||||
S5P6440_GPIO_H_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_G),
|
||||
S5P6440_GPIO_I_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_H),
|
||||
S5P6440_GPIO_J_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_I),
|
||||
S5P6440_GPIO_N_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_J),
|
||||
S5P6440_GPIO_P_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_N),
|
||||
S5P6440_GPIO_R_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_P),
|
||||
};
|
||||
|
||||
enum s5p6450_gpio_number {
|
||||
S5P6450_GPIO_A_START = 0,
|
||||
S5P6450_GPIO_B_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_A),
|
||||
S5P6450_GPIO_C_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_B),
|
||||
S5P6450_GPIO_D_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_C),
|
||||
S5P6450_GPIO_F_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_D),
|
||||
S5P6450_GPIO_G_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_F),
|
||||
S5P6450_GPIO_H_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_G),
|
||||
S5P6450_GPIO_I_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_H),
|
||||
S5P6450_GPIO_J_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_I),
|
||||
S5P6450_GPIO_K_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_J),
|
||||
S5P6450_GPIO_N_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_K),
|
||||
S5P6450_GPIO_P_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_N),
|
||||
S5P6450_GPIO_Q_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_P),
|
||||
S5P6450_GPIO_R_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_Q),
|
||||
S5P6450_GPIO_S_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_R),
|
||||
};
|
||||
|
||||
/* GPIO number definitions */
|
||||
|
||||
#define S5P6440_GPA(_nr) (S5P6440_GPIO_A_START + (_nr))
|
||||
#define S5P6440_GPB(_nr) (S5P6440_GPIO_B_START + (_nr))
|
||||
#define S5P6440_GPC(_nr) (S5P6440_GPIO_C_START + (_nr))
|
||||
#define S5P6440_GPF(_nr) (S5P6440_GPIO_F_START + (_nr))
|
||||
#define S5P6440_GPG(_nr) (S5P6440_GPIO_G_START + (_nr))
|
||||
#define S5P6440_GPH(_nr) (S5P6440_GPIO_H_START + (_nr))
|
||||
#define S5P6440_GPI(_nr) (S5P6440_GPIO_I_START + (_nr))
|
||||
#define S5P6440_GPJ(_nr) (S5P6440_GPIO_J_START + (_nr))
|
||||
#define S5P6440_GPN(_nr) (S5P6440_GPIO_N_START + (_nr))
|
||||
#define S5P6440_GPP(_nr) (S5P6440_GPIO_P_START + (_nr))
|
||||
#define S5P6440_GPR(_nr) (S5P6440_GPIO_R_START + (_nr))
|
||||
|
||||
#define S5P6450_GPA(_nr) (S5P6450_GPIO_A_START + (_nr))
|
||||
#define S5P6450_GPB(_nr) (S5P6450_GPIO_B_START + (_nr))
|
||||
#define S5P6450_GPC(_nr) (S5P6450_GPIO_C_START + (_nr))
|
||||
#define S5P6450_GPD(_nr) (S5P6450_GPIO_D_START + (_nr))
|
||||
#define S5P6450_GPF(_nr) (S5P6450_GPIO_F_START + (_nr))
|
||||
#define S5P6450_GPG(_nr) (S5P6450_GPIO_G_START + (_nr))
|
||||
#define S5P6450_GPH(_nr) (S5P6450_GPIO_H_START + (_nr))
|
||||
#define S5P6450_GPI(_nr) (S5P6450_GPIO_I_START + (_nr))
|
||||
#define S5P6450_GPJ(_nr) (S5P6450_GPIO_J_START + (_nr))
|
||||
#define S5P6450_GPK(_nr) (S5P6450_GPIO_K_START + (_nr))
|
||||
#define S5P6450_GPN(_nr) (S5P6450_GPIO_N_START + (_nr))
|
||||
#define S5P6450_GPP(_nr) (S5P6450_GPIO_P_START + (_nr))
|
||||
#define S5P6450_GPQ(_nr) (S5P6450_GPIO_Q_START + (_nr))
|
||||
#define S5P6450_GPR(_nr) (S5P6450_GPIO_R_START + (_nr))
|
||||
#define S5P6450_GPS(_nr) (S5P6450_GPIO_S_START + (_nr))
|
||||
|
||||
/* the end of the S5P64X0 specific gpios */
|
||||
|
||||
#define S5P6440_GPIO_END (S5P6440_GPR(S5P6440_GPIO_R_NR) + 1)
|
||||
#define S5P6450_GPIO_END (S5P6450_GPS(S5P6450_GPIO_S_NR) + 1)
|
||||
|
||||
#define S5P64X0_GPIO_END (S5P6440_GPIO_END > S5P6450_GPIO_END ? \
|
||||
S5P6440_GPIO_END : S5P6450_GPIO_END)
|
||||
|
||||
#define S3C_GPIO_END S5P64X0_GPIO_END
|
||||
|
||||
/* define the number of gpios we need to the one after the last GPIO range */
|
||||
|
||||
#define ARCH_NR_GPIOS (S5P64X0_GPIO_END + CONFIG_SAMSUNG_GPIO_EXTRA)
|
||||
|
||||
#endif /* __ASM_ARCH_GPIO_H */
|
||||
@@ -1,18 +0,0 @@
|
||||
/* linux/arch/arm/mach-s5p64x0/include/mach/hardware.h
|
||||
*
|
||||
* Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
|
||||
* http://www.samsung.com
|
||||
*
|
||||
* S5P64X0 - Hardware support
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_HARDWARE_H
|
||||
#define __ASM_ARCH_HARDWARE_H __FILE__
|
||||
|
||||
/* currently nothing here, placeholder */
|
||||
|
||||
#endif /* __ASM_ARCH_HARDWARE_H */
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user