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[media] media drivers: annotate fall-through
Avoid warnings like those:
drivers/media/pci/ddbridge/ddbridge-core.c: In function 'dvb_input_detach':
drivers/media/pci/ddbridge/ddbridge-core.c:787:6: warning: this statement may fall through [-Wimplicit-fallthrough=]
if (input->fe) {
^
drivers/media/pci/ddbridge/ddbridge-core.c:792:2: note: here
case 4:
^~~~
...
On several cases, it is just that gcc 7.1 is not capable of
understanding the comment, but on other places, we need an
annotation.
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
This commit is contained in:
@@ -535,6 +535,7 @@ static void af9013_statistics_work(struct work_struct *work)
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switch (state->statistics_step) {
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default:
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state->statistics_step = 0;
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/* fall-through */
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case 0:
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af9013_statistics_signal_strength(&state->fe);
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state->statistics_step++;
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@@ -773,7 +773,8 @@ static int bcm3510_init(struct dvb_frontend* fe)
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deb_info("attempting to download firmware\n");
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if ((ret = bcm3510_init_cold(st)) < 0)
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return ret;
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case JDEC_EEPROM_LOAD_WAIT: /* fall-through is wanted */
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/* fall-through */
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case JDEC_EEPROM_LOAD_WAIT:
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deb_info("firmware is loaded\n");
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bcm3510_check_firmware_version(st);
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break;
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@@ -279,10 +279,10 @@ static int dib7000p_set_power_mode(struct dib7000p_state *state, enum dib7000p_p
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if (state->version != SOC7090)
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reg_1280 &= ~((1 << 11));
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reg_1280 &= ~(1 << 6);
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/* fall through wanted to enable the interfaces */
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/* fall-through */
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case DIB7000P_POWER_INTERFACE_ONLY:
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/* just leave power on the control-interfaces: GPIO and (I2C or SDIO) */
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case DIB7000P_POWER_INTERFACE_ONLY: /* TODO power up either SDIO or I2C */
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/* TODO power up either SDIO or I2C */
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if (state->version == SOC7090)
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reg_1280 &= ~((1 << 7) | (1 << 5));
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else
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@@ -2837,7 +2837,8 @@ ctrl_set_cfg_mpeg_output(struct drx_demod_instance *demod, struct drx_cfg_mpeg_o
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/* coef = 188/204 */
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max_bit_rate =
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(ext_attr->curr_symbol_rate / 8) * nr_bits * 188;
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/* pass through b/c Annex A/c need following settings */
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/* pass through as b/c Annex A/c need following settings */
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/* fall-through */
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case DRX_STANDARD_ITU_B:
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rc = drxj_dap_write_reg16(dev_addr, FEC_OC_FCT_USAGE__A, FEC_OC_FCT_USAGE__PRE, 0);
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if (rc != 0) {
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@@ -4776,9 +4777,9 @@ set_frequency(struct drx_demod_instance *demod,
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No need to account for mirroring on RF
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*/
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switch (ext_attr->standard) {
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case DRX_STANDARD_ITU_A: /* fallthrough */
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case DRX_STANDARD_ITU_C: /* fallthrough */
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case DRX_STANDARD_PAL_SECAM_LP: /* fallthrough */
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case DRX_STANDARD_ITU_A:
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case DRX_STANDARD_ITU_C:
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case DRX_STANDARD_PAL_SECAM_LP:
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case DRX_STANDARD_8VSB:
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select_pos_image = true;
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break;
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@@ -4787,11 +4788,12 @@ set_frequency(struct drx_demod_instance *demod,
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Sound carrier is already 3Mhz above centre frequency due
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to tuner setting so now add an extra shift of 1MHz... */
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fm_frequency_shift = 1000;
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case DRX_STANDARD_ITU_B: /* fallthrough */
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case DRX_STANDARD_NTSC: /* fallthrough */
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case DRX_STANDARD_PAL_SECAM_BG: /* fallthrough */
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case DRX_STANDARD_PAL_SECAM_DK: /* fallthrough */
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case DRX_STANDARD_PAL_SECAM_I: /* fallthrough */
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/*fall through */
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case DRX_STANDARD_ITU_B:
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case DRX_STANDARD_NTSC:
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case DRX_STANDARD_PAL_SECAM_BG:
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case DRX_STANDARD_PAL_SECAM_DK:
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case DRX_STANDARD_PAL_SECAM_I:
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case DRX_STANDARD_PAL_SECAM_L:
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select_pos_image = false;
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break;
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@@ -1517,12 +1517,14 @@ static int SetDeviceTypeId(struct drxd_state *state)
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switch (deviceId) {
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case 4:
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state->diversity = 1;
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/* fall through */
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case 3:
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case 7:
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state->PGA = 1;
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break;
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case 6:
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state->diversity = 1;
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/* fall through */
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case 5:
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case 8:
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break;
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@@ -1969,7 +1971,8 @@ static int DRX_Start(struct drxd_state *state, s32 off)
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switch (p->transmission_mode) {
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default: /* Not set, detect it automatically */
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operationMode |= SC_RA_RAM_OP_AUTO_MODE__M;
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/* fall through , try first guess DRX_FFTMODE_8K */
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/* try first guess DRX_FFTMODE_8K */
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/* fall through */
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case TRANSMISSION_MODE_8K:
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transmissionParams |= SC_RA_RAM_OP_PARAM_MODE_8K;
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if (state->type_A) {
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@@ -2143,8 +2146,8 @@ static int DRX_Start(struct drxd_state *state, s32 off)
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switch (p->modulation) {
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default:
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operationMode |= SC_RA_RAM_OP_AUTO_CONST__M;
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/* fall through , try first guess
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DRX_CONSTELLATION_QAM64 */
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/* try first guess DRX_CONSTELLATION_QAM64 */
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/* fall through */
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case QAM_64:
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transmissionParams |= SC_RA_RAM_OP_PARAM_CONST_QAM64;
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if (state->type_A) {
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@@ -2280,6 +2283,7 @@ static int DRX_Start(struct drxd_state *state, s32 off)
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break;
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default:
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operationMode |= SC_RA_RAM_OP_AUTO_RATE__M;
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/* fall through */
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case FEC_2_3:
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transmissionParams |= SC_RA_RAM_OP_PARAM_RATE_2_3;
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if (state->type_A) {
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@@ -3271,10 +3271,12 @@ static int dvbt_sc_command(struct drxk_state *state,
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case OFDM_SC_RA_RAM_CMD_PROGRAM_PARAM:
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status |= write16(state, OFDM_SC_RA_RAM_PARAM1__A, param1);
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/* All commands using 1 parameters */
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/* fall through */
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case OFDM_SC_RA_RAM_CMD_SET_ECHO_TIMING:
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case OFDM_SC_RA_RAM_CMD_USER_IO:
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status |= write16(state, OFDM_SC_RA_RAM_PARAM0__A, param0);
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/* All commands using 0 parameters */
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/* fall through */
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case OFDM_SC_RA_RAM_CMD_GET_OP_PARAM:
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case OFDM_SC_RA_RAM_CMD_NULL:
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/* Write command */
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@@ -3782,7 +3784,8 @@ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz,
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case TRANSMISSION_MODE_AUTO:
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default:
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operation_mode |= OFDM_SC_RA_RAM_OP_AUTO_MODE__M;
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/* fall through , try first guess DRX_FFTMODE_8K */
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/* try first guess DRX_FFTMODE_8K */
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/* fall through */
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case TRANSMISSION_MODE_8K:
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transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_MODE_8K;
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break;
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@@ -3796,7 +3799,8 @@ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz,
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default:
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case GUARD_INTERVAL_AUTO:
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operation_mode |= OFDM_SC_RA_RAM_OP_AUTO_GUARD__M;
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/* fall through , try first guess DRX_GUARD_1DIV4 */
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/* try first guess DRX_GUARD_1DIV4 */
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/* fall through */
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case GUARD_INTERVAL_1_4:
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transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_GUARD_4;
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break;
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@@ -3817,9 +3821,9 @@ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz,
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case HIERARCHY_NONE:
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default:
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operation_mode |= OFDM_SC_RA_RAM_OP_AUTO_HIER__M;
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/* fall through , try first guess SC_RA_RAM_OP_PARAM_HIER_NO */
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/* try first guess SC_RA_RAM_OP_PARAM_HIER_NO */
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/* transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_HIER_NO; */
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/* break; */
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/* fall through */
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case HIERARCHY_1:
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transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_HIER_A1;
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break;
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@@ -3837,7 +3841,8 @@ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz,
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case QAM_AUTO:
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default:
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operation_mode |= OFDM_SC_RA_RAM_OP_AUTO_CONST__M;
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/* fall through , try first guess DRX_CONSTELLATION_QAM64 */
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/* try first guess DRX_CONSTELLATION_QAM64 */
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/* fall through */
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case QAM_64:
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transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_CONST_QAM64;
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break;
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@@ -3880,7 +3885,8 @@ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz,
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case FEC_AUTO:
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default:
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operation_mode |= OFDM_SC_RA_RAM_OP_AUTO_RATE__M;
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/* fall through , try first guess DRX_CODERATE_2DIV3 */
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/* try first guess DRX_CODERATE_2DIV3 */
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/* fall through */
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case FEC_2_3:
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transmission_params |= OFDM_SC_RA_RAM_OP_PARAM_RATE_2_3;
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break;
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@@ -3914,7 +3920,7 @@ static int set_dvbt(struct drxk_state *state, u16 intermediate_freqk_hz,
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switch (state->props.bandwidth_hz) {
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case 0:
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state->props.bandwidth_hz = 8000000;
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/* fall though */
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/* fall through */
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case 8000000:
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bandwidth = DRXK_BANDWIDTH_8MHZ_IN_HZ;
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status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A,
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@@ -211,6 +211,7 @@ static int mt352_set_parameters(struct dvb_frontend *fe)
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if (op->hierarchy == HIERARCHY_AUTO ||
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op->hierarchy == HIERARCHY_NONE)
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break;
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/* fall through */
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default:
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return -EINVAL;
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}
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@@ -493,8 +493,8 @@ start:
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switch (reg&0xff) {
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case 0x06:
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if (reg & 0x1000) usK = 3 << 24;
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/* Fall through to QAM64 case */
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case 0x43:
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/* fall through */
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case 0x43: /* QAM64 */
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c = 150204167;
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break;
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case 0x45:
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@@ -51,7 +51,7 @@ static int debug;
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#define dprintk(arg...) do { \
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if (debug) \
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printk(arg); \
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} while (0)
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} while (0)
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/* Register values to initialise the demod, defaults to VSB */
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static struct init_tab {
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@@ -410,7 +410,7 @@ static int s5h1411_set_if_freq(struct dvb_frontend *fe, int KHz)
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default:
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dprintk("%s(%d KHz) Invalid, defaulting to 5380\n",
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__func__, KHz);
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/* no break, need to continue */
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/* fall through */
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case 5380:
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case 44000:
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s5h1411_writereg(state, S5H1411_I2C_TOP_ADDR, 0x38, 0x1be4);
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@@ -211,7 +211,7 @@ static int zl10353_set_parameters(struct dvb_frontend *fe)
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break;
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default:
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c->bandwidth_hz = 8000000;
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/* fall though */
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/* fall through */
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case 8000000:
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zl10353_single_write(fe, MCLK_RATIO, 0x75);
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zl10353_single_write(fe, 0x64, 0x36);
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@@ -268,6 +268,7 @@ static int zl10353_set_parameters(struct dvb_frontend *fe)
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if (c->hierarchy == HIERARCHY_AUTO ||
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c->hierarchy == HIERARCHY_NONE)
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break;
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/* fall through */
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default:
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return -EINVAL;
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}
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@@ -655,6 +655,7 @@ restart:
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break;
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case 0: /* 4.5 */
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state->detected_std = V4L2_STD_MN;
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/* fall-through */
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default:
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no_second:
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state->second = msp3400c_carrier_detect_main[max1].cdo;
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@@ -709,6 +709,7 @@ static int ov6650_set_fmt(struct v4l2_subdev *sd,
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switch (mf->code) {
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case MEDIA_BUS_FMT_Y10_1X10:
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mf->code = MEDIA_BUS_FMT_Y8_1X8;
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/* fall through */
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case MEDIA_BUS_FMT_Y8_1X8:
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case MEDIA_BUS_FMT_YVYU8_2X8:
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case MEDIA_BUS_FMT_YUYV8_2X8:
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@@ -718,6 +719,7 @@ static int ov6650_set_fmt(struct v4l2_subdev *sd,
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break;
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default:
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mf->code = MEDIA_BUS_FMT_SBGGR8_1X8;
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/* fall through */
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case MEDIA_BUS_FMT_SBGGR8_1X8:
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mf->colorspace = V4L2_COLORSPACE_SRGB;
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break;
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@@ -2081,7 +2081,7 @@ void cx23885_card_setup(struct cx23885_dev *dev)
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ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
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ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
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ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
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/* break omitted intentionally */
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/* fall-through */
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case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
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ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
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ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
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@@ -2238,6 +2238,7 @@ void cx23885_card_setup(struct cx23885_dev *dev)
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/* Currently only enabled for the integrated IR controller */
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if (!enable_885_ir)
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break;
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/* fall-through */
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case CX23885_BOARD_HAUPPAUGE_HVR1250:
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case CX23885_BOARD_HAUPPAUGE_HVR1800:
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case CX23885_BOARD_HAUPPAUGE_IMPACTVCBE:
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@@ -1420,7 +1420,7 @@ static int cx8800_initdev(struct pci_dev *pci_dev,
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request_module("rtc-isl1208");
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core->i2c_rtc = i2c_new_device(&core->i2c_adap, &rtc_info);
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}
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/* break intentionally omitted */
|
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/* fall-through */
|
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case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
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request_module("ir-kbd-i2c");
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}
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@@ -789,9 +789,10 @@ static void dvb_input_detach(struct ddb_input *input)
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dvb_frontend_detach(input->fe);
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input->fe = NULL;
|
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}
|
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/* fall-through */
|
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case 4:
|
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dvb_net_release(&input->dvbnet);
|
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|
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/* fall-through */
|
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case 3:
|
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dvbdemux->dmx.close(&dvbdemux->dmx);
|
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dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
|
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@@ -799,10 +800,10 @@ static void dvb_input_detach(struct ddb_input *input)
|
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dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
|
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&input->mem_frontend);
|
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dvb_dmxdev_release(&input->dmxdev);
|
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|
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/* fall-through */
|
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case 2:
|
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dvb_dmx_release(&input->demux);
|
||||
|
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/* fall-through */
|
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case 1:
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dvb_unregister_adapter(adap);
|
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}
|
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|
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@@ -7806,7 +7806,7 @@ int saa7134_board_init2(struct saa7134_dev *dev)
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dev->name, saa7134_boards[dev->board].name);
|
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break;
|
||||
}
|
||||
/* break intentionally omitted */
|
||||
/* fall-through */
|
||||
case SAA7134_BOARD_VIDEOMATE_DVBT_300:
|
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case SAA7134_BOARD_ASUS_EUROPA2_HYBRID:
|
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case SAA7134_BOARD_ASUS_EUROPA_HYBRID:
|
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@@ -7864,7 +7864,7 @@ int saa7134_board_init2(struct saa7134_dev *dev)
|
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break;
|
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case SAA7134_BOARD_HAUPPAUGE_HVR1110:
|
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hauppauge_eeprom(dev, dev->eedata+0x80);
|
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/* break intentionally omitted */
|
||||
/* fall-through */
|
||||
case SAA7134_BOARD_PINNACLE_PCTV_310i:
|
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case SAA7134_BOARD_KWORLD_DVBT_210:
|
||||
case SAA7134_BOARD_TEVION_DVBT_220RF:
|
||||
|
||||
@@ -511,6 +511,7 @@ static int solo_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
|
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default:
|
||||
dev_warn(&pdev->dev, "Invalid chip_id 0x%02x, assuming 4 ch\n",
|
||||
chip_id);
|
||||
/* fall through */
|
||||
case 5:
|
||||
solo_dev->nr_chans = 4;
|
||||
solo_dev->nr_ext = 1;
|
||||
|
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@@ -192,6 +192,7 @@ int solo_i2c_isr(struct solo_dev *solo_dev)
|
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}
|
||||
|
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solo_dev->i2c_state = IIC_STATE_WRITE;
|
||||
/* fall through */
|
||||
case IIC_STATE_WRITE:
|
||||
ret = solo_i2c_handle_write(solo_dev);
|
||||
break;
|
||||
|
||||
@@ -1277,6 +1277,7 @@ static int fimc_cap_g_selection(struct file *file, void *fh,
|
||||
case V4L2_SEL_TGT_COMPOSE_DEFAULT:
|
||||
case V4L2_SEL_TGT_COMPOSE_BOUNDS:
|
||||
f = &ctx->d_frame;
|
||||
/* fall through */
|
||||
case V4L2_SEL_TGT_CROP_BOUNDS:
|
||||
case V4L2_SEL_TGT_CROP_DEFAULT:
|
||||
s->r.left = 0;
|
||||
@@ -1287,6 +1288,7 @@ static int fimc_cap_g_selection(struct file *file, void *fh,
|
||||
|
||||
case V4L2_SEL_TGT_COMPOSE:
|
||||
f = &ctx->d_frame;
|
||||
/* fall through */
|
||||
case V4L2_SEL_TGT_CROP:
|
||||
s->r.left = f->offs_h;
|
||||
s->r.top = f->offs_v;
|
||||
@@ -1610,6 +1612,7 @@ static int fimc_subdev_get_selection(struct v4l2_subdev *sd,
|
||||
switch (sel->target) {
|
||||
case V4L2_SEL_TGT_COMPOSE_BOUNDS:
|
||||
f = &ctx->d_frame;
|
||||
/* fall through */
|
||||
case V4L2_SEL_TGT_CROP_BOUNDS:
|
||||
r->width = f->o_width;
|
||||
r->height = f->o_height;
|
||||
|
||||
@@ -393,6 +393,7 @@ static int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime)
|
||||
dma_free_coherent(cam->dev, cam->dma_buf_size,
|
||||
cam->dma_bufs[0], cam->dma_handles[0]);
|
||||
cam->nbufs = 0;
|
||||
/* fall-through */
|
||||
case 0:
|
||||
cam_err(cam, "Insufficient DMA buffers, cannot operate\n");
|
||||
return -ENOMEM;
|
||||
|
||||
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Reference in New Issue
Block a user