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Merge branch 'prima2/multiplatform' into next/multiplatform

Browse Source 
This series enables multiplatform support on the SIRF prima2/marco/atlas6
platform. The code was already quite tidy, so this is a relatively simple
change, and it follows similar changes we made to other ARMv7 based
platforms recently.

* prima2/multiplatform:
  ARM: sirf: enable support in multi_v7_defconfig
  ARM: sirf: enable multiplatform support
  ARM: sirf: use clocksource_of infrastructure
  ARM: sirf: move debug-macro.S to include/debug/sirf.S
  ARM: sirf: enable sparse IRQ
  ARM: sirf: move irq driver to drivers/irqchip
  ARM: sirf: fix prima2 interrupt lookup
  pinctrl: sirf: convert to linear irq domain
  clocksource: make CLOCKSOURCE_OF_DECLARE type safe
  ARM/dts: prima2: add .dtsi for atlas6 and .dts for atla6-evb board
  arm: prima2: add new SiRFatlas6 machine in common board
  ARM: smp_twd: convert to use CLKSRC_OF init
  clocksource: tegra20: use the device_node pointer passed to init
  clocksource: pass DT node pointer to init functions
  clocksource: add empty version of clocksource_of_init

Conflicts:
	arch/arm/configs/multi_v7_defconfig
	arch/arm/mach-spear/spear13xx.c
Tested-by: Barry Song <Barry.Song@csr.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
2013-03-28 12:25:51 +01:00
parent cde35bd027 dbaf6a8d5d
commit 063ab6daeb
40 changed files with 1047 additions and 511 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/Kconfig
+1 -16
View File
@@ -49,7 +49,6 @@ config ARM
select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_SYSCALL_TRACEPOINTS
select HAVE_UID16
select HAVE_VIRT_TO_BUS
select KTIME_SCALAR
select PERF_USE_VMALLOC
select RTC_LIB
@@ -404,21 +403,6 @@ config ARCH_GEMINI
help
Support for the Cortina Systems Gemini family SoCs
config ARCH_SIRF
bool "CSR SiRF"
select ARCH_REQUIRE_GPIOLIB
select AUTO_ZRELADDR
select COMMON_CLK
select GENERIC_CLOCKEVENTS
select GENERIC_IRQ_CHIP
select MIGHT_HAVE_CACHE_L2X0
select NO_IOPORT
select PINCTRL
select PINCTRL_SIRF
select USE_OF
help
Support for CSR SiRFprimaII/Marco/Polo platforms
config ARCH_EBSA110
bool "EBSA-110"
select ARCH_USES_GETTIMEOFFSET
@@ -1557,6 +1541,7 @@ config HAVE_ARM_ARCH_TIMER
config HAVE_ARM_TWD
bool
depends on SMP
select CLKSRC_OF if OF
help
This options enables support for the ARM timer and watchdog unit
arch/arm/Kconfig.debug
+1
View File
@@ -608,6 +608,7 @@ config DEBUG_LL_INCLUDE
default "debug/nomadik.S" if DEBUG_NOMADIK_UART
default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART
default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART
default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1
default "debug/socfpga.S" if DEBUG_SOCFPGA_UART
default "debug/sunxi.S" if DEBUG_SUNXI_UART0 || DEBUG_SUNXI_UART1
default "debug/vexpress.S" if DEBUG_VEXPRESS_UART0_DETECT || \
arch/arm/boot/dts/atlas6-evb.dts
+78
View File
@@ -0,0 +1,78 @@
/*
* DTS file for CSR SiRFatlas6 Evaluation Board
*
* Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
*
* Licensed under GPLv2 or later.
*/
/dts-v1/;
/include/ "atlas6.dtsi"
/ {
model = "CSR SiRFatlas6 Evaluation Board";
compatible = "sirf,atlas6-cb", "sirf,atlas6";
memory {
reg = <0x00000000 0x20000000>;
};
axi {
peri-iobg {
uart@b0060000 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins_a>;
};
spi@b00d0000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins_a>;
spi@0 {
compatible = "spidev";
reg = <0>;
spi-max-frequency = <1000000>;
};
};
spi@b0170000 {
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins_a>;
};
i2c0: i2c@b00e0000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
lcd@40 {
compatible = "sirf,lcd";
reg = <0x40>;
};
};
};
disp-iobg {
lcd@90010000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&lcd_24pins_a>;
};
};
};
display: display@0 {
panels {
panel0: panel@0 {
panel-name = "Innolux TFT";
hactive = <800>;
vactive = <480>;
left_margin = <20>;
right_margin = <234>;
upper_margin = <3>;
lower_margin = <41>;
hsync_len = <3>;
vsync_len = <2>;
pixclock = <33264000>;
sync = <3>;
timing = <0x88>;
};
};
};
};
arch/arm/boot/dts/atlas6.dtsi
+668
View File
File diff suppressed because it is too large Load Diff
arch/arm/configs/multi_v7_defconfig
+6
View File
@@ -3,6 +3,7 @@ CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_ARCH_MVEBU=y
CONFIG_MACH_ARMADA_370=y
CONFIG_ARCH_SIRF=y
CONFIG_MACH_ARMADA_XP=y
CONFIG_ARCH_HIGHBANK=y
CONFIG_ARCH_SOCFPGA=y
@@ -40,12 +41,16 @@ CONFIG_KEYBOARD_SPEAR=y
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIAL_SIRFSOC=y
CONFIG_SERIAL_SIRFSOC_CONSOLE=y
CONFIG_IPMI_HANDLER=y
CONFIG_IPMI_SI=y
CONFIG_I2C=y
CONFIG_I2C_DESIGNWARE_PLATFORM=y
CONFIG_I2C_SIRF=y
CONFIG_SPI=y
CONFIG_SPI_PL022=y
CONFIG_SPI_SIRF=y
CONFIG_GPIO_PL061=y
CONFIG_FB=y
CONFIG_FB_ARMCLCD=y
@@ -66,4 +71,5 @@ CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_PL031=y
CONFIG_DMADEVICES=y
CONFIG_PL330_DMA=y
CONFIG_SIRF_DMA=y
CONFIG_DW_DMAC=y
arch/arm/include/asm/smp_twd.h
-8
View File
@@ -34,12 +34,4 @@ struct twd_local_timer name __initdata = { \
int twd_local_timer_register(struct twd_local_timer *);
#ifdef CONFIG_HAVE_ARM_TWD
void twd_local_timer_of_register(void);
#else
static inline void twd_local_timer_of_register(void)
{
}
#endif
#endif
arch/arm/mach-prima2/include/mach/uart.h → arch/arm/include/debug/sirf.S
+21 -8
View File
@@ -1,15 +1,11 @@
/*
* arch/arm/mach-prima2/include/mach/uart.h
* arch/arm/mach-prima2/include/mach/debug-macro.S
*
* Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
*
* Licensed under GPLv2 or later.
*/
#ifndef __MACH_PRIMA2_SIRFSOC_UART_H
#define __MACH_PRIMA2_SIRFSOC_UART_H
/* UART-1: used as serial debug port */
#if defined(CONFIG_DEBUG_SIRFPRIMA2_UART1)
#define SIRFSOC_UART1_PA_BASE 0xb0060000
#elif defined(CONFIG_DEBUG_SIRFMARCO_UART1)
@@ -17,8 +13,8 @@
#else
#define SIRFSOC_UART1_PA_BASE 0
#endif
#define SIRFSOC_UART1_VA_BASE SIRFSOC_VA(0x060000)
#define SIRFSOC_UART1_SIZE SZ_4K
#define SIRFSOC_UART1_VA_BASE 0xFEC60000
#define SIRFSOC_UART_TXFIFO_STATUS 0x0114
#define SIRFSOC_UART_TXFIFO_DATA 0x0118
@@ -26,4 +22,21 @@
#define SIRFSOC_UART1_TXFIFO_FULL (1 << 5)
#define SIRFSOC_UART1_TXFIFO_EMPTY (1 << 6)
#endif
.macro addruart, rp, rv, tmp
ldr \rp, =SIRFSOC_UART1_PA_BASE @ physical
ldr \rv, =SIRFSOC_UART1_VA_BASE @ virtual
.endm
.macro senduart,rd,rx
str \rd, [\rx, #SIRFSOC_UART_TXFIFO_DATA]
.endm
.macro busyuart,rd,rx
.endm
.macro waituart,rd,rx
1001: ldr \rd, [\rx, #SIRFSOC_UART_TXFIFO_STATUS]
tst \rd, #SIRFSOC_UART1_TXFIFO_EMPTY
beq 1001b
.endm
arch/arm/kernel/smp_twd.c
+4 -13
View File
@@ -362,25 +362,13 @@ int __init twd_local_timer_register(struct twd_local_timer *tlt)
}
#ifdef CONFIG_OF
const static struct of_device_id twd_of_match[] __initconst = {
{ .compatible = "arm,cortex-a9-twd-timer", },
{ .compatible = "arm,cortex-a5-twd-timer", },
{ .compatible = "arm,arm11mp-twd-timer", },
{ },
};
void __init twd_local_timer_of_register(void)
static void __init twd_local_timer_of_register(struct device_node *np)
{
struct device_node *np;
int err;
if (!is_smp() || !setup_max_cpus)
return;
np = of_find_matching_node(NULL, twd_of_match);
if (!np)
return;
twd_ppi = irq_of_parse_and_map(np, 0);
if (!twd_ppi) {
err = -EINVAL;
@@ -398,4 +386,7 @@ void __init twd_local_timer_of_register(void)
out:
WARN(err, "twd_local_timer_of_register failed (%d)\n", err);
}
CLOCKSOURCE_OF_DECLARE(arm_twd_a9, "arm,cortex-a9-twd-timer", twd_local_timer_of_register);
CLOCKSOURCE_OF_DECLARE(arm_twd_a5, "arm,cortex-a5-twd-timer", twd_local_timer_of_register);
CLOCKSOURCE_OF_DECLARE(arm_twd_11mp, "arm,arm11mp-twd-timer", twd_local_timer_of_register);
#endif
arch/arm/mach-highbank/highbank.c
+2 -3
View File
@@ -32,7 +32,6 @@
#include <asm/cacheflush.h>
#include <asm/cputype.h>
#include <asm/smp_plat.h>
#include <asm/smp_twd.h>
#include <asm/hardware/arm_timer.h>
#include <asm/hardware/timer-sp.h>
#include <asm/hardware/cache-l2x0.h>
@@ -119,10 +118,10 @@ static void __init highbank_timer_init(void)
sp804_clocksource_and_sched_clock_init(timer_base + 0x20, "timer1");
sp804_clockevents_init(timer_base, irq, "timer0");
twd_local_timer_of_register();
arch_timer_of_register();
arch_timer_sched_clock_init();
clocksource_of_init();
}
static void highbank_power_off(void)
arch/arm/mach-imx/mach-imx6q.c
+2 -3
View File
@@ -12,6 +12,7 @@
#include <linux/clk.h>
#include <linux/clkdev.h>
#include <linux/clocksource.h>
#include <linux/cpu.h>
#include <linux/delay.h>
#include <linux/export.h>
@@ -28,11 +29,9 @@
#include <linux/regmap.h>
#include <linux/micrel_phy.h>
#include <linux/mfd/syscon.h>
#include <asm/smp_twd.h>
#include <asm/hardware/cache-l2x0.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include <asm/system_misc.h>
#include "common.h"
@@ -292,7 +291,7 @@ static void __init imx6q_init_irq(void)
static void __init imx6q_timer_init(void)
{
mx6q_clocks_init();
twd_local_timer_of_register();
clocksource_of_init();
imx_print_silicon_rev("i.MX6Q", imx6q_revision());
}
arch/arm/mach-omap2/timer.c
+1 -1
View File
@@ -597,7 +597,7 @@ void __init omap4_local_timer_init(void)
int err;
if (of_have_populated_dt()) {
twd_local_timer_of_register();
clocksource_of_init();
return;
}
arch/arm/mach-prima2/Kconfig
+21 -1
View File
@@ -1,6 +1,26 @@
config ARCH_SIRF
bool "CSR SiRF" if ARCH_MULTI_V7
select ARCH_REQUIRE_GPIOLIB
select GENERIC_CLOCKEVENTS
select GENERIC_IRQ_CHIP
select MIGHT_HAVE_CACHE_L2X0
select NO_IOPORT
select PINCTRL
select PINCTRL_SIRF
help
Support for CSR SiRFprimaII/Marco/Polo platforms
if ARCH_SIRF
menu "CSR SiRF primaII/Marco/Polo Specific Features"
menu "CSR SiRF atlas6/primaII/Marco/Polo Specific Features"
config ARCH_ATLAS6
bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform"
default y
select CPU_V7
select SIRF_IRQ
help
Support for CSR SiRFSoC ARM Cortex A9 Platform
config ARCH_PRIMA2
bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
arch/arm/mach-prima2/Makefile
+2 -3
View File
@@ -4,8 +4,7 @@ obj-y += rtciobrg.o
obj-$(CONFIG_DEBUG_LL) += lluart.o
obj-$(CONFIG_CACHE_L2X0) += l2x0.o
obj-$(CONFIG_SUSPEND) += pm.o sleep.o
obj-$(CONFIG_SIRF_IRQ) += irq.o
obj-$(CONFIG_SMP) += platsmp.o headsmp.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
obj-$(CONFIG_ARCH_PRIMA2) += timer-prima2.o
obj-$(CONFIG_ARCH_MARCO) += timer-marco.o
CFLAGS_hotplug.o += -march=armv7-a
arch/arm/mach-prima2/common.c
+31 -6
View File
@@ -6,6 +6,7 @@
* Licensed under GPLv2 or later.
*/
#include <linux/clocksource.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/irqchip.h>
@@ -31,12 +32,38 @@ void __init sirfsoc_init_late(void)
sirfsoc_pm_init();
}
static __init void sirfsoc_init_time(void)
{
/* initialize clocking early, we want to set the OS timer */
sirfsoc_of_clk_init();
clocksource_of_init();
}
static __init void sirfsoc_map_io(void)
{
sirfsoc_map_lluart();
sirfsoc_map_scu();
}
#ifdef CONFIG_ARCH_ATLAS6
static const char *atlas6_dt_match[] __initdata = {
"sirf,atlas6",
NULL
};
DT_MACHINE_START(ATLAS6_DT, "Generic ATLAS6 (Flattened Device Tree)")
/* Maintainer: Barry Song <baohua.song@csr.com> */
.nr_irqs = 128,
.map_io = sirfsoc_map_io,
.init_irq = irqchip_init,
.init_time = sirfsoc_init_time,
.init_machine = sirfsoc_mach_init,
.init_late = sirfsoc_init_late,
.dt_compat = atlas6_dt_match,
.restart = sirfsoc_restart,
MACHINE_END
#endif
#ifdef CONFIG_ARCH_PRIMA2
static const char *prima2_dt_match[] __initdata = {
"sirf,prima2",
@@ -45,12 +72,10 @@ static const char *prima2_dt_match[] __initdata = {
DT_MACHINE_START(PRIMA2_DT, "Generic PRIMA2 (Flattened Device Tree)")
/* Maintainer: Barry Song <baohua.song@csr.com> */
.nr_irqs = 128,
.map_io = sirfsoc_map_io,
.init_irq = sirfsoc_of_irq_init,
.init_time = sirfsoc_prima2_timer_init,
#ifdef CONFIG_MULTI_IRQ_HANDLER
.handle_irq = sirfsoc_handle_irq,
#endif
.init_irq = irqchip_init,
.init_time = sirfsoc_init_time,
.dma_zone_size = SZ_256M,
.init_machine = sirfsoc_mach_init,
.init_late = sirfsoc_init_late,
@@ -70,7 +95,7 @@ DT_MACHINE_START(MARCO_DT, "Generic MARCO (Flattened Device Tree)")
.smp = smp_ops(sirfsoc_smp_ops),
.map_io = sirfsoc_map_io,
.init_irq = irqchip_init,
.init_time = sirfsoc_marco_timer_init,
.init_time = sirfsoc_init_time,
.init_machine = sirfsoc_mach_init,
.init_late = sirfsoc_init_late,
.dt_compat = marco_dt_match,
arch/arm/mach-prima2/common.h
+2 -2
View File
@@ -13,8 +13,8 @@
#include <asm/mach/time.h>
#include <asm/exception.h>
extern void sirfsoc_prima2_timer_init(void);
extern void sirfsoc_marco_timer_init(void);
#define SIRFSOC_VA_BASE _AC(0xFEC00000, UL)
#define SIRFSOC_VA(x) (SIRFSOC_VA_BASE + ((x) & 0x00FFF000))
extern struct smp_operations sirfsoc_smp_ops;
extern void sirfsoc_secondary_startup(void);
arch/arm/mach-prima2/include/mach/clkdev.h
-15
View File
@@ -1,15 +0,0 @@
/*
* arch/arm/mach-prima2/include/mach/clkdev.h
*
* Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
*
* Licensed under GPLv2 or later.
*/
#ifndef __MACH_CLKDEV_H
#define __MACH_CLKDEV_H
#define __clk_get(clk) ({ 1; })
#define __clk_put(clk) do { } while (0)
#endif
arch/arm/mach-prima2/include/mach/debug-macro.S
-29
View File
@@ -1,29 +0,0 @@
/*
* arch/arm/mach-prima2/include/mach/debug-macro.S
*
* Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
*
* Licensed under GPLv2 or later.
*/
#include <mach/hardware.h>
#include <mach/uart.h>
.macro addruart, rp, rv, tmp
ldr \rp, =SIRFSOC_UART1_PA_BASE @ physical
ldr \rv, =SIRFSOC_UART1_VA_BASE @ virtual
.endm
.macro senduart,rd,rx
str \rd, [\rx, #SIRFSOC_UART_TXFIFO_DATA]
.endm
.macro busyuart,rd,rx
.endm
.macro waituart,rd,rx
1001: ldr \rd, [\rx, #SIRFSOC_UART_TXFIFO_STATUS]
tst \rd, #SIRFSOC_UART1_TXFIFO_EMPTY
beq 1001b
.endm
arch/arm/mach-prima2/include/mach/entry-macro.S
-22
View File
@@ -1,22 +0,0 @@
/*
* arch/arm/mach-prima2/include/mach/entry-macro.S
*
* Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
*
* Licensed under GPLv2 or later.
*/
#include <mach/hardware.h>
#define SIRFSOC_INT_ID 0x38
.macro get_irqnr_preamble, base, tmp
ldr \base, =sirfsoc_intc_base
ldr \base, [\base]
.endm
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
ldr \irqnr, [\base, #SIRFSOC_INT_ID] @ Get the highest priority irq
cmp \irqnr, #0x40 @ the irq num can't be larger than 0x3f
movges \irqnr, #0
.endm
arch/arm/mach-prima2/include/mach/hardware.h
-15
View File
@@ -1,15 +0,0 @@
/*
* arch/arm/mach-prima2/include/mach/hardware.h
*
* Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
*
* Licensed under GPLv2 or later.
*/
#ifndef __MACH_HARDWARE_H__
#define __MACH_HARDWARE_H__
#include <asm/sizes.h>
#include <mach/map.h>
#endif
arch/arm/mach-prima2/include/mach/irqs.h
-17
View File
@@ -1,17 +0,0 @@
/*
* arch/arm/mach-prima2/include/mach/irqs.h
*
* Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
*
* Licensed under GPLv2 or later.
*/
#ifndef __ASM_ARCH_IRQS_H
#define __ASM_ARCH_IRQS_H
#define SIRFSOC_INTENAL_IRQ_START 0
#define SIRFSOC_INTENAL_IRQ_END 127
#define SIRFSOC_GPIO_IRQ_START (SIRFSOC_INTENAL_IRQ_END + 1)
#define NR_IRQS 288
#endif

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