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Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

Browse Source 
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
  MIPS: Kill unused <asm/debug.h> inclusions
  MIPS: IP32: Add platform device for CMOS RTC; remove dead code
  RTC: M48T35: new RTC driver
  MIPS: IP27: Switch over to RTC class driver
  MIPS: DS1286: New RTC driver
  MIPS: IP22/28: Switch over to RTC class driver
  MIPS: PCI: Scan busses when they are registered
  MIPS: WGT634U: Add reset button support
  MIPS: BCM47xx: Use the new SSB GPIO API
  MIPS: BCM47xx: Remove references to BCM947XX
  MIPS: WGT634U: Add machine detection message
  MIPS: Align .data.cacheline_aligned based on CONFIG_MIPS_L1_CACHE_SHIFT
  MIPS: show_cpuinfo prints the type of the calling CPU
  MIPS: Fix wrong branch target in new spin_lock code.
  MIPS: Have a heart for a lonely, lost header file ...
This commit is contained in:
Linus Torvalds
2008-10-15 10:22:21 -07:00
parent 7c3b1dcf13 08da6f1bdd
commit 04ab591808
31 changed files with 878 additions and 295 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/mips/Kconfig
+1
View File
@@ -52,6 +52,7 @@ config BCM47XX
select SSB
select SSB_DRIVER_MIPS
select SSB_DRIVER_EXTIF
select SSB_EMBEDDED
select SSB_PCICORE_HOSTMODE if PCI
select GENERIC_GPIO
select SYS_HAS_EARLY_PRINTK
arch/mips/bcm47xx/gpio.c
+41 -58
View File
@@ -12,68 +12,51 @@
#include <asm/mach-bcm47xx/bcm47xx.h>
#include <asm/mach-bcm47xx/gpio.h>
int bcm47xx_gpio_to_irq(unsigned gpio)
#if (BCM47XX_CHIPCO_GPIO_LINES > BCM47XX_EXTIF_GPIO_LINES)
static DECLARE_BITMAP(gpio_in_use, BCM47XX_CHIPCO_GPIO_LINES);
#else
static DECLARE_BITMAP(gpio_in_use, BCM47XX_EXTIF_GPIO_LINES);
#endif
int gpio_request(unsigned gpio, const char *tag)
{
if (ssb_bcm47xx.chipco.dev)
if (ssb_chipco_available(&ssb_bcm47xx.chipco) &&
((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
return -EINVAL;
if (ssb_extif_available(&ssb_bcm47xx.extif) &&
((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
return -EINVAL;
if (test_and_set_bit(gpio, gpio_in_use))
return -EBUSY;
return 0;
}
EXPORT_SYMBOL(gpio_request);
void gpio_free(unsigned gpio)
{
if (ssb_chipco_available(&ssb_bcm47xx.chipco) &&
((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES))
return;
if (ssb_extif_available(&ssb_bcm47xx.extif) &&
((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES))
return;
clear_bit(gpio, gpio_in_use);
}
EXPORT_SYMBOL(gpio_free);
int gpio_to_irq(unsigned gpio)
{
if (ssb_chipco_available(&ssb_bcm47xx.chipco))
return ssb_mips_irq(ssb_bcm47xx.chipco.dev) + 2;
else if (ssb_bcm47xx.extif.dev)
else if (ssb_extif_available(&ssb_bcm47xx.extif))
return ssb_mips_irq(ssb_bcm47xx.extif.dev) + 2;
else
return -EINVAL;
}
EXPORT_SYMBOL_GPL(bcm47xx_gpio_to_irq);
int bcm47xx_gpio_get_value(unsigned gpio)
{
if (ssb_bcm47xx.chipco.dev)
return ssb_chipco_gpio_in(&ssb_bcm47xx.chipco, 1 << gpio);
else if (ssb_bcm47xx.extif.dev)
return ssb_extif_gpio_in(&ssb_bcm47xx.extif, 1 << gpio);
else
return 0;
}
EXPORT_SYMBOL_GPL(bcm47xx_gpio_get_value);
void bcm47xx_gpio_set_value(unsigned gpio, int value)
{
if (ssb_bcm47xx.chipco.dev)
ssb_chipco_gpio_out(&ssb_bcm47xx.chipco,
1 << gpio,
value ? 1 << gpio : 0);
else if (ssb_bcm47xx.extif.dev)
ssb_extif_gpio_out(&ssb_bcm47xx.extif,
1 << gpio,
value ? 1 << gpio : 0);
}
EXPORT_SYMBOL_GPL(bcm47xx_gpio_set_value);
int bcm47xx_gpio_direction_input(unsigned gpio)
{
if (ssb_bcm47xx.chipco.dev && (gpio < BCM47XX_CHIPCO_GPIO_LINES))
ssb_chipco_gpio_outen(&ssb_bcm47xx.chipco,
1 << gpio, 0);
else if (ssb_bcm47xx.extif.dev && (gpio < BCM47XX_EXTIF_GPIO_LINES))
ssb_extif_gpio_outen(&ssb_bcm47xx.extif,
1 << gpio, 0);
else
return -EINVAL;
return 0;
}
EXPORT_SYMBOL_GPL(bcm47xx_gpio_direction_input);
int bcm47xx_gpio_direction_output(unsigned gpio, int value)
{
bcm47xx_gpio_set_value(gpio, value);
if (ssb_bcm47xx.chipco.dev && (gpio < BCM47XX_CHIPCO_GPIO_LINES))
ssb_chipco_gpio_outen(&ssb_bcm47xx.chipco,
1 << gpio, 1 << gpio);
else if (ssb_bcm47xx.extif.dev && (gpio < BCM47XX_EXTIF_GPIO_LINES))
ssb_extif_gpio_outen(&ssb_bcm47xx.extif,
1 << gpio, 1 << gpio);
else
return -EINVAL;
return 0;
}
EXPORT_SYMBOL_GPL(bcm47xx_gpio_direction_output);
EXPORT_SYMBOL_GPL(gpio_to_irq);
arch/mips/bcm47xx/setup.c
+3 -2
View File
@@ -27,6 +27,7 @@
#include <linux/types.h>
#include <linux/ssb/ssb.h>
#include <linux/ssb/ssb_embedded.h>
#include <asm/bootinfo.h>
#include <asm/reboot.h>
#include <asm/time.h>
@@ -41,7 +42,7 @@ static void bcm47xx_machine_restart(char *command)
printk(KERN_ALERT "Please stand by while rebooting the system...\n");
local_irq_disable();
/* Set the watchdog timer to reset immediately */
ssb_chipco_watchdog_timer_set(&ssb_bcm47xx.chipco, 1);
ssb_watchdog_timer_set(&ssb_bcm47xx, 1);
while (1)
cpu_relax();
}
@@ -50,7 +51,7 @@ static void bcm47xx_machine_halt(void)
{
/* Disable interrupts and watchdog and spin forever */
local_irq_disable();
ssb_chipco_watchdog_timer_set(&ssb_bcm47xx.chipco, 0);
ssb_watchdog_timer_set(&ssb_bcm47xx, 0);
while (1)
cpu_relax();
}
arch/mips/bcm47xx/wgt634u.c
+40
View File
@@ -11,6 +11,9 @@
#include <linux/leds.h>
#include <linux/mtd/physmap.h>
#include <linux/ssb/ssb.h>
#include <linux/interrupt.h>
#include <linux/reboot.h>
#include <linux/gpio.h>
#include <asm/mach-bcm47xx/bcm47xx.h>
/* GPIO definitions for the WGT634U */
@@ -99,6 +102,30 @@ static struct platform_device *wgt634u_devices[] __initdata = {
&wgt634u_gpio_leds,
};
static irqreturn_t gpio_interrupt(int irq, void *ignored)
{
int state;
/* Interrupts are shared, check if the current one is
a GPIO interrupt. */
if (!ssb_chipco_irq_status(&ssb_bcm47xx.chipco,
SSB_CHIPCO_IRQ_GPIO))
return IRQ_NONE;
state = gpio_get_value(WGT634U_GPIO_RESET);
/* Interrupt are level triggered, revert the interrupt polarity
to clear the interrupt. */
gpio_polarity(WGT634U_GPIO_RESET, state);
if (!state) {
printk(KERN_INFO "Reset button pressed");
ctrl_alt_del();
}
return IRQ_HANDLED;
}
static int __init wgt634u_init(void)
{
/* There is no easy way to detect that we are running on a WGT634U
@@ -112,6 +139,19 @@ static int __init wgt634u_init(void)
((et0mac[1] == 0x09 && et0mac[2] == 0x5b) ||
(et0mac[1] == 0x0f && et0mac[2] == 0xb5))) {
struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore;
printk(KERN_INFO "WGT634U machine detected.\n");
if (!request_irq(gpio_to_irq(WGT634U_GPIO_RESET),
gpio_interrupt, IRQF_SHARED,
"WGT634U GPIO", &ssb_bcm47xx.chipco)) {
gpio_direction_input(WGT634U_GPIO_RESET);
gpio_intmask(WGT634U_GPIO_RESET, 1);
ssb_chipco_irq_mask(&ssb_bcm47xx.chipco,
SSB_CHIPCO_IRQ_GPIO,
SSB_CHIPCO_IRQ_GPIO);
}
wgt634u_flash_data.width = mcore->flash_buswidth;
wgt634u_flash_resource.start = mcore->flash_window;
wgt634u_flash_resource.end = mcore->flash_window
arch/mips/emma2rh/common/irq.c
-1
View File
@@ -29,7 +29,6 @@
#include <asm/system.h>
#include <asm/mipsregs.h>
#include <asm/debug.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
arch/mips/emma2rh/common/prom.c
-1
View File
@@ -30,7 +30,6 @@
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
#include <asm/emma2rh/emma2rh.h>
#include <asm/debug.h>
const char *get_system_type(void)
{
arch/mips/emma2rh/markeins/platform.c
-1
View File
@@ -35,7 +35,6 @@
#include <asm/irq.h>
#include <asm/reboot.h>
#include <asm/traps.h>
#include <asm/debug.h>
#include <asm/emma2rh/emma2rh.h>
include/asm-mips/cevt-r4k.h → arch/mips/include/asm/cevt-r4k.h
View File
arch/mips/include/asm/mach-bcm47xx/gpio.h
+22 -23
View File
@@ -9,47 +9,46 @@
#ifndef __BCM47XX_GPIO_H
#define __BCM47XX_GPIO_H
#include <linux/ssb/ssb_embedded.h>
#include <asm/mach-bcm47xx/bcm47xx.h>
#define BCM47XX_EXTIF_GPIO_LINES 5
#define BCM47XX_CHIPCO_GPIO_LINES 16
extern int bcm47xx_gpio_to_irq(unsigned gpio);
extern int bcm47xx_gpio_get_value(unsigned gpio);
extern void bcm47xx_gpio_set_value(unsigned gpio, int value);
extern int bcm47xx_gpio_direction_input(unsigned gpio);
extern int bcm47xx_gpio_direction_output(unsigned gpio, int value);
static inline int gpio_request(unsigned gpio, const char *label)
{
return 0;
}
static inline void gpio_free(unsigned gpio)
{
}
static inline int gpio_to_irq(unsigned gpio)
{
return bcm47xx_gpio_to_irq(gpio);
}
extern int gpio_request(unsigned gpio, const char *label);
extern void gpio_free(unsigned gpio);
extern int gpio_to_irq(unsigned gpio);
static inline int gpio_get_value(unsigned gpio)
{
return bcm47xx_gpio_get_value(gpio);
return ssb_gpio_in(&ssb_bcm47xx, 1 << gpio);
}
static inline void gpio_set_value(unsigned gpio, int value)
{
bcm47xx_gpio_set_value(gpio, value);
ssb_gpio_out(&ssb_bcm47xx, 1 << gpio, value ? 1 << gpio : 0);
}
static inline int gpio_direction_input(unsigned gpio)
{
return bcm47xx_gpio_direction_input(gpio);
return ssb_gpio_outen(&ssb_bcm47xx, 1 << gpio, 0);
}
static inline int gpio_direction_output(unsigned gpio, int value)
{
return bcm47xx_gpio_direction_output(gpio, value);
return ssb_gpio_outen(&ssb_bcm47xx, 1 << gpio, 1 << gpio);
}
static int gpio_intmask(unsigned gpio, int value)
{
return ssb_gpio_intmask(&ssb_bcm47xx, 1 << gpio,
value ? 1 << gpio : 0);
}
static int gpio_polarity(unsigned gpio, int value)
{
return ssb_gpio_polarity(&ssb_bcm47xx, 1 << gpio,
value ? 1 << gpio : 0);
}
arch/mips/include/asm/mach-bcm47xx/war.h
+3 -3
View File
@@ -5,8 +5,8 @@
*
* Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
*/
#ifndef __ASM_MIPS_MACH_BCM947XX_WAR_H
#define __ASM_MIPS_MACH_BCM947XX_WAR_H
#ifndef __ASM_MIPS_MACH_BCM47XX_WAR_H
#define __ASM_MIPS_MACH_BCM47XX_WAR_H
#define R4600_V1_INDEX_ICACHEOP_WAR 0
#define R4600_V1_HIT_CACHEOP_WAR 0
@@ -22,4 +22,4 @@
#define R10000_LLSC_WAR 0
#define MIPS34K_MISSED_ITLB_WAR 0
#endif /* __ASM_MIPS_MACH_BCM947XX_WAR_H */
#endif /* __ASM_MIPS_MACH_BCM47XX_WAR_H */
arch/mips/include/asm/mach-ip22/ds1286.h
-18
View File
@@ -1,18 +0,0 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1998, 2001, 03 by Ralf Baechle
*
* RTC routines for PC style attached Dallas chip.
*/
#ifndef __ASM_MACH_IP22_DS1286_H
#define __ASM_MACH_IP22_DS1286_H
#include <asm/sgi/hpc3.h>
#define rtc_read(reg) (hpc3c0->rtcregs[(reg)] & 0xff)
#define rtc_write(data, reg) do { hpc3c0->rtcregs[(reg)] = (data); } while(0)
#endif /* __ASM_MACH_IP22_DS1286_H */
arch/mips/include/asm/mach-ip28/ds1286.h
-4
View File
@@ -1,4 +0,0 @@
#ifndef __ASM_MACH_IP28_DS1286_H
#define __ASM_MACH_IP28_DS1286_H
#include <asm/mach-ip22/ds1286.h>
#endif /* __ASM_MACH_IP28_DS1286_H */
arch/mips/include/asm/spinlock.h
+1 -1
View File
@@ -147,7 +147,7 @@ static inline void __raw_spin_unlock(raw_spinlock_t *lock)
" ori %[ticket], %[ticket], 0x2000 \n"
" xori %[ticket], %[ticket], 0x2000 \n"
" sc %[ticket], %[ticket_ptr] \n"
" beqzl %[ticket], 2f \n"
" beqzl %[ticket], 1b \n"
: [ticket_ptr] "+m" (lock->lock),
[ticket] "=&r" (tmp));
} else {
arch/mips/kernel/proc.c
+1 -1
View File
@@ -39,7 +39,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
seq_printf(m, "processor\t\t: %ld\n", n);
sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : "");
seq_printf(m, fmt, __cpu_name[smp_processor_id()],
seq_printf(m, fmt, __cpu_name[n],
(version >> 4) & 0x0f, version & 0x0f,
(fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n",
arch/mips/kernel/vmlinux.lds.S
+1 -1
View File
@@ -104,7 +104,7 @@ SECTIONS
. = ALIGN(_PAGE_SIZE);
__nosave_end = .;
. = ALIGN(32);
. = ALIGN(1 << CONFIG_MIPS_L1_CACHE_SHIFT);
.data.cacheline_aligned : {
*(.data.cacheline_aligned)
}
arch/mips/pci/fixup-emma2rh.c
-1
View File
@@ -29,7 +29,6 @@
#include <linux/pci.h>
#include <asm/bootinfo.h>
#include <asm/debug.h>
#include <asm/emma2rh/emma2rh.h>
arch/mips/pci/ops-pnx8550.c
-2
View File
@@ -29,8 +29,6 @@
#include <asm/mach-pnx8550/pci.h>
#include <asm/mach-pnx8550/glb.h>
#include <asm/debug.h>
static inline void clear_status(void)
{
arch/mips/pci/pci-emma2rh.c
-1
View File
@@ -29,7 +29,6 @@
#include <linux/pci.h>
#include <asm/bootinfo.h>
#include <asm/debug.h>
#include <asm/emma2rh/emma2rh.h>
arch/mips/pci/pci.c
+53 -27
View File
@@ -34,6 +34,8 @@ static struct pci_controller *hose_head, **hose_tail = &hose_head;
unsigned long PCIBIOS_MIN_IO = 0x0000;
unsigned long PCIBIOS_MIN_MEM = 0;
static int pci_initialized;
/*
* We need to avoid collisions with `mirrored' VGA ports
* and other strange ISA hardware, so we always want the
@@ -74,6 +76,42 @@ pcibios_align_resource(void *data, struct resource *res,
res->start = start;
}
static void __devinit pcibios_scanbus(struct pci_controller *hose)
{
static int next_busno;
static int need_domain_info;
struct pci_bus *bus;
if (!hose->iommu)
PCI_DMA_BUS_IS_PHYS = 1;
if (hose->get_busno && pci_probe_only)
next_busno = (*hose->get_busno)();
bus = pci_scan_bus(next_busno, hose->pci_ops, hose);
hose->bus = bus;
need_domain_info = need_domain_info || hose->index;
hose->need_domain_info = need_domain_info;
if (bus) {
next_busno = bus->subordinate + 1;
/* Don't allow 8-bit bus number overflow inside the hose -
reserve some space for bridges. */
if (next_busno > 224) {
next_busno = 0;
need_domain_info = 1;
}
if (!pci_probe_only) {
pci_bus_size_bridges(bus);
pci_bus_assign_resources(bus);
pci_enable_bridges(bus);
}
}
}
static DEFINE_MUTEX(pci_scan_mutex);
void __devinit register_pci_controller(struct pci_controller *hose)
{
if (request_resource(&iomem_resource, hose->mem_resource) < 0)
@@ -93,6 +131,17 @@ void __devinit register_pci_controller(struct pci_controller *hose)
printk(KERN_WARNING
"registering PCI controller with io_map_base unset\n");
}
/*
* Scan the bus if it is register after the PCI subsystem
* initialization.
*/
if (pci_initialized) {
mutex_lock(&pci_scan_mutex);
pcibios_scanbus(hose);
mutex_unlock(&pci_scan_mutex);
}
return;
out:
@@ -125,38 +174,15 @@ static u8 __init common_swizzle(struct pci_dev *dev, u8 *pinp)
static int __init pcibios_init(void)
{
struct pci_controller *hose;
struct pci_bus *bus;
int next_busno;
int need_domain_info = 0;
/* Scan all of the recorded PCI controllers. */
for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
for (hose = hose_head; hose; hose = hose->next)
pcibios_scanbus(hose);
if (!hose->iommu)
PCI_DMA_BUS_IS_PHYS = 1;
if (hose->get_busno && pci_probe_only)
next_busno = (*hose->get_busno)();
bus = pci_scan_bus(next_busno, hose->pci_ops, hose);
hose->bus = bus;
need_domain_info = need_domain_info || hose->index;
hose->need_domain_info = need_domain_info;
if (bus) {
next_busno = bus->subordinate + 1;
/* Don't allow 8-bit bus number overflow inside the hose -
reserve some space for bridges. */
if (next_busno > 224) {
next_busno = 0;
need_domain_info = 1;
}
}
}
if (!pci_probe_only)
pci_assign_unassigned_resources();
pci_fixup_irqs(common_swizzle, pcibios_map_irq);
pci_initialized = 1;
return 0;
}
arch/mips/rb532/time.c
-1
View File
@@ -28,7 +28,6 @@
#include <linux/timex.h>
#include <asm/mipsregs.h>
#include <asm/debug.h>
#include <asm/time.h>
#include <asm/mach-rc32434/rc32434.h>

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