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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson: "We didn't have any fixes sent up for -rc2, so this is a slightly larger batch. A bit all over the place platform-wise; OMAP, at91, marvell, renesas, sunxi, ux500, etc. I tried to summarize highlights but there isn't a whole lot to point out. Lots of little things fixed all over. A couple of defconfig updates due to new/changing options." * tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (44 commits) ARM: at91/sama5: fix incorrect PMC pcr div definition ARM: at91/dt: fix macb pinctrl_macb_rmii_mii_alt definition ARM: at91: at91sam9n12: move external irq declatation to DT ARM: shmobile: marzen: Use error values in usb_power_* ARM: tegra: defconfig fixes ARM: nomadik: fix IRQ assignment for SMC ethernet ARM: vt8500: Add missing NULL terminator in dt_compat clk: tegra: add ac97 controller clock clk: tegra: remove USB from clk init table ARM: dts: mvebu: Fix wrong the address reg value for the L2-cache node ARM: plat-orion: Fix num_resources and id for ge10 and ge11 ARM: OMAP2+: hwmod: Remove sysc slave idle and auto idle apis SERIAL: OMAP: Remove the slave idle handling from the driver ARM: OMAP2+: serial: Remove the un-used slave idle hooks ARM: OMAP2+: hwmod-data: UART IP needs software control to manage sidle modes ARM: OMAP2+: hwmod: Add a new flag to handle SIDLE in SWSUP only in active ARM: OMAP2+: hwmod: Fix sidle programming in _enable_sysc()/_idle_sysc() arm: mvebu: fix the 'ranges' property to handle PCIe ARM: mvebu: select ARCH_REQUIRE_GPIOLIB for mvebu platform ARM: AM33XX: Add missing .clkdm_name to clkdiv32k_ick clock ...
This commit is contained in:
Linus Torvalds
@@ -4,7 +4,7 @@ Required properties:
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- compatible: Should be "cdns,[<chip>-]{macb|gem}"
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Use "cdns,at91sam9260-macb" Atmel at91sam9260 and at91sam9263 SoCs.
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Use "cdns,at32ap7000-macb" for other 10/100 usage or use the generic form: "cdns,macb".
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Use "cnds,pc302-gem" for Picochip picoXcell pc302 and later devices based on
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Use "cdns,pc302-gem" for Picochip picoXcell pc302 and later devices based on
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the Cadence GEM, or the generic form: "cdns,gem".
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- reg: Address and length of the register set for the device
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- interrupts: Should contain macb interrupt
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@@ -177,7 +177,9 @@ dtb-$(CONFIG_ARCH_SPEAR3XX)+= spear300-evb.dtb \
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spear320-evb.dtb \
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spear320-hmi.dtb
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dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb
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dtb-$(CONFIG_ARCH_SUNXI) += sun4i-a10-cubieboard.dtb \
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dtb-$(CONFIG_ARCH_SUNXI) += \
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sun4i-a10-cubieboard.dtb \
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sun4i-a10-mini-xplus.dtb \
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sun4i-a10-hackberry.dtb \
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sun5i-a13-olinuxino.dtb
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dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \
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@@ -33,7 +33,8 @@
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#size-cells = <1>;
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compatible = "simple-bus";
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interrupt-parent = <&mpic>;
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ranges = <0 0 0xd0000000 0x100000>;
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ranges = <0 0 0xd0000000 0x0100000 /* internal registers */
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0xe0000000 0 0xe0000000 0x8100000 /* PCIe */>;
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internal-regs {
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compatible = "simple-bus";
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@@ -29,7 +29,8 @@
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};
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soc {
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ranges = <0 0xd0000000 0x100000>;
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ranges = <0 0xd0000000 0x0100000 /* internal registers */
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0xe0000000 0xe0000000 0x8100000 /* PCIe */>;
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internal-regs {
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system-controller@18200 {
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compatible = "marvell,armada-370-xp-system-controller";
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@@ -38,12 +39,12 @@
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L2: l2-cache {
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compatible = "marvell,aurora-outer-cache";
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reg = <0xd0008000 0x1000>;
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reg = <0x08000 0x1000>;
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cache-id-part = <0x100>;
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wt-override;
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};
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mpic: interrupt-controller@20000 {
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interrupt-controller@20000 {
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reg = <0x20a00 0x1d0>, <0x21870 0x58>;
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};
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@@ -39,6 +39,9 @@
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};
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soc {
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ranges = <0 0 0xd0000000 0x100000
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0xf0000000 0 0xf0000000 0x1000000>;
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internal-regs {
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serial@12000 {
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clock-frequency = <250000000>;
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@@ -27,6 +27,9 @@
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};
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soc {
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ranges = <0 0 0xd0000000 0x100000
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0xf0000000 0 0xf0000000 0x8000000>;
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internal-regs {
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serial@12000 {
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clock-frequency = <250000000>;
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@@ -31,7 +31,7 @@
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wt-override;
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};
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mpic: interrupt-controller@20000 {
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interrupt-controller@20000 {
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reg = <0x20a00 0x2d0>, <0x21070 0x58>;
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};
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@@ -264,7 +264,7 @@
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atmel,pins =
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<0 10 0x2 0x0 /* PA10 periph B */
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0 11 0x2 0x0 /* PA11 periph B */
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0 24 0x2 0x0 /* PA24 periph B */
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0 22 0x2 0x0 /* PA22 periph B */
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0 25 0x2 0x0 /* PA25 periph B */
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0 26 0x2 0x0 /* PA26 periph B */
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0 27 0x2 0x0 /* PA27 periph B */
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@@ -57,6 +57,7 @@
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compatible = "atmel,at91rm9200-aic";
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interrupt-controller;
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reg = <0xfffff000 0x200>;
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atmel,external-irqs = <31>;
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};
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ramc0: ramc@ffffe800 {
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@@ -11,7 +11,7 @@
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/include/ "at91sam9x5ek.dtsi"
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/ {
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model = "Atmel AT91SAM9G25-EK";
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model = "Atmel AT91SAM9X25-EK";
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compatible = "atmel,at91sam9x25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
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ahb {
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@@ -516,7 +516,7 @@
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usb_otg_hs: usb_otg_hs@480ab000 {
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compatible = "ti,omap3-musb";
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reg = <0x480ab000 0x1000>;
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interrupts = <0 92 0x4>, <0 93 0x4>;
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interrupts = <92>, <93>;
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interrupt-names = "mc", "dma";
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ti,hwmods = "usb_otg_hs";
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multipoint = <1>;
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@@ -75,11 +75,6 @@
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compatible = "atmel,at91sam9x5-spi";
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reg = <0xf0004000 0x100>;
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interrupts = <24 4 3>;
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cs-gpios = <&pioD 13 0
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&pioD 14 0 /* conflicts with SCK0 and CANRX0 */
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&pioD 15 0 /* conflicts with CTS0 and CANTX0 */
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&pioD 16 0 /* conflicts with RTS0 and PWMFI3 */
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>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi0>;
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status = "disabled";
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@@ -156,7 +151,7 @@
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};
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macb0: ethernet@f0028000 {
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compatible = "cnds,pc302-gem", "cdns,gem";
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compatible = "cdns,pc302-gem", "cdns,gem";
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reg = <0xf0028000 0x100>;
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interrupts = <34 4 3>;
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pinctrl-names = "default";
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@@ -203,11 +198,6 @@
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compatible = "atmel,at91sam9x5-spi";
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reg = <0xf8008000 0x100>;
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interrupts = <25 4 3>;
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cs-gpios = <&pioC 25 0
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&pioC 26 0 /* conflitcs with TWD1 and ISI_D11 */
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&pioC 27 0 /* conflitcs with TWCK1 and ISI_D10 */
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&pioC 28 0 /* conflitcs with PWMFI0 and ISI_D9 */
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>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi1>;
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status = "disabled";
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@@ -32,6 +32,10 @@
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ahb {
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apb {
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spi0: spi@f0004000 {
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cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
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};
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macb0: ethernet@f0028000 {
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phy-mode = "rgmii";
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};
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@@ -14,13 +14,19 @@
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bootargs = "root=/dev/ram0 console=ttyAMA1,115200n8 earlyprintk";
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};
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/* This is where the interrupt is routed on the S8815 board */
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external-bus@34000000 {
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ethernet@300 {
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interrupt-parent = <&gpio3>;
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interrupts = <8 0x1>;
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};
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};
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/* Custom board node with GPIO pins to active etc */
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usb-s8815 {
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/* The S8815 is using this very GPIO pin for the SMSC91x IRQs */
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ethernet-gpio {
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gpios = <&gpio3 19 0x1>;
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interrupts = <19 0x1>;
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interrupt-parent = <&gpio3>;
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gpios = <&gpio3 8 0x1>;
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};
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/* This will bias the MMC/SD card detect line */
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mmcsd-gpio {
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@@ -22,8 +22,8 @@
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bootargs = "earlyprintk console=ttyS0,115200";
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};
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soc {
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uart0: uart@01c28000 {
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soc@01c20000 {
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uart0: serial@01c28000 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins_a>;
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status = "okay";
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@@ -20,6 +20,7 @@ CONFIG_MODULE_FORCE_UNLOAD=y
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CONFIG_MODVERSIONS=y
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CONFIG_MODULE_SRCVERSION_ALL=y
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# CONFIG_BLK_DEV_BSG is not set
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CONFIG_ARCH_MULTI_V6=y
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CONFIG_ARCH_OMAP2PLUS=y
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CONFIG_OMAP_RESET_CLOCKS=y
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CONFIG_OMAP_MUX_DEBUG=y
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@@ -153,6 +153,7 @@ CONFIG_MEDIA_CAMERA_SUPPORT=y
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CONFIG_MEDIA_USB_SUPPORT=y
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CONFIG_USB_VIDEO_CLASS=m
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CONFIG_DRM=y
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CONFIG_TEGRA_HOST1X=y
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CONFIG_DRM_TEGRA=y
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CONFIG_BACKLIGHT_LCD_SUPPORT=y
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# CONFIG_LCD_CLASS_DEVICE is not set
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@@ -202,7 +203,7 @@ CONFIG_TEGRA20_APB_DMA=y
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CONFIG_STAGING=y
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CONFIG_SENSORS_ISL29018=y
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CONFIG_SENSORS_ISL29028=y
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CONFIG_SENSORS_AK8975=y
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CONFIG_AK8975=y
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CONFIG_MFD_NVEC=y
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CONFIG_KEYBOARD_NVEC=y
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CONFIG_SERIO_NVEC_PS2=y
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@@ -24,9 +24,9 @@
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#define U8500_UART0_PHYS_BASE (0x80120000)
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#define U8500_UART1_PHYS_BASE (0x80121000)
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#define U8500_UART2_PHYS_BASE (0x80007000)
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#define U8500_UART0_VIRT_BASE (0xa8120000)
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#define U8500_UART1_VIRT_BASE (0xa8121000)
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#define U8500_UART2_VIRT_BASE (0xa8007000)
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#define U8500_UART0_VIRT_BASE (0xf8120000)
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#define U8500_UART1_VIRT_BASE (0xf8121000)
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#define U8500_UART2_VIRT_BASE (0xf8007000)
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#define __UX500_PHYS_UART(n) U8500_UART##n##_PHYS_BASE
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#define __UX500_VIRT_UART(n) U8500_UART##n##_VIRT_BASE
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#endif
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@@ -174,6 +174,7 @@ clkevt32k_next_event(unsigned long delta, struct clock_event_device *dev)
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static struct clock_event_device clkevt = {
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.name = "at91_tick",
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.shift = 32,
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.rating = 150,
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.set_next_event = clkevt32k_next_event,
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.set_mode = clkevt32k_mode,
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@@ -264,9 +265,11 @@ void __init at91rm9200_timer_init(void)
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at91_st_write(AT91_ST_RTMR, 1);
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/* Setup timer clockevent, with minimum of two ticks (important!!) */
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clkevt.mult = div_sc(AT91_SLOW_CLOCK, NSEC_PER_SEC, clkevt.shift);
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clkevt.max_delta_ns = clockevent_delta2ns(AT91_ST_ALMV, &clkevt);
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clkevt.min_delta_ns = clockevent_delta2ns(2, &clkevt) + 1;
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clkevt.cpumask = cpumask_of(0);
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clockevents_config_and_register(&clkevt, AT91_SLOW_CLOCK,
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2, AT91_ST_ALMV);
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clockevents_register_device(&clkevt);
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/* register clocksource */
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clocksource_register_hz(&clk32k, AT91_SLOW_CLOCK);
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@@ -223,13 +223,7 @@ static void __init at91sam9n12_map_io(void)
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at91_init_sram(0, AT91SAM9N12_SRAM_BASE, AT91SAM9N12_SRAM_SIZE);
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}
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void __init at91sam9n12_initialize(void)
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{
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at91_extern_irq = (1 << AT91SAM9N12_ID_IRQ0);
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}
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AT91_SOC_START(at91sam9n12)
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.map_io = at91sam9n12_map_io,
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.register_clocks = at91sam9n12_register_clocks,
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.init = at91sam9n12_initialize,
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AT91_SOC_END
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