mirror of
https://gitlab.winehq.org/wine/wine-staging.git
synced 2024-11-21 16:46:54 -08:00
288 lines
8.6 KiB
Diff
288 lines
8.6 KiB
Diff
From 472184e5801de5d1fb92d275d9c0c7e840c9a0bf Mon Sep 17 00:00:00 2001
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From: Sebastian Lackner <sebastian@fds-team.de>
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Date: Tue, 11 Nov 2014 03:11:33 +0100
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Subject: ntdll: Implement emulation of SIDT instruction when using Exagear.
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---
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configure.ac | 8 ++
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dlls/ntdll/signal_i386.c | 223 +++++++++++++++++++++++++++++++++++++++++++++++
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2 files changed, 231 insertions(+)
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diff --git a/configure.ac b/configure.ac
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index 1e6bba3..43bf0db 100644
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--- a/configure.ac
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+++ b/configure.ac
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@@ -32,6 +32,7 @@ AC_ARG_ENABLE(win16, AS_HELP_STRING([--disable-win16],[do not include Win16 supp
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AC_ARG_ENABLE(win64, AS_HELP_STRING([--enable-win64],[build a Win64 emulator on AMD64 (won't run Win32 binaries)]))
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AC_ARG_ENABLE(tests, AS_HELP_STRING([--disable-tests],[do not build the regression tests]))
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AC_ARG_ENABLE(maintainer-mode, AS_HELP_STRING([--enable-maintainer-mode],[enable maintainer-specific build rules]))
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+AC_ARG_ENABLE(exagear-compat, AS_HELP_STRING([--enable-exagear-compat],[use workarounds for known problems in the Exagear emulator]))
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AC_ARG_WITH(alsa, AS_HELP_STRING([--without-alsa],[do not use the Alsa sound support]),
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[if test "x$withval" = "xno"; then ac_cv_header_sys_asoundlib_h=no; ac_cv_header_alsa_asoundlib_h=no; fi])
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@@ -364,6 +365,13 @@ WINE_WARNING_WITH(gettext,[test "$MSGFMT" = false],
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[gettext tools not found (or too old), translations won't be built.],
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[enable_po])
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+dnl **** Enable Exagear workarounds ****
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+
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+if test "x$enable_exagear_compat" = "xyes"
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+then
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+ AC_DEFINE(EXAGEAR_COMPAT, 1, [Define if you want to enable Exagear emulator workarounds])
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+fi
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+
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dnl **** Check for some libraries ****
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dnl Check for -li386 for NetBSD and OpenBSD
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diff --git a/dlls/ntdll/signal_i386.c b/dlls/ntdll/signal_i386.c
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index ee8855a..4269329 100644
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--- a/dlls/ntdll/signal_i386.c
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+++ b/dlls/ntdll/signal_i386.c
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@@ -96,6 +96,14 @@ typedef struct
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BYTE Reserved4[96];
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} XMM_SAVE_AREA32;
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+#include "pshpack1.h"
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+struct idtr
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+{
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+ WORD limit;
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+ BYTE *base;
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+};
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+#include "poppack.h"
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+
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/***********************************************************************
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* signal context platform-specific definitions
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*/
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@@ -1898,6 +1906,213 @@ static inline DWORD get_fpu_code( const CONTEXT *context )
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}
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+#ifdef EXAGEAR_COMPAT
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+
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+/***********************************************************************
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+ * INSTR_GetOperandAddr
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+ *
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+ * Return the address of an instruction operand (from the mod/rm byte).
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+ */
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+static BYTE *INSTR_GetOperandAddr( CONTEXT *context, const BYTE *instr,
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+ int long_addr, int segprefix, int *len )
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+{
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+ int mod, rm, base = 0, index = 0, ss = 0, off;
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+
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+#define GET_VAL(val,type) \
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+ { *val = *(type *)instr; instr += sizeof(type); *len += sizeof(type); }
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+
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+ *len = 0;
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+ GET_VAL( &mod, BYTE );
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+ rm = mod & 7;
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+ mod >>= 6;
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+
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+ if (mod == 3)
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+ {
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+ switch(rm)
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+ {
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+ case 0: return (BYTE *)&context->Eax;
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+ case 1: return (BYTE *)&context->Ecx;
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+ case 2: return (BYTE *)&context->Edx;
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+ case 3: return (BYTE *)&context->Ebx;
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+ case 4: return (BYTE *)&context->Esp;
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+ case 5: return (BYTE *)&context->Ebp;
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+ case 6: return (BYTE *)&context->Esi;
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+ case 7: return (BYTE *)&context->Edi;
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+ }
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+ }
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+
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+ if (long_addr)
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+ {
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+ if (rm == 4)
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+ {
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+ BYTE sib;
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+ GET_VAL( &sib, BYTE );
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+ rm = sib & 7;
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+ ss = sib >> 6;
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+ switch((sib >> 3) & 7)
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+ {
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+ case 0: index = context->Eax; break;
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+ case 1: index = context->Ecx; break;
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+ case 2: index = context->Edx; break;
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+ case 3: index = context->Ebx; break;
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+ case 4: index = 0; break;
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+ case 5: index = context->Ebp; break;
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+ case 6: index = context->Esi; break;
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+ case 7: index = context->Edi; break;
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+ }
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+ }
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+
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+ switch(rm)
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+ {
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+ case 0: base = context->Eax; break;
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+ case 1: base = context->Ecx; break;
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+ case 2: base = context->Edx; break;
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+ case 3: base = context->Ebx; break;
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+ case 4: base = context->Esp; break;
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+ case 5: base = context->Ebp; break;
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+ case 6: base = context->Esi; break;
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+ case 7: base = context->Edi; break;
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+ }
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+ switch (mod)
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+ {
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+ case 0:
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+ if (rm == 5) /* special case: ds:(disp32) */
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+ {
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+ GET_VAL( &base, DWORD );
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+ }
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+ break;
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+
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+ case 1: /* 8-bit disp */
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+ GET_VAL( &off, BYTE );
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+ base += (signed char)off;
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+ break;
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+
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+ case 2: /* 32-bit disp */
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+ GET_VAL( &off, DWORD );
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+ base += (signed long)off;
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+ break;
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+ }
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+ }
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+ else /* short address */
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+ {
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+ switch(rm)
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+ {
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+ case 0: /* ds:(bx,si) */
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+ base = LOWORD(context->Ebx) + LOWORD(context->Esi);
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+ break;
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+ case 1: /* ds:(bx,di) */
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+ base = LOWORD(context->Ebx) + LOWORD(context->Edi);
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+ break;
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+ case 2: /* ss:(bp,si) */
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+ base = LOWORD(context->Ebp) + LOWORD(context->Esi);
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+ break;
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+ case 3: /* ss:(bp,di) */
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+ base = LOWORD(context->Ebp) + LOWORD(context->Edi);
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+ break;
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+ case 4: /* ds:(si) */
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+ base = LOWORD(context->Esi);
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+ break;
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+ case 5: /* ds:(di) */
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+ base = LOWORD(context->Edi);
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+ break;
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+ case 6: /* ss:(bp) */
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+ base = LOWORD(context->Ebp);
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+ break;
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+ case 7: /* ds:(bx) */
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+ base = LOWORD(context->Ebx);
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+ break;
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+ }
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+
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+ switch(mod)
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+ {
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+ case 0:
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+ if (rm == 6) /* special case: ds:(disp16) */
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+ {
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+ GET_VAL( &base, WORD );
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+ }
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+ break;
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+
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+ case 1: /* 8-bit disp */
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+ GET_VAL( &off, BYTE );
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+ base += (signed char)off;
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+ break;
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+
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+ case 2: /* 16-bit disp */
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+ GET_VAL( &off, WORD );
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+ base += (signed short)off;
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+ break;
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+ }
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+ base &= 0xffff;
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+ }
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+ /* FIXME: we assume that all segments have a base of 0 */
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+ return (BYTE *)(base + (index << ss));
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+#undef GET_VAL
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+}
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+
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+
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+/***********************************************************************
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+ * check_invalid_instr
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+ *
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+ * Support for instructions not implemented by Exagear.
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+ */
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+static inline BOOL check_invalid_instr( CONTEXT *context )
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+{
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+ const BYTE *instr;
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+ unsigned int prefix_count = 0;
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+ int len, long_addr = 1;
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+
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+ if (!wine_ldt_is_system( context->SegCs )) return FALSE;
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+ instr = (BYTE *)context->Eip;
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+
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+ for (;;) switch (*instr)
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+ {
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+ /* instruction prefixes */
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+ case 0x2e: /* %cs: */
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+ case 0x36: /* %ss: */
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+ case 0x3e: /* %ds: */
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+ case 0x26: /* %es: */
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+ case 0x64: /* %fs: */
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+ case 0x65: /* %gs: */
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+ case 0x66: /* opcode size */
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+ case 0x67: /* addr size */
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+ case 0xf0: /* lock */
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+ case 0xf2: /* repne */
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+ case 0xf3: /* repe */
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+ if (++prefix_count >= 15) return FALSE;
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+ if (*instr == 0x67) long_addr = !long_addr; /* addr size */
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+ instr++;
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+ continue;
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+ case 0x0f: /* extended instruction */
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+ switch (instr[1])
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+ {
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+ case 0x01:
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+ if (((instr[2] >> 3) & 7) == 1) /* sidt m */
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+ {
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+ struct idtr ret;
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+ BYTE *addr;
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+
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+ if ((instr[2] >> 6) == 3) return FALSE; /* loading to register not allowed */
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+ addr = INSTR_GetOperandAddr( context, instr + 2, long_addr, 0, &len );
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+
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+ /* fake IDT structure */
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+ ret.limit = 0xfff;
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+ ret.base = (void *)0xff000000;
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+ memcpy(addr, &ret, sizeof(ret));
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+
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+ context->Eip += prefix_count + len + 2;
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+ return TRUE;
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+ }
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+ break;
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+ }
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+ return FALSE;
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+ default:
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+ return FALSE;
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+ }
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+}
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+
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+#endif /* EXAGEAR_COMPAT */
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+
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+
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/**********************************************************************
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* raise_segv_exception
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*/
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@@ -1907,6 +2122,14 @@ static void WINAPI raise_segv_exception( EXCEPTION_RECORD *rec, CONTEXT *context
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switch(rec->ExceptionCode)
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{
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+#ifdef EXAGEAR_COMPAT
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+ case EXCEPTION_ILLEGAL_INSTRUCTION:
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+ {
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+ if (check_invalid_instr( context ))
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+ goto done;
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+ }
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+ break;
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+#endif
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case EXCEPTION_ACCESS_VIOLATION:
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if (rec->NumberParameters == 2)
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{
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--
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2.7.1
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