mirror of
https://gitlab.winehq.org/wine/wine-staging.git
synced 2024-11-21 16:46:54 -08:00
1704 lines
79 KiB
Diff
1704 lines
79 KiB
Diff
From a6fb00e6a6133df2427dc60553ac3152b7623217 Mon Sep 17 00:00:00 2001
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From: Alistair Leslie-Hughes <leslie_alistair@hotmail.com>
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Date: Fri, 31 May 2024 07:37:41 +1000
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Subject: [PATCH] Updated vkd3d to 1fe7a6581b305af724e70868472d5880ec52f9d2.
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---
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libs/vkd3d/libs/vkd3d-shader/d3d_asm.c | 12 +-
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libs/vkd3d/libs/vkd3d-shader/d3dbc.c | 14 +-
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libs/vkd3d/libs/vkd3d-shader/dxil.c | 45 +++---
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libs/vkd3d/libs/vkd3d-shader/fx.c | 3 +
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libs/vkd3d/libs/vkd3d-shader/glsl.c | 6 +-
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libs/vkd3d/libs/vkd3d-shader/hlsl.l | 3 +-
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libs/vkd3d/libs/vkd3d-shader/hlsl.y | 21 +++
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libs/vkd3d/libs/vkd3d-shader/ir.c | 144 ++++++++---------
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libs/vkd3d/libs/vkd3d-shader/preproc.l | 1 +
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libs/vkd3d/libs/vkd3d-shader/spirv.c | 146 +++++++++---------
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libs/vkd3d/libs/vkd3d-shader/tpf.c | 28 ++--
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.../libs/vkd3d-shader/vkd3d_shader_main.c | 28 ++--
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.../libs/vkd3d-shader/vkd3d_shader_private.h | 6 +-
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13 files changed, 242 insertions(+), 215 deletions(-)
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diff --git a/libs/vkd3d/libs/vkd3d-shader/d3d_asm.c b/libs/vkd3d/libs/vkd3d-shader/d3d_asm.c
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index 9abc2c4db70..4747b2bb571 100644
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--- a/libs/vkd3d/libs/vkd3d-shader/d3d_asm.c
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+++ b/libs/vkd3d/libs/vkd3d-shader/d3d_asm.c
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@@ -1199,7 +1199,7 @@ static void shader_print_register(struct vkd3d_d3d_asm_compiler *compiler, const
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{
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bool untyped = false;
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- switch (compiler->current->handler_idx)
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+ switch (compiler->current->opcode)
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{
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case VKD3DSIH_MOV:
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case VKD3DSIH_MOVC:
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@@ -1755,7 +1755,7 @@ static void shader_dump_instruction_flags(struct vkd3d_d3d_asm_compiler *compile
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{
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struct vkd3d_string_buffer *buffer = &compiler->buffer;
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- switch (ins->handler_idx)
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+ switch (ins->opcode)
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{
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case VKD3DSIH_BREAKP:
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case VKD3DSIH_CONTINUEP:
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@@ -1937,9 +1937,9 @@ static void shader_dump_instruction(struct vkd3d_d3d_asm_compiler *compiler,
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if (ins->coissue)
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vkd3d_string_buffer_printf(buffer, "+");
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- shader_print_opcode(compiler, ins->handler_idx);
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+ shader_print_opcode(compiler, ins->opcode);
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- switch (ins->handler_idx)
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+ switch (ins->opcode)
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{
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case VKD3DSIH_DCL:
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case VKD3DSIH_DCL_UAV_TYPED:
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@@ -2430,7 +2430,7 @@ enum vkd3d_result d3d_asm_compile(const struct vsir_program *program,
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{
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struct vkd3d_shader_instruction *ins = &program->instructions.elements[i];
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- switch (ins->handler_idx)
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+ switch (ins->opcode)
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{
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case VKD3DSIH_ELSE:
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case VKD3DSIH_ENDIF:
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@@ -2459,7 +2459,7 @@ enum vkd3d_result d3d_asm_compile(const struct vsir_program *program,
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shader_dump_instruction(&compiler, ins);
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- switch (ins->handler_idx)
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+ switch (ins->opcode)
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{
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case VKD3DSIH_ELSE:
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case VKD3DSIH_IF:
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diff --git a/libs/vkd3d/libs/vkd3d-shader/d3dbc.c b/libs/vkd3d/libs/vkd3d-shader/d3dbc.c
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index bfd5b52b436..8e26fd8e486 100644
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--- a/libs/vkd3d/libs/vkd3d-shader/d3dbc.c
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+++ b/libs/vkd3d/libs/vkd3d-shader/d3dbc.c
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@@ -1060,7 +1060,7 @@ static void shader_sm1_read_comment(struct vkd3d_shader_sm1_parser *sm1)
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static void shader_sm1_validate_instruction(struct vkd3d_shader_sm1_parser *sm1, struct vkd3d_shader_instruction *ins)
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{
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- if ((ins->handler_idx == VKD3DSIH_BREAKP || ins->handler_idx == VKD3DSIH_IF) && ins->flags)
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+ if ((ins->opcode == VKD3DSIH_BREAKP || ins->opcode == VKD3DSIH_IF) && ins->flags)
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{
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vkd3d_shader_parser_warning(&sm1->p, VKD3D_SHADER_WARNING_D3DBC_IGNORED_INSTRUCTION_FLAGS,
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"Ignoring unexpected instruction flags %#x.", ins->flags);
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@@ -1142,23 +1142,23 @@ static void shader_sm1_read_instruction(struct vkd3d_shader_sm1_parser *sm1, str
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goto fail;
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}
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- if (ins->handler_idx == VKD3DSIH_DCL)
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+ if (ins->opcode == VKD3DSIH_DCL)
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{
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shader_sm1_read_semantic(sm1, &p, &ins->declaration.semantic);
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}
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- else if (ins->handler_idx == VKD3DSIH_DEF)
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+ else if (ins->opcode == VKD3DSIH_DEF)
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{
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shader_sm1_read_dst_param(sm1, &p, dst_param);
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shader_sm1_read_immconst(sm1, &p, &src_params[0], VSIR_DIMENSION_VEC4, VKD3D_DATA_FLOAT);
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shader_sm1_scan_register(sm1, &dst_param->reg, dst_param->write_mask, true);
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}
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- else if (ins->handler_idx == VKD3DSIH_DEFB)
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+ else if (ins->opcode == VKD3DSIH_DEFB)
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{
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shader_sm1_read_dst_param(sm1, &p, dst_param);
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shader_sm1_read_immconst(sm1, &p, &src_params[0], VSIR_DIMENSION_SCALAR, VKD3D_DATA_UINT);
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shader_sm1_scan_register(sm1, &dst_param->reg, dst_param->write_mask, true);
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}
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- else if (ins->handler_idx == VKD3DSIH_DEFI)
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+ else if (ins->opcode == VKD3DSIH_DEFI)
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{
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shader_sm1_read_dst_param(sm1, &p, dst_param);
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shader_sm1_read_immconst(sm1, &p, &src_params[0], VSIR_DIMENSION_VEC4, VKD3D_DATA_INT);
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@@ -1195,7 +1195,7 @@ static void shader_sm1_read_instruction(struct vkd3d_shader_sm1_parser *sm1, str
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return;
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fail:
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- ins->handler_idx = VKD3DSIH_INVALID;
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+ ins->opcode = VKD3DSIH_INVALID;
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*ptr = sm1->end;
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}
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@@ -1326,7 +1326,7 @@ int d3dbc_parse(const struct vkd3d_shader_compile_info *compile_info, uint64_t c
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ins = &instructions->elements[instructions->count];
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shader_sm1_read_instruction(&sm1, ins);
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- if (ins->handler_idx == VKD3DSIH_INVALID)
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+ if (ins->opcode == VKD3DSIH_INVALID)
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{
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WARN("Encountered unrecognized or invalid instruction.\n");
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vsir_program_cleanup(program);
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diff --git a/libs/vkd3d/libs/vkd3d-shader/dxil.c b/libs/vkd3d/libs/vkd3d-shader/dxil.c
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index 73a8d8687c5..c08654aeac5 100644
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--- a/libs/vkd3d/libs/vkd3d-shader/dxil.c
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+++ b/libs/vkd3d/libs/vkd3d-shader/dxil.c
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@@ -3755,21 +3755,21 @@ static enum vkd3d_result sm6_parser_globals_init(struct sm6_parser *sm6)
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for (i = 0; i < sm6->p.program->instructions.count; ++i)
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{
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ins = &sm6->p.program->instructions.elements[i];
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- if (ins->handler_idx == VKD3DSIH_DCL_INDEXABLE_TEMP && ins->declaration.indexable_temp.initialiser)
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+ if (ins->opcode == VKD3DSIH_DCL_INDEXABLE_TEMP && ins->declaration.indexable_temp.initialiser)
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{
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ins->declaration.indexable_temp.initialiser = resolve_forward_initialiser(
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(uintptr_t)ins->declaration.indexable_temp.initialiser, sm6);
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}
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- else if (ins->handler_idx == VKD3DSIH_DCL_IMMEDIATE_CONSTANT_BUFFER)
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+ else if (ins->opcode == VKD3DSIH_DCL_IMMEDIATE_CONSTANT_BUFFER)
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{
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ins->declaration.icb = resolve_forward_initialiser((uintptr_t)ins->declaration.icb, sm6);
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}
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- else if (ins->handler_idx == VKD3DSIH_DCL_TGSM_RAW)
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+ else if (ins->opcode == VKD3DSIH_DCL_TGSM_RAW)
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{
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ins->declaration.tgsm_raw.zero_init = resolve_forward_zero_initialiser(ins->flags, sm6);
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ins->flags = 0;
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}
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- else if (ins->handler_idx == VKD3DSIH_DCL_TGSM_STRUCTURED)
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+ else if (ins->opcode == VKD3DSIH_DCL_TGSM_STRUCTURED)
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{
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ins->declaration.tgsm_structured.zero_init = resolve_forward_zero_initialiser(ins->flags, sm6);
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ins->flags = 0;
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@@ -4402,7 +4402,7 @@ static void sm6_parser_emit_br(struct sm6_parser *sm6, const struct dxil_record
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code_block->terminator.false_block = sm6_function_get_block(function, record->operands[1], sm6);
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}
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- ins->handler_idx = VKD3DSIH_NOP;
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+ ins->opcode = VKD3DSIH_NOP;
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}
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static bool sm6_parser_emit_reg_composite_construct(struct sm6_parser *sm6, const struct vkd3d_shader_register **operand_regs,
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@@ -4962,7 +4962,7 @@ static void sm6_parser_emit_dx_create_handle(struct sm6_parser *sm6, enum dx_int
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reg->non_uniform = !!sm6_value_get_constant_uint(operands[3]);
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/* NOP is used to flag no instruction emitted. */
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- ins->handler_idx = VKD3DSIH_NOP;
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+ ins->opcode = VKD3DSIH_NOP;
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}
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static void sm6_parser_emit_dx_stream(struct sm6_parser *sm6, enum dx_intrinsic_opcode op,
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@@ -6381,7 +6381,7 @@ static void sm6_parser_emit_unhandled(struct sm6_parser *sm6, struct vkd3d_shade
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{
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const struct sm6_type *type;
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- ins->handler_idx = VKD3DSIH_NOP;
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+ ins->opcode = VKD3DSIH_NOP;
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if (!dst->type)
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return;
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@@ -6628,7 +6628,7 @@ static void sm6_parser_emit_cast(struct sm6_parser *sm6, const struct dxil_recor
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{
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*dst = *value;
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dst->type = type;
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- ins->handler_idx = VKD3DSIH_NOP;
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+ ins->opcode = VKD3DSIH_NOP;
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return;
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}
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@@ -6739,7 +6739,7 @@ static void sm6_parser_emit_cmp2(struct sm6_parser *sm6, const struct dxil_recor
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* do not otherwise occur, so deleting these avoids the need for backend support. */
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if (sm6_type_is_bool(type_a) && code == ICMP_NE && sm6_value_is_constant_zero(b))
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{
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- ins->handler_idx = VKD3DSIH_NOP;
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+ ins->opcode = VKD3DSIH_NOP;
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*dst = *a;
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return;
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}
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@@ -7039,7 +7039,7 @@ static void sm6_parser_emit_gep(struct sm6_parser *sm6, const struct dxil_record
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reg->idx_count = 2;
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dst->structure_stride = src->structure_stride;
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- ins->handler_idx = VKD3DSIH_NOP;
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+ ins->opcode = VKD3DSIH_NOP;
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}
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static void sm6_parser_emit_load(struct sm6_parser *sm6, const struct dxil_record *record,
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@@ -7189,7 +7189,7 @@ static void sm6_parser_emit_phi(struct sm6_parser *sm6, const struct dxil_record
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incoming[j].block = sm6_function_get_block(function, record->operands[i + 1], sm6);
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}
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- ins->handler_idx = VKD3DSIH_NOP;
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+ ins->opcode = VKD3DSIH_NOP;
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qsort(incoming, phi->incoming_count, sizeof(*incoming), phi_incoming_compare);
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@@ -7224,7 +7224,7 @@ static void sm6_parser_emit_ret(struct sm6_parser *sm6, const struct dxil_record
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code_block->terminator.type = TERMINATOR_RET;
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- ins->handler_idx = VKD3DSIH_NOP;
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+ ins->opcode = VKD3DSIH_NOP;
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}
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static void sm6_parser_emit_store(struct sm6_parser *sm6, const struct dxil_record *record,
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@@ -7384,7 +7384,7 @@ static void sm6_parser_emit_switch(struct sm6_parser *sm6, const struct dxil_rec
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terminator->cases[i / 2u].value = sm6_value_get_constant_uint64(src);
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}
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- ins->handler_idx = VKD3DSIH_NOP;
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+ ins->opcode = VKD3DSIH_NOP;
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}
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static void sm6_parser_emit_vselect(struct sm6_parser *sm6, const struct dxil_record *record,
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@@ -7843,7 +7843,7 @@ static enum vkd3d_result sm6_parser_function_init(struct sm6_parser *sm6, const
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}
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ins = &code_block->instructions[code_block->instruction_count];
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- ins->handler_idx = VKD3DSIH_INVALID;
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+ ins->opcode = VKD3DSIH_INVALID;
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dst = sm6_parser_get_current_value(sm6);
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fwd_type = dst->type;
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@@ -7922,7 +7922,6 @@ static enum vkd3d_result sm6_parser_function_init(struct sm6_parser *sm6, const
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if (sm6->p.failed)
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return VKD3D_ERROR;
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- assert(ins->handler_idx != VKD3DSIH_INVALID);
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if (record->attachment)
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metadata_attachment_record_apply(record->attachment, record->code, ins, dst, sm6);
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@@ -7933,9 +7932,7 @@ static enum vkd3d_result sm6_parser_function_init(struct sm6_parser *sm6, const
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code_block = (block_idx < function->block_count) ? function->blocks[block_idx] : NULL;
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}
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if (code_block)
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- code_block->instruction_count += ins->handler_idx != VKD3DSIH_NOP;
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- else
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- assert(ins->handler_idx == VKD3DSIH_NOP);
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+ code_block->instruction_count += ins->opcode != VKD3DSIH_NOP;
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if (dst->type && fwd_type && dst->type != fwd_type)
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{
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@@ -8735,7 +8732,7 @@ static struct vkd3d_shader_resource *sm6_parser_resources_load_common_info(struc
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if (!m)
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{
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- ins->handler_idx = is_uav ? VKD3DSIH_DCL_UAV_RAW : VKD3DSIH_DCL_RESOURCE_RAW;
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+ ins->opcode = is_uav ? VKD3DSIH_DCL_UAV_RAW : VKD3DSIH_DCL_RESOURCE_RAW;
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ins->declaration.raw_resource.resource.reg.write_mask = 0;
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return &ins->declaration.raw_resource.resource;
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}
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@@ -8760,7 +8757,7 @@ static struct vkd3d_shader_resource *sm6_parser_resources_load_common_info(struc
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"A typed resource has no data type.");
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}
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- ins->handler_idx = is_uav ? VKD3DSIH_DCL_UAV_TYPED : VKD3DSIH_DCL;
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+ ins->opcode = is_uav ? VKD3DSIH_DCL_UAV_TYPED : VKD3DSIH_DCL;
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for (i = 0; i < VKD3D_VEC4_SIZE; ++i)
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ins->declaration.semantic.resource_data_type[i] = resource_values.data_type;
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ins->declaration.semantic.resource_type = resource_type;
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@@ -8770,14 +8767,14 @@ static struct vkd3d_shader_resource *sm6_parser_resources_load_common_info(struc
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}
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else if (kind == RESOURCE_KIND_RAWBUFFER)
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{
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- ins->handler_idx = is_uav ? VKD3DSIH_DCL_UAV_RAW : VKD3DSIH_DCL_RESOURCE_RAW;
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+ ins->opcode = is_uav ? VKD3DSIH_DCL_UAV_RAW : VKD3DSIH_DCL_RESOURCE_RAW;
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ins->declaration.raw_resource.resource.reg.write_mask = 0;
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return &ins->declaration.raw_resource.resource;
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}
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else if (kind == RESOURCE_KIND_STRUCTUREDBUFFER)
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{
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- ins->handler_idx = is_uav ? VKD3DSIH_DCL_UAV_STRUCTURED : VKD3DSIH_DCL_RESOURCE_STRUCTURED;
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+ ins->opcode = is_uav ? VKD3DSIH_DCL_UAV_STRUCTURED : VKD3DSIH_DCL_RESOURCE_STRUCTURED;
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ins->declaration.structured_resource.byte_stride = resource_values.byte_stride;
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ins->declaration.structured_resource.resource.reg.write_mask = 0;
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@@ -8858,7 +8855,7 @@ static enum vkd3d_result sm6_parser_resources_load_srv(struct sm6_parser *sm6,
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d->kind = kind;
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d->reg_type = VKD3DSPR_RESOURCE;
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d->reg_data_type = (ins->resource_type == VKD3D_SHADER_RESOURCE_BUFFER) ? VKD3D_DATA_UINT : VKD3D_DATA_RESOURCE;
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- d->resource_data_type = (ins->handler_idx == VKD3DSIH_DCL)
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+ d->resource_data_type = (ins->opcode == VKD3DSIH_DCL)
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? ins->declaration.semantic.resource_data_type[0] : VKD3D_DATA_UNUSED;
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init_resource_declaration(resource, VKD3DSPR_RESOURCE, d->reg_data_type, d->id, &d->range);
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@@ -8932,7 +8929,7 @@ static enum vkd3d_result sm6_parser_resources_load_uav(struct sm6_parser *sm6,
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d->kind = values[0];
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d->reg_type = VKD3DSPR_UAV;
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d->reg_data_type = (ins->resource_type == VKD3D_SHADER_RESOURCE_BUFFER) ? VKD3D_DATA_UINT : VKD3D_DATA_UAV;
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- d->resource_data_type = (ins->handler_idx == VKD3DSIH_DCL_UAV_TYPED)
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+ d->resource_data_type = (ins->opcode == VKD3DSIH_DCL_UAV_TYPED)
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? ins->declaration.semantic.resource_data_type[0] : VKD3D_DATA_UNUSED;
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init_resource_declaration(resource, VKD3DSPR_UAV, d->reg_data_type, d->id, &d->range);
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diff --git a/libs/vkd3d/libs/vkd3d-shader/fx.c b/libs/vkd3d/libs/vkd3d-shader/fx.c
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index 57b4ac24212..d8653dbf266 100644
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--- a/libs/vkd3d/libs/vkd3d-shader/fx.c
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+++ b/libs/vkd3d/libs/vkd3d-shader/fx.c
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@@ -1464,6 +1464,9 @@ static void write_buffers(struct fx_write_context *fx, bool shared)
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{
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struct hlsl_buffer *buffer;
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+ if (shared && !fx->child_effect)
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+ return;
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+
|
|
LIST_FOR_EACH_ENTRY(buffer, &fx->ctx->buffers, struct hlsl_buffer, entry)
|
|
{
|
|
if (!buffer->size && !fx->include_empty_buffers)
|
|
diff --git a/libs/vkd3d/libs/vkd3d-shader/glsl.c b/libs/vkd3d/libs/vkd3d-shader/glsl.c
|
|
index 3e482a5fc70..8725724a239 100644
|
|
--- a/libs/vkd3d/libs/vkd3d-shader/glsl.c
|
|
+++ b/libs/vkd3d/libs/vkd3d-shader/glsl.c
|
|
@@ -48,9 +48,9 @@ static void shader_glsl_print_indent(struct vkd3d_string_buffer *buffer, unsigne
|
|
static void shader_glsl_unhandled(struct vkd3d_glsl_generator *gen, const struct vkd3d_shader_instruction *ins)
|
|
{
|
|
shader_glsl_print_indent(&gen->buffer, gen->indent);
|
|
- vkd3d_string_buffer_printf(&gen->buffer, "/* <unhandled instruction %#x> */\n", ins->handler_idx);
|
|
+ vkd3d_string_buffer_printf(&gen->buffer, "/* <unhandled instruction %#x> */\n", ins->opcode);
|
|
vkd3d_glsl_compiler_error(gen, VKD3D_SHADER_ERROR_GLSL_INTERNAL,
|
|
- "Internal compiler error: Unhandled instruction %#x.", ins->handler_idx);
|
|
+ "Internal compiler error: Unhandled instruction %#x.", ins->opcode);
|
|
}
|
|
|
|
static void shader_glsl_ret(struct vkd3d_glsl_generator *generator,
|
|
@@ -74,7 +74,7 @@ static void vkd3d_glsl_handle_instruction(struct vkd3d_glsl_generator *generator
|
|
{
|
|
generator->location = instruction->location;
|
|
|
|
- switch (instruction->handler_idx)
|
|
+ switch (instruction->opcode)
|
|
{
|
|
case VKD3DSIH_DCL_INPUT:
|
|
case VKD3DSIH_DCL_OUTPUT:
|
|
diff --git a/libs/vkd3d/libs/vkd3d-shader/hlsl.l b/libs/vkd3d/libs/vkd3d-shader/hlsl.l
|
|
index a5923d8bf8e..91418775e1b 100644
|
|
--- a/libs/vkd3d/libs/vkd3d-shader/hlsl.l
|
|
+++ b/libs/vkd3d/libs/vkd3d-shader/hlsl.l
|
|
@@ -49,7 +49,7 @@ static void update_location(struct hlsl_ctx *ctx, YYLTYPE *loc);
|
|
RESERVED1 auto|catch|char|class|const_cast|delete|dynamic_cast|enum
|
|
RESERVED2 explicit|friend|goto|long|mutable|new|operator|private|protected|public
|
|
RESERVED3 reinterpret_cast|short|signed|sizeof|static_cast|template|this|throw|try
|
|
-RESERVED4 typename|union|unsigned|using|virtual
|
|
+RESERVED4 typename|union|using|virtual
|
|
|
|
WS [ \t]
|
|
NEWLINE (\n)|(\r\n)
|
|
@@ -164,6 +164,7 @@ textureCUBE {return KW_TEXTURECUBE; }
|
|
TextureCubeArray {return KW_TEXTURECUBEARRAY; }
|
|
true {return KW_TRUE; }
|
|
typedef {return KW_TYPEDEF; }
|
|
+unsigned {return KW_UNSIGNED; }
|
|
uniform {return KW_UNIFORM; }
|
|
vector {return KW_VECTOR; }
|
|
VertexShader {return KW_VERTEXSHADER; }
|
|
diff --git a/libs/vkd3d/libs/vkd3d-shader/hlsl.y b/libs/vkd3d/libs/vkd3d-shader/hlsl.y
|
|
index 9c1bdef926d..0b742f12f01 100644
|
|
--- a/libs/vkd3d/libs/vkd3d-shader/hlsl.y
|
|
+++ b/libs/vkd3d/libs/vkd3d-shader/hlsl.y
|
|
@@ -5566,6 +5566,7 @@ static bool state_block_add_entry(struct hlsl_state_block *state_block, struct h
|
|
%token KW_TEXTURECUBEARRAY
|
|
%token KW_TRUE
|
|
%token KW_TYPEDEF
|
|
+%token KW_UNSIGNED
|
|
%token KW_UNIFORM
|
|
%token KW_VECTOR
|
|
%token KW_VERTEXSHADER
|
|
@@ -6713,6 +6714,26 @@ type_no_void:
|
|
}
|
|
vkd3d_free($1);
|
|
}
|
|
+ | KW_UNSIGNED TYPE_IDENTIFIER
|
|
+ {
|
|
+ struct hlsl_type *type = hlsl_get_type(ctx->cur_scope, $2, true, true);
|
|
+
|
|
+ if (hlsl_is_numeric_type(type) && type->e.numeric.type == HLSL_TYPE_INT)
|
|
+ {
|
|
+ if (!(type = hlsl_type_clone(ctx, type, 0, 0)))
|
|
+ YYABORT;
|
|
+ vkd3d_free((void *)type->name);
|
|
+ type->name = NULL;
|
|
+ type->e.numeric.type = HLSL_TYPE_UINT;
|
|
+ }
|
|
+ else
|
|
+ {
|
|
+ hlsl_error(ctx, &@2, VKD3D_SHADER_ERROR_HLSL_INVALID_TYPE,
|
|
+ "The 'unsigned' keyword can't be used with type %s.", $2);
|
|
+ }
|
|
+
|
|
+ $$ = type;
|
|
+ }
|
|
| KW_STRUCT TYPE_IDENTIFIER
|
|
{
|
|
$$ = hlsl_get_type(ctx->cur_scope, $2, true, true);
|
|
diff --git a/libs/vkd3d/libs/vkd3d-shader/ir.c b/libs/vkd3d/libs/vkd3d-shader/ir.c
|
|
index b3b745fc1b2..5f99be632f2 100644
|
|
--- a/libs/vkd3d/libs/vkd3d-shader/ir.c
|
|
+++ b/libs/vkd3d/libs/vkd3d-shader/ir.c
|
|
@@ -46,9 +46,9 @@ static inline bool shader_register_is_phase_instance_id(const struct vkd3d_shade
|
|
|
|
static bool vsir_instruction_is_dcl(const struct vkd3d_shader_instruction *instruction)
|
|
{
|
|
- enum vkd3d_shader_opcode handler_idx = instruction->handler_idx;
|
|
- return (VKD3DSIH_DCL <= handler_idx && handler_idx <= VKD3DSIH_DCL_VERTICES_OUT)
|
|
- || handler_idx == VKD3DSIH_HS_DECLS;
|
|
+ enum vkd3d_shader_opcode opcode = instruction->opcode;
|
|
+ return (VKD3DSIH_DCL <= opcode && opcode <= VKD3DSIH_DCL_VERTICES_OUT)
|
|
+ || opcode == VKD3DSIH_HS_DECLS;
|
|
}
|
|
|
|
static void vkd3d_shader_instruction_make_nop(struct vkd3d_shader_instruction *ins)
|
|
@@ -60,9 +60,9 @@ static void vkd3d_shader_instruction_make_nop(struct vkd3d_shader_instruction *i
|
|
|
|
static bool vsir_instruction_init_with_params(struct vsir_program *program,
|
|
struct vkd3d_shader_instruction *ins, const struct vkd3d_shader_location *location,
|
|
- enum vkd3d_shader_opcode handler_idx, unsigned int dst_count, unsigned int src_count)
|
|
+ enum vkd3d_shader_opcode opcode, unsigned int dst_count, unsigned int src_count)
|
|
{
|
|
- vsir_instruction_init(ins, location, handler_idx);
|
|
+ vsir_instruction_init(ins, location, opcode);
|
|
ins->dst_count = dst_count;
|
|
ins->src_count = src_count;
|
|
|
|
@@ -287,7 +287,7 @@ static enum vkd3d_result vsir_program_lower_precise_mad(struct vsir_program *pro
|
|
mul_ins = &instructions->elements[pos];
|
|
add_ins = &instructions->elements[pos + 1];
|
|
|
|
- mul_ins->handler_idx = VKD3DSIH_MUL;
|
|
+ mul_ins->opcode = VKD3DSIH_MUL;
|
|
mul_ins->src_count = 2;
|
|
|
|
if (!(vsir_instruction_init_with_params(program, add_ins, &mul_ins->location, VKD3DSIH_ADD, 1, 2)))
|
|
@@ -322,7 +322,7 @@ static enum vkd3d_result vsir_program_lower_instructions(struct vsir_program *pr
|
|
{
|
|
struct vkd3d_shader_instruction *ins = &instructions->elements[i];
|
|
|
|
- switch (ins->handler_idx)
|
|
+ switch (ins->opcode)
|
|
{
|
|
case VKD3DSIH_IFC:
|
|
if ((ret = vsir_program_lower_ifc(program, ins, &tmp_idx, message_context)) < 0)
|
|
@@ -492,26 +492,26 @@ static void flattener_eliminate_phase_related_dcls(struct hull_flattener *normal
|
|
struct shader_phase_location *loc;
|
|
bool b;
|
|
|
|
- if (ins->handler_idx == VKD3DSIH_HS_FORK_PHASE || ins->handler_idx == VKD3DSIH_HS_JOIN_PHASE)
|
|
+ if (ins->opcode == VKD3DSIH_HS_FORK_PHASE || ins->opcode == VKD3DSIH_HS_JOIN_PHASE)
|
|
{
|
|
b = flattener_is_in_fork_or_join_phase(normaliser);
|
|
/* Reset the phase info. */
|
|
normaliser->phase_body_idx = ~0u;
|
|
- normaliser->phase = ins->handler_idx;
|
|
+ normaliser->phase = ins->opcode;
|
|
normaliser->instance_count = 1;
|
|
/* Leave the first occurrence and delete the rest. */
|
|
if (b)
|
|
vkd3d_shader_instruction_make_nop(ins);
|
|
return;
|
|
}
|
|
- else if (ins->handler_idx == VKD3DSIH_DCL_HS_FORK_PHASE_INSTANCE_COUNT
|
|
- || ins->handler_idx == VKD3DSIH_DCL_HS_JOIN_PHASE_INSTANCE_COUNT)
|
|
+ else if (ins->opcode == VKD3DSIH_DCL_HS_FORK_PHASE_INSTANCE_COUNT
|
|
+ || ins->opcode == VKD3DSIH_DCL_HS_JOIN_PHASE_INSTANCE_COUNT)
|
|
{
|
|
normaliser->instance_count = ins->declaration.count + !ins->declaration.count;
|
|
vkd3d_shader_instruction_make_nop(ins);
|
|
return;
|
|
}
|
|
- else if (ins->handler_idx == VKD3DSIH_DCL_INPUT && shader_register_is_phase_instance_id(
|
|
+ else if (ins->opcode == VKD3DSIH_DCL_INPUT && shader_register_is_phase_instance_id(
|
|
&ins->declaration.dst.reg))
|
|
{
|
|
vkd3d_shader_instruction_make_nop(ins);
|
|
@@ -524,7 +524,7 @@ static void flattener_eliminate_phase_related_dcls(struct hull_flattener *normal
|
|
if (normaliser->phase_body_idx == ~0u)
|
|
normaliser->phase_body_idx = index;
|
|
|
|
- if (ins->handler_idx == VKD3DSIH_RET)
|
|
+ if (ins->opcode == VKD3DSIH_RET)
|
|
{
|
|
normaliser->last_ret_location = ins->location;
|
|
vkd3d_shader_instruction_make_nop(ins);
|
|
@@ -679,11 +679,11 @@ static void src_param_init_const_uint(struct vkd3d_shader_src_param *src, uint32
|
|
}
|
|
|
|
void vsir_instruction_init(struct vkd3d_shader_instruction *ins, const struct vkd3d_shader_location *location,
|
|
- enum vkd3d_shader_opcode handler_idx)
|
|
+ enum vkd3d_shader_opcode opcode)
|
|
{
|
|
memset(ins, 0, sizeof(*ins));
|
|
ins->location = *location;
|
|
- ins->handler_idx = handler_idx;
|
|
+ ins->opcode = opcode;
|
|
}
|
|
|
|
static bool vsir_instruction_init_label(struct vkd3d_shader_instruction *ins,
|
|
@@ -865,12 +865,12 @@ static enum vkd3d_result instruction_array_normalise_hull_shader_control_point_i
|
|
{
|
|
ins = &instructions->elements[i];
|
|
|
|
- switch (ins->handler_idx)
|
|
+ switch (ins->opcode)
|
|
{
|
|
case VKD3DSIH_HS_CONTROL_POINT_PHASE:
|
|
case VKD3DSIH_HS_FORK_PHASE:
|
|
case VKD3DSIH_HS_JOIN_PHASE:
|
|
- normaliser.phase = ins->handler_idx;
|
|
+ normaliser.phase = ins->opcode;
|
|
break;
|
|
default:
|
|
if (vsir_instruction_is_dcl(ins))
|
|
@@ -888,7 +888,7 @@ static enum vkd3d_result instruction_array_normalise_hull_shader_control_point_i
|
|
{
|
|
ins = &instructions->elements[i];
|
|
|
|
- switch (ins->handler_idx)
|
|
+ switch (ins->opcode)
|
|
{
|
|
case VKD3DSIH_DCL_INPUT_CONTROL_POINT_COUNT:
|
|
input_control_point_count = ins->declaration.count;
|
|
@@ -1526,7 +1526,7 @@ static void shader_instruction_normalise_io_params(struct vkd3d_shader_instructi
|
|
struct vkd3d_shader_register *reg;
|
|
unsigned int i;
|
|
|
|
- switch (ins->handler_idx)
|
|
+ switch (ins->opcode)
|
|
{
|
|
case VKD3DSIH_DCL_INPUT:
|
|
if (normaliser->shader_type == VKD3D_SHADER_TYPE_HULL)
|
|
@@ -1560,7 +1560,7 @@ static void shader_instruction_normalise_io_params(struct vkd3d_shader_instructi
|
|
case VKD3DSIH_HS_CONTROL_POINT_PHASE:
|
|
case VKD3DSIH_HS_FORK_PHASE:
|
|
case VKD3DSIH_HS_JOIN_PHASE:
|
|
- normaliser->phase = ins->handler_idx;
|
|
+ normaliser->phase = ins->opcode;
|
|
memset(normaliser->input_dcl_params, 0, sizeof(normaliser->input_dcl_params));
|
|
memset(normaliser->output_dcl_params, 0, sizeof(normaliser->output_dcl_params));
|
|
memset(normaliser->pc_dcl_params, 0, sizeof(normaliser->pc_dcl_params));
|
|
@@ -1594,7 +1594,7 @@ static enum vkd3d_result vsir_program_normalise_io_registers(struct vsir_program
|
|
{
|
|
ins = &program->instructions.elements[i];
|
|
|
|
- switch (ins->handler_idx)
|
|
+ switch (ins->opcode)
|
|
{
|
|
case VKD3DSIH_DCL_OUTPUT_CONTROL_POINT_COUNT:
|
|
normaliser.output_control_point_count = ins->declaration.count;
|
|
@@ -1608,7 +1608,7 @@ static enum vkd3d_result vsir_program_normalise_io_registers(struct vsir_program
|
|
/* fall through */
|
|
case VKD3DSIH_HS_FORK_PHASE:
|
|
case VKD3DSIH_HS_JOIN_PHASE:
|
|
- normaliser.phase = ins->handler_idx;
|
|
+ normaliser.phase = ins->opcode;
|
|
break;
|
|
default:
|
|
break;
|
|
@@ -1740,7 +1740,7 @@ static enum vkd3d_result instruction_array_normalise_flat_constants(struct vsir_
|
|
{
|
|
struct vkd3d_shader_instruction *ins = &program->instructions.elements[i];
|
|
|
|
- if (ins->handler_idx == VKD3DSIH_DEF || ins->handler_idx == VKD3DSIH_DEFI || ins->handler_idx == VKD3DSIH_DEFB)
|
|
+ if (ins->opcode == VKD3DSIH_DEF || ins->opcode == VKD3DSIH_DEFI || ins->opcode == VKD3DSIH_DEFB)
|
|
{
|
|
struct flat_constant_def *def;
|
|
|
|
@@ -1779,7 +1779,7 @@ static void remove_dead_code(struct vsir_program *program)
|
|
{
|
|
struct vkd3d_shader_instruction *ins = &program->instructions.elements[i];
|
|
|
|
- switch (ins->handler_idx)
|
|
+ switch (ins->opcode)
|
|
{
|
|
case VKD3DSIH_IF:
|
|
case VKD3DSIH_LOOP:
|
|
@@ -1799,7 +1799,7 @@ static void remove_dead_code(struct vsir_program *program)
|
|
{
|
|
if (depth > 0)
|
|
{
|
|
- if (ins->handler_idx != VKD3DSIH_ELSE)
|
|
+ if (ins->opcode != VKD3DSIH_ELSE)
|
|
--depth;
|
|
vkd3d_shader_instruction_make_nop(ins);
|
|
}
|
|
@@ -1870,14 +1870,14 @@ static enum vkd3d_result vsir_program_normalise_combined_samplers(struct vsir_pr
|
|
struct vkd3d_shader_instruction *ins = &program->instructions.elements[i];
|
|
struct vkd3d_shader_src_param *srcs;
|
|
|
|
- switch (ins->handler_idx)
|
|
+ switch (ins->opcode)
|
|
{
|
|
case VKD3DSIH_TEX:
|
|
if (!(srcs = shader_src_param_allocator_get(&program->instructions.src_params, 3)))
|
|
return VKD3D_ERROR_OUT_OF_MEMORY;
|
|
memset(srcs, 0, sizeof(*srcs) * 3);
|
|
|
|
- ins->handler_idx = VKD3DSIH_SAMPLE;
|
|
+ ins->opcode = VKD3DSIH_SAMPLE;
|
|
|
|
srcs[0] = ins->src[0];
|
|
|
|
@@ -1919,7 +1919,7 @@ static enum vkd3d_result vsir_program_normalise_combined_samplers(struct vsir_pr
|
|
case VKD3DSIH_TEXREG2RGB:
|
|
vkd3d_shader_error(message_context, &ins->location, VKD3D_SHADER_ERROR_VSIR_NOT_IMPLEMENTED,
|
|
"Aborting due to not yet implemented feature: "
|
|
- "Combined sampler instruction %#x.", ins->handler_idx);
|
|
+ "Combined sampler instruction %#x.", ins->opcode);
|
|
return VKD3D_ERROR_NOT_IMPLEMENTED;
|
|
|
|
default:
|
|
@@ -2030,7 +2030,7 @@ static bool cf_flattener_copy_instruction(struct cf_flattener *flattener,
|
|
{
|
|
struct vkd3d_shader_instruction *dst_ins;
|
|
|
|
- if (instruction->handler_idx == VKD3DSIH_NOP)
|
|
+ if (instruction->opcode == VKD3DSIH_NOP)
|
|
return true;
|
|
|
|
if (!(dst_ins = cf_flattener_require_space(flattener, 1)))
|
|
@@ -2245,9 +2245,9 @@ static enum vkd3d_result cf_flattener_iterate_instruction_array(struct cf_flatte
|
|
* phase instruction, and in all other shader types begins with the first label instruction.
|
|
* Declaring an indexable temp with function scope is not considered a declaration,
|
|
* because it needs to live inside a function. */
|
|
- if (!after_declarations_section && instruction->handler_idx != VKD3DSIH_NOP)
|
|
+ if (!after_declarations_section && instruction->opcode != VKD3DSIH_NOP)
|
|
{
|
|
- bool is_function_indexable = instruction->handler_idx == VKD3DSIH_DCL_INDEXABLE_TEMP
|
|
+ bool is_function_indexable = instruction->opcode == VKD3DSIH_DCL_INDEXABLE_TEMP
|
|
&& instruction->declaration.indexable_temp.has_function_scope;
|
|
|
|
if (!vsir_instruction_is_dcl(instruction) || is_function_indexable)
|
|
@@ -2260,14 +2260,14 @@ static enum vkd3d_result cf_flattener_iterate_instruction_array(struct cf_flatte
|
|
cf_info = flattener->control_flow_depth
|
|
? &flattener->control_flow_info[flattener->control_flow_depth - 1] : NULL;
|
|
|
|
- switch (instruction->handler_idx)
|
|
+ switch (instruction->opcode)
|
|
{
|
|
case VKD3DSIH_HS_CONTROL_POINT_PHASE:
|
|
case VKD3DSIH_HS_FORK_PHASE:
|
|
case VKD3DSIH_HS_JOIN_PHASE:
|
|
if (!cf_flattener_copy_instruction(flattener, instruction))
|
|
return VKD3D_ERROR_OUT_OF_MEMORY;
|
|
- if (instruction->handler_idx != VKD3DSIH_HS_CONTROL_POINT_PHASE || !instruction->flags)
|
|
+ if (instruction->opcode != VKD3DSIH_HS_CONTROL_POINT_PHASE || !instruction->flags)
|
|
after_declarations_section = false;
|
|
break;
|
|
|
|
@@ -2662,7 +2662,7 @@ static enum vkd3d_result lower_switch_to_if_ladder(struct vsir_program *program)
|
|
struct vkd3d_shader_instruction *ins = &program->instructions.elements[i];
|
|
unsigned int case_count, j, default_label;
|
|
|
|
- switch (ins->handler_idx)
|
|
+ switch (ins->opcode)
|
|
{
|
|
case VKD3DSIH_LABEL:
|
|
current_label = label_from_src_param(&ins->src[0]);
|
|
@@ -2858,7 +2858,7 @@ static enum vkd3d_result vsir_program_materialise_phi_ssas_to_temps(struct vsir_
|
|
|
|
/* Only phi src/dst SSA values need be converted here. Structurisation may
|
|
* introduce new cases of undominated SSA use, which will be handled later. */
|
|
- if (ins->handler_idx != VKD3DSIH_PHI)
|
|
+ if (ins->opcode != VKD3DSIH_PHI)
|
|
continue;
|
|
++phi_count;
|
|
|
|
@@ -2907,7 +2907,7 @@ static enum vkd3d_result vsir_program_materialise_phi_ssas_to_temps(struct vsir_
|
|
for (j = 0; j < ins->src_count; ++j)
|
|
materialize_ssas_to_temps_process_reg(program, &alloc, &ins->src[j].reg);
|
|
|
|
- switch (ins->handler_idx)
|
|
+ switch (ins->opcode)
|
|
{
|
|
case VKD3DSIH_LABEL:
|
|
current_label = label_from_src_param(&ins->src[0]);
|
|
@@ -3336,7 +3336,7 @@ static void vsir_cfg_dump_dot(struct vsir_cfg *cfg)
|
|
if (block->label == 0)
|
|
continue;
|
|
|
|
- switch (block->end->handler_idx)
|
|
+ switch (block->end->opcode)
|
|
{
|
|
case VKD3DSIH_RET:
|
|
shape = "trapezium";
|
|
@@ -3478,7 +3478,7 @@ static enum vkd3d_result vsir_cfg_init(struct vsir_cfg *cfg, struct vsir_program
|
|
struct vkd3d_shader_instruction *instruction = &program->instructions.elements[i];
|
|
bool finish = false;
|
|
|
|
- switch (instruction->handler_idx)
|
|
+ switch (instruction->opcode)
|
|
{
|
|
case VKD3DSIH_PHI:
|
|
case VKD3DSIH_SWITCH_MONOLITHIC:
|
|
@@ -3533,7 +3533,7 @@ static enum vkd3d_result vsir_cfg_init(struct vsir_cfg *cfg, struct vsir_program
|
|
if (block->label == 0)
|
|
continue;
|
|
|
|
- switch (block->end->handler_idx)
|
|
+ switch (block->end->opcode)
|
|
{
|
|
case VKD3DSIH_RET:
|
|
break;
|
|
@@ -4192,7 +4192,7 @@ static enum vkd3d_result vsir_cfg_build_structured_program(struct vsir_cfg *cfg)
|
|
structure->u.block = block;
|
|
|
|
/* Generate between zero and two jump instructions. */
|
|
- switch (block->end->handler_idx)
|
|
+ switch (block->end->opcode)
|
|
{
|
|
case VKD3DSIH_BRANCH:
|
|
{
|
|
@@ -5049,7 +5049,7 @@ static enum vkd3d_result vsir_program_structurize(struct vsir_program *program,
|
|
{
|
|
struct vkd3d_shader_instruction *ins = &program->instructions.elements[i];
|
|
|
|
- switch (ins->handler_idx)
|
|
+ switch (ins->opcode)
|
|
{
|
|
case VKD3DSIH_LABEL:
|
|
assert(program->shader_version.type != VKD3D_SHADER_TYPE_HULL);
|
|
@@ -5064,7 +5064,7 @@ static enum vkd3d_result vsir_program_structurize(struct vsir_program *program,
|
|
case VKD3DSIH_HS_FORK_PHASE:
|
|
case VKD3DSIH_HS_JOIN_PHASE:
|
|
assert(program->shader_version.type == VKD3D_SHADER_TYPE_HULL);
|
|
- TRACE("Structurizing phase %u of a hull shader.\n", ins->handler_idx);
|
|
+ TRACE("Structurizing phase %u of a hull shader.\n", ins->opcode);
|
|
target.instructions[target.ins_count++] = *ins;
|
|
++i;
|
|
if ((ret = vsir_program_structurize_function(program, message_context,
|
|
@@ -5222,7 +5222,7 @@ static enum vkd3d_result vsir_program_materialize_undominated_ssas_to_temps(stru
|
|
{
|
|
struct vkd3d_shader_instruction *ins = &program->instructions.elements[i];
|
|
|
|
- switch (ins->handler_idx)
|
|
+ switch (ins->opcode)
|
|
{
|
|
case VKD3DSIH_LABEL:
|
|
assert(program->shader_version.type != VKD3D_SHADER_TYPE_HULL);
|
|
@@ -5237,7 +5237,7 @@ static enum vkd3d_result vsir_program_materialize_undominated_ssas_to_temps(stru
|
|
case VKD3DSIH_HS_FORK_PHASE:
|
|
case VKD3DSIH_HS_JOIN_PHASE:
|
|
assert(program->shader_version.type == VKD3D_SHADER_TYPE_HULL);
|
|
- TRACE("Materializing undominated SSAs in phase %u of a hull shader.\n", ins->handler_idx);
|
|
+ TRACE("Materializing undominated SSAs in phase %u of a hull shader.\n", ins->opcode);
|
|
++i;
|
|
if ((ret = vsir_program_materialize_undominated_ssas_to_temps_in_function(
|
|
program, message_context, &i)) < 0)
|
|
@@ -5641,7 +5641,7 @@ static void vsir_validate_dst_count(struct validation_context *ctx,
|
|
if (instruction->dst_count != count)
|
|
validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_DEST_COUNT,
|
|
"Invalid destination count %u for an instruction of type %#x, expected %u.",
|
|
- instruction->dst_count, instruction->handler_idx, count);
|
|
+ instruction->dst_count, instruction->opcode, count);
|
|
}
|
|
|
|
static void vsir_validate_src_count(struct validation_context *ctx,
|
|
@@ -5650,7 +5650,7 @@ static void vsir_validate_src_count(struct validation_context *ctx,
|
|
if (instruction->src_count != count)
|
|
validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_SOURCE_COUNT,
|
|
"Invalid source count %u for an instruction of type %#x, expected %u.",
|
|
- instruction->src_count, instruction->handler_idx, count);
|
|
+ instruction->src_count, instruction->opcode, count);
|
|
}
|
|
|
|
static bool vsir_validate_src_min_count(struct validation_context *ctx,
|
|
@@ -5660,7 +5660,7 @@ static bool vsir_validate_src_min_count(struct validation_context *ctx,
|
|
{
|
|
validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_SOURCE_COUNT,
|
|
"Invalid source count %u for an instruction of type %#x, expected at least %u.",
|
|
- instruction->src_count, instruction->handler_idx, count);
|
|
+ instruction->src_count, instruction->opcode, count);
|
|
return false;
|
|
}
|
|
|
|
@@ -5674,7 +5674,7 @@ static bool vsir_validate_src_max_count(struct validation_context *ctx,
|
|
{
|
|
validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_SOURCE_COUNT,
|
|
"Invalid source count %u for an instruction of type %#x, expected at most %u.",
|
|
- instruction->src_count, instruction->handler_idx, count);
|
|
+ instruction->src_count, instruction->opcode, count);
|
|
return false;
|
|
}
|
|
|
|
@@ -5701,7 +5701,7 @@ static void vsir_validate_cf_type(struct validation_context *ctx,
|
|
assert(expected_type != CF_TYPE_UNKNOWN);
|
|
if (ctx->cf_type != expected_type)
|
|
validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_CONTROL_FLOW, "Invalid instruction %#x in %s shader.",
|
|
- instruction->handler_idx, name_from_cf_type(ctx->cf_type));
|
|
+ instruction->opcode, name_from_cf_type(ctx->cf_type));
|
|
}
|
|
|
|
static void vsir_validate_instruction(struct validation_context *ctx)
|
|
@@ -5718,13 +5718,13 @@ static void vsir_validate_instruction(struct validation_context *ctx)
|
|
for (i = 0; i < instruction->src_count; ++i)
|
|
vsir_validate_src_param(ctx, &instruction->src[i]);
|
|
|
|
- if (instruction->handler_idx >= VKD3DSIH_INVALID)
|
|
+ if (instruction->opcode >= VKD3DSIH_INVALID)
|
|
{
|
|
validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_HANDLER, "Invalid instruction handler %#x.",
|
|
- instruction->handler_idx);
|
|
+ instruction->opcode);
|
|
}
|
|
|
|
- switch (instruction->handler_idx)
|
|
+ switch (instruction->opcode)
|
|
{
|
|
case VKD3DSIH_HS_DECLS:
|
|
case VKD3DSIH_HS_CONTROL_POINT_PHASE:
|
|
@@ -5733,12 +5733,14 @@ static void vsir_validate_instruction(struct validation_context *ctx)
|
|
vsir_validate_dst_count(ctx, instruction, 0);
|
|
vsir_validate_src_count(ctx, instruction, 0);
|
|
if (version->type != VKD3D_SHADER_TYPE_HULL)
|
|
- validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_HANDLER, "Phase instruction %#x is only valid in a hull shader.",
|
|
- instruction->handler_idx);
|
|
+ validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_HANDLER,
|
|
+ "Phase instruction %#x is only valid in a hull shader.",
|
|
+ instruction->opcode);
|
|
if (ctx->depth != 0)
|
|
- validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_CONTROL_FLOW, "Phase instruction %#x must appear to top level.",
|
|
- instruction->handler_idx);
|
|
- ctx->phase = instruction->handler_idx;
|
|
+ validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_CONTROL_FLOW,
|
|
+ "Phase instruction %#x must appear to top level.",
|
|
+ instruction->opcode);
|
|
+ ctx->phase = instruction->opcode;
|
|
ctx->dcl_temps_found = false;
|
|
return;
|
|
|
|
@@ -5812,7 +5814,7 @@ static void vsir_validate_instruction(struct validation_context *ctx)
|
|
&& ctx->phase == VKD3DSIH_INVALID)
|
|
validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_HANDLER,
|
|
"Instruction %#x appear before any phase instruction in a hull shader.",
|
|
- instruction->handler_idx);
|
|
+ instruction->opcode);
|
|
|
|
/* We support two different control flow types in shaders:
|
|
* block-based, like DXIL and SPIR-V, and structured, like D3DBC
|
|
@@ -5824,7 +5826,7 @@ static void vsir_validate_instruction(struct validation_context *ctx)
|
|
* block, but need for that hasn't arisen yet, so we don't. */
|
|
if (ctx->cf_type == CF_TYPE_UNKNOWN && !vsir_instruction_is_dcl(instruction))
|
|
{
|
|
- if (instruction->handler_idx == VKD3DSIH_LABEL)
|
|
+ if (instruction->opcode == VKD3DSIH_LABEL)
|
|
ctx->cf_type = CF_TYPE_BLOCKS;
|
|
else
|
|
ctx->cf_type = CF_TYPE_STRUCTURED;
|
|
@@ -5832,7 +5834,7 @@ static void vsir_validate_instruction(struct validation_context *ctx)
|
|
|
|
if (ctx->cf_type == CF_TYPE_BLOCKS && !vsir_instruction_is_dcl(instruction))
|
|
{
|
|
- switch (instruction->handler_idx)
|
|
+ switch (instruction->opcode)
|
|
{
|
|
case VKD3DSIH_LABEL:
|
|
if (ctx->inside_block)
|
|
@@ -5844,20 +5846,22 @@ static void vsir_validate_instruction(struct validation_context *ctx)
|
|
case VKD3DSIH_BRANCH:
|
|
case VKD3DSIH_SWITCH_MONOLITHIC:
|
|
if (!ctx->inside_block)
|
|
- validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_CONTROL_FLOW, "Invalid instruction %#x outside any block.",
|
|
- instruction->handler_idx);
|
|
+ validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_CONTROL_FLOW,
|
|
+ "Invalid instruction %#x outside any block.",
|
|
+ instruction->opcode);
|
|
ctx->inside_block = false;
|
|
break;
|
|
|
|
default:
|
|
if (!ctx->inside_block)
|
|
- validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_CONTROL_FLOW, "Invalid instruction %#x outside any block.",
|
|
- instruction->handler_idx);
|
|
+ validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_CONTROL_FLOW,
|
|
+ "Invalid instruction %#x outside any block.",
|
|
+ instruction->opcode);
|
|
break;
|
|
}
|
|
}
|
|
|
|
- switch (instruction->handler_idx)
|
|
+ switch (instruction->opcode)
|
|
{
|
|
case VKD3DSIH_DCL_TEMPS:
|
|
vsir_validate_dst_count(ctx, instruction, 0);
|
|
@@ -5877,7 +5881,7 @@ static void vsir_validate_instruction(struct validation_context *ctx)
|
|
vsir_validate_src_count(ctx, instruction, 1);
|
|
if (!vkd3d_array_reserve((void **)&ctx->blocks, &ctx->blocks_capacity, ctx->depth + 1, sizeof(*ctx->blocks)))
|
|
return;
|
|
- ctx->blocks[ctx->depth++] = instruction->handler_idx;
|
|
+ ctx->blocks[ctx->depth++] = instruction->opcode;
|
|
break;
|
|
|
|
case VKD3DSIH_IFC:
|
|
@@ -5896,7 +5900,7 @@ static void vsir_validate_instruction(struct validation_context *ctx)
|
|
if (ctx->depth == 0 || ctx->blocks[ctx->depth - 1] != VKD3DSIH_IF)
|
|
validator_error(ctx, VKD3D_SHADER_ERROR_VSIR_INVALID_CONTROL_FLOW, "ELSE instruction doesn't terminate IF block.");
|
|
else
|
|
- ctx->blocks[ctx->depth - 1] = instruction->handler_idx;
|
|
+ ctx->blocks[ctx->depth - 1] = instruction->opcode;
|
|
break;
|
|
|
|
case VKD3DSIH_ENDIF:
|
|
@@ -5915,7 +5919,7 @@ static void vsir_validate_instruction(struct validation_context *ctx)
|
|
vsir_validate_src_count(ctx, instruction, version->major <= 3 ? 2 : 0);
|
|
if (!vkd3d_array_reserve((void **)&ctx->blocks, &ctx->blocks_capacity, ctx->depth + 1, sizeof(*ctx->blocks)))
|
|
return;
|
|
- ctx->blocks[ctx->depth++] = instruction->handler_idx;
|
|
+ ctx->blocks[ctx->depth++] = instruction->opcode;
|
|
break;
|
|
|
|
case VKD3DSIH_ENDLOOP:
|
|
@@ -5934,7 +5938,7 @@ static void vsir_validate_instruction(struct validation_context *ctx)
|
|
vsir_validate_src_count(ctx, instruction, 1);
|
|
if (!vkd3d_array_reserve((void **)&ctx->blocks, &ctx->blocks_capacity, ctx->depth + 1, sizeof(*ctx->blocks)))
|
|
return;
|
|
- ctx->blocks[ctx->depth++] = instruction->handler_idx;
|
|
+ ctx->blocks[ctx->depth++] = instruction->opcode;
|
|
break;
|
|
|
|
case VKD3DSIH_ENDREP:
|
|
@@ -5953,7 +5957,7 @@ static void vsir_validate_instruction(struct validation_context *ctx)
|
|
vsir_validate_src_count(ctx, instruction, 1);
|
|
if (!vkd3d_array_reserve((void **)&ctx->blocks, &ctx->blocks_capacity, ctx->depth + 1, sizeof(*ctx->blocks)))
|
|
return;
|
|
- ctx->blocks[ctx->depth++] = instruction->handler_idx;
|
|
+ ctx->blocks[ctx->depth++] = instruction->opcode;
|
|
break;
|
|
|
|
case VKD3DSIH_ENDSWITCH:
|
|
diff --git a/libs/vkd3d/libs/vkd3d-shader/preproc.l b/libs/vkd3d/libs/vkd3d-shader/preproc.l
|
|
index be50d3b9020..a3cdbe559a7 100644
|
|
--- a/libs/vkd3d/libs/vkd3d-shader/preproc.l
|
|
+++ b/libs/vkd3d/libs/vkd3d-shader/preproc.l
|
|
@@ -20,6 +20,7 @@
|
|
|
|
%{
|
|
|
|
+#include "preproc.h"
|
|
#include "preproc.tab.h"
|
|
|
|
#undef ERROR /* defined in wingdi.h */
|
|
diff --git a/libs/vkd3d/libs/vkd3d-shader/spirv.c b/libs/vkd3d/libs/vkd3d-shader/spirv.c
|
|
index 984a4f894f6..5372a4668a7 100644
|
|
--- a/libs/vkd3d/libs/vkd3d-shader/spirv.c
|
|
+++ b/libs/vkd3d/libs/vkd3d-shader/spirv.c
|
|
@@ -6831,7 +6831,7 @@ static void spirv_compiler_enter_shader_phase(struct spirv_compiler *compiler,
|
|
uint32_t function_id, void_id, function_type_id;
|
|
struct vkd3d_shader_phase *phase;
|
|
|
|
- assert(compiler->phase != instruction->handler_idx);
|
|
+ assert(compiler->phase != instruction->opcode);
|
|
|
|
if (!is_in_default_phase(compiler))
|
|
spirv_compiler_leave_shader_phase(compiler);
|
|
@@ -6843,16 +6843,16 @@ static void spirv_compiler_enter_shader_phase(struct spirv_compiler *compiler,
|
|
vkd3d_spirv_build_op_function(builder, void_id, function_id,
|
|
SpvFunctionControlMaskNone, function_type_id);
|
|
|
|
- compiler->phase = instruction->handler_idx;
|
|
+ compiler->phase = instruction->opcode;
|
|
spirv_compiler_emit_shader_phase_name(compiler, function_id, NULL);
|
|
|
|
- phase = (instruction->handler_idx == VKD3DSIH_HS_CONTROL_POINT_PHASE)
|
|
+ phase = (instruction->opcode == VKD3DSIH_HS_CONTROL_POINT_PHASE)
|
|
? &compiler->control_point_phase : &compiler->patch_constant_phase;
|
|
phase->function_id = function_id;
|
|
/* The insertion location must be set after the label is emitted. */
|
|
phase->function_location = 0;
|
|
|
|
- if (instruction->handler_idx == VKD3DSIH_HS_CONTROL_POINT_PHASE)
|
|
+ if (instruction->opcode == VKD3DSIH_HS_CONTROL_POINT_PHASE)
|
|
compiler->emit_default_control_point_phase = instruction->flags;
|
|
}
|
|
|
|
@@ -7016,7 +7016,7 @@ static SpvOp spirv_compiler_map_alu_instruction(const struct vkd3d_shader_instru
|
|
{
|
|
static const struct
|
|
{
|
|
- enum vkd3d_shader_opcode handler_idx;
|
|
+ enum vkd3d_shader_opcode opcode;
|
|
SpvOp spirv_op;
|
|
}
|
|
alu_ops[] =
|
|
@@ -7056,7 +7056,7 @@ static SpvOp spirv_compiler_map_alu_instruction(const struct vkd3d_shader_instru
|
|
|
|
for (i = 0; i < ARRAY_SIZE(alu_ops); ++i)
|
|
{
|
|
- if (alu_ops[i].handler_idx == instruction->handler_idx)
|
|
+ if (alu_ops[i].opcode == instruction->opcode)
|
|
return alu_ops[i].spirv_op;
|
|
}
|
|
|
|
@@ -7065,7 +7065,7 @@ static SpvOp spirv_compiler_map_alu_instruction(const struct vkd3d_shader_instru
|
|
|
|
static SpvOp spirv_compiler_map_logical_instruction(const struct vkd3d_shader_instruction *instruction)
|
|
{
|
|
- switch (instruction->handler_idx)
|
|
+ switch (instruction->opcode)
|
|
{
|
|
case VKD3DSIH_AND:
|
|
return SpvOpLogicalAnd;
|
|
@@ -7090,20 +7090,20 @@ static void spirv_compiler_emit_bool_cast(struct spirv_compiler *compiler,
|
|
val_id = spirv_compiler_emit_load_src(compiler, src, dst->write_mask);
|
|
if (dst->reg.data_type == VKD3D_DATA_HALF || dst->reg.data_type == VKD3D_DATA_FLOAT)
|
|
{
|
|
- val_id = spirv_compiler_emit_bool_to_float(compiler, 1, val_id, instruction->handler_idx == VKD3DSIH_ITOF);
|
|
+ val_id = spirv_compiler_emit_bool_to_float(compiler, 1, val_id, instruction->opcode == VKD3DSIH_ITOF);
|
|
}
|
|
else if (dst->reg.data_type == VKD3D_DATA_DOUBLE)
|
|
{
|
|
/* ITOD is not supported. Frontends which emit bool casts must use ITOF for double. */
|
|
- val_id = spirv_compiler_emit_bool_to_double(compiler, 1, val_id, instruction->handler_idx == VKD3DSIH_ITOF);
|
|
+ val_id = spirv_compiler_emit_bool_to_double(compiler, 1, val_id, instruction->opcode == VKD3DSIH_ITOF);
|
|
}
|
|
else if (dst->reg.data_type == VKD3D_DATA_UINT16 || dst->reg.data_type == VKD3D_DATA_UINT)
|
|
{
|
|
- val_id = spirv_compiler_emit_bool_to_int(compiler, 1, val_id, instruction->handler_idx == VKD3DSIH_ITOI);
|
|
+ val_id = spirv_compiler_emit_bool_to_int(compiler, 1, val_id, instruction->opcode == VKD3DSIH_ITOI);
|
|
}
|
|
else if (dst->reg.data_type == VKD3D_DATA_UINT64)
|
|
{
|
|
- val_id = spirv_compiler_emit_bool_to_int64(compiler, 1, val_id, instruction->handler_idx == VKD3DSIH_ITOI);
|
|
+ val_id = spirv_compiler_emit_bool_to_int64(compiler, 1, val_id, instruction->opcode == VKD3DSIH_ITOI);
|
|
}
|
|
else
|
|
{
|
|
@@ -7126,7 +7126,7 @@ static enum vkd3d_result spirv_compiler_emit_alu_instruction(struct spirv_compil
|
|
SpvOp op = SpvOpMax;
|
|
unsigned int i;
|
|
|
|
- if (src->reg.data_type == VKD3D_DATA_UINT64 && instruction->handler_idx == VKD3DSIH_COUNTBITS)
|
|
+ if (src->reg.data_type == VKD3D_DATA_UINT64 && instruction->opcode == VKD3DSIH_COUNTBITS)
|
|
{
|
|
/* At least some drivers support this anyway, but if validation is enabled it will fail. */
|
|
FIXME("Unsupported 64-bit source for bit count.\n");
|
|
@@ -7142,8 +7142,8 @@ static enum vkd3d_result spirv_compiler_emit_alu_instruction(struct spirv_compil
|
|
/* VSIR supports logic ops AND/OR/XOR on bool values. */
|
|
op = spirv_compiler_map_logical_instruction(instruction);
|
|
}
|
|
- else if (instruction->handler_idx == VKD3DSIH_ITOF || instruction->handler_idx == VKD3DSIH_UTOF
|
|
- || instruction->handler_idx == VKD3DSIH_ITOI || instruction->handler_idx == VKD3DSIH_UTOU)
|
|
+ else if (instruction->opcode == VKD3DSIH_ITOF || instruction->opcode == VKD3DSIH_UTOF
|
|
+ || instruction->opcode == VKD3DSIH_ITOI || instruction->opcode == VKD3DSIH_UTOU)
|
|
{
|
|
/* VSIR supports cast from bool to signed/unsigned integer types and floating point types,
|
|
* where bool is treated as a 1-bit integer and a signed 'true' value converts to -1. */
|
|
@@ -7158,9 +7158,9 @@ static enum vkd3d_result spirv_compiler_emit_alu_instruction(struct spirv_compil
|
|
|
|
if (op == SpvOpMax)
|
|
{
|
|
- ERR("Unexpected instruction %#x.\n", instruction->handler_idx);
|
|
+ ERR("Unexpected instruction %#x.\n", instruction->opcode);
|
|
spirv_compiler_error(compiler, VKD3D_SHADER_ERROR_SPV_INVALID_HANDLER,
|
|
- "Encountered invalid/unhandled instruction handler %#x.", instruction->handler_idx);
|
|
+ "Encountered invalid/unhandled instruction handler %#x.", instruction->opcode);
|
|
return VKD3D_ERROR_INVALID_SHADER;
|
|
}
|
|
|
|
@@ -7179,8 +7179,8 @@ static enum vkd3d_result spirv_compiler_emit_alu_instruction(struct spirv_compil
|
|
* Microsoft fxc will compile immediate constants larger than 5 bits.
|
|
* Fixing up the constants would be more elegant, but the simplest way is
|
|
* to let this handle constants too. */
|
|
- if (!(instruction->flags & VKD3DSI_SHIFT_UNMASKED) && (instruction->handler_idx == VKD3DSIH_ISHL
|
|
- || instruction->handler_idx == VKD3DSIH_ISHR || instruction->handler_idx == VKD3DSIH_USHR))
|
|
+ if (!(instruction->flags & VKD3DSI_SHIFT_UNMASKED) && (instruction->opcode == VKD3DSIH_ISHL
|
|
+ || instruction->opcode == VKD3DSIH_ISHR || instruction->opcode == VKD3DSIH_USHR))
|
|
{
|
|
uint32_t mask_id = spirv_compiler_get_constant_vector(compiler,
|
|
VKD3D_SHADER_COMPONENT_UINT, vsir_write_mask_component_count(dst->write_mask), 0x1f);
|
|
@@ -7218,7 +7218,7 @@ static enum GLSLstd450 spirv_compiler_map_ext_glsl_instruction(
|
|
{
|
|
static const struct
|
|
{
|
|
- enum vkd3d_shader_opcode handler_idx;
|
|
+ enum vkd3d_shader_opcode opcode;
|
|
enum GLSLstd450 glsl_inst;
|
|
}
|
|
glsl_insts[] =
|
|
@@ -7258,7 +7258,7 @@ static enum GLSLstd450 spirv_compiler_map_ext_glsl_instruction(
|
|
|
|
for (i = 0; i < ARRAY_SIZE(glsl_insts); ++i)
|
|
{
|
|
- if (glsl_insts[i].handler_idx == instruction->handler_idx)
|
|
+ if (glsl_insts[i].opcode == instruction->opcode)
|
|
return glsl_insts[i].glsl_inst;
|
|
}
|
|
|
|
@@ -7276,20 +7276,20 @@ static void spirv_compiler_emit_ext_glsl_instruction(struct spirv_compiler *comp
|
|
unsigned int i, component_count;
|
|
enum GLSLstd450 glsl_inst;
|
|
|
|
- if (src[0].reg.data_type == VKD3D_DATA_UINT64 && (instruction->handler_idx == VKD3DSIH_FIRSTBIT_HI
|
|
- || instruction->handler_idx == VKD3DSIH_FIRSTBIT_LO || instruction->handler_idx == VKD3DSIH_FIRSTBIT_SHI))
|
|
+ if (src[0].reg.data_type == VKD3D_DATA_UINT64 && (instruction->opcode == VKD3DSIH_FIRSTBIT_HI
|
|
+ || instruction->opcode == VKD3DSIH_FIRSTBIT_LO || instruction->opcode == VKD3DSIH_FIRSTBIT_SHI))
|
|
{
|
|
/* At least some drivers support this anyway, but if validation is enabled it will fail. */
|
|
- FIXME("Unsupported 64-bit source for handler %#x.\n", instruction->handler_idx);
|
|
+ FIXME("Unsupported 64-bit source for handler %#x.\n", instruction->opcode);
|
|
spirv_compiler_error(compiler, VKD3D_SHADER_ERROR_SPV_NOT_IMPLEMENTED,
|
|
- "64-bit source for handler %#x is not supported.", instruction->handler_idx);
|
|
+ "64-bit source for handler %#x is not supported.", instruction->opcode);
|
|
return;
|
|
}
|
|
|
|
glsl_inst = spirv_compiler_map_ext_glsl_instruction(instruction);
|
|
if (glsl_inst == GLSLstd450Bad)
|
|
{
|
|
- ERR("Unexpected instruction %#x.\n", instruction->handler_idx);
|
|
+ ERR("Unexpected instruction %#x.\n", instruction->opcode);
|
|
return;
|
|
}
|
|
|
|
@@ -7306,8 +7306,8 @@ static void spirv_compiler_emit_ext_glsl_instruction(struct spirv_compiler *comp
|
|
val_id = vkd3d_spirv_build_op_ext_inst(builder, type_id,
|
|
instr_set_id, glsl_inst, src_id, instruction->src_count);
|
|
|
|
- if (instruction->handler_idx == VKD3DSIH_FIRSTBIT_HI
|
|
- || instruction->handler_idx == VKD3DSIH_FIRSTBIT_SHI)
|
|
+ if (instruction->opcode == VKD3DSIH_FIRSTBIT_HI
|
|
+ || instruction->opcode == VKD3DSIH_FIRSTBIT_SHI)
|
|
{
|
|
/* In D3D bits are numbered from the most significant bit. */
|
|
component_count = vsir_write_mask_component_count(dst->write_mask);
|
|
@@ -7415,7 +7415,7 @@ static void spirv_compiler_emit_movc(struct spirv_compiler *compiler,
|
|
|
|
if (src[0].reg.data_type != VKD3D_DATA_BOOL)
|
|
{
|
|
- if (instruction->handler_idx == VKD3DSIH_CMP)
|
|
+ if (instruction->opcode == VKD3DSIH_CMP)
|
|
condition_id = vkd3d_spirv_build_op_tr2(builder, &builder->function_stream, SpvOpFOrdGreaterThanEqual,
|
|
vkd3d_spirv_get_type_id(builder, VKD3D_SHADER_COMPONENT_BOOL, component_count), condition_id,
|
|
spirv_compiler_get_constant_float_vector(compiler, 0.0f, component_count));
|
|
@@ -7469,9 +7469,9 @@ static void spirv_compiler_emit_dot(struct spirv_compiler *compiler,
|
|
component_count = vsir_write_mask_component_count(dst->write_mask);
|
|
component_type = vkd3d_component_type_from_data_type(dst->reg.data_type);
|
|
|
|
- if (instruction->handler_idx == VKD3DSIH_DP4)
|
|
+ if (instruction->opcode == VKD3DSIH_DP4)
|
|
write_mask = VKD3DSP_WRITEMASK_ALL;
|
|
- else if (instruction->handler_idx == VKD3DSIH_DP3)
|
|
+ else if (instruction->opcode == VKD3DSIH_DP3)
|
|
write_mask = VKD3DSP_WRITEMASK_0 | VKD3DSP_WRITEMASK_1 | VKD3DSP_WRITEMASK_2;
|
|
else
|
|
write_mask = VKD3DSP_WRITEMASK_0 | VKD3DSP_WRITEMASK_1;
|
|
@@ -7606,8 +7606,8 @@ static void spirv_compiler_emit_int_div(struct spirv_compiler *compiler,
|
|
unsigned int component_count = 0;
|
|
SpvOp div_op, mod_op;
|
|
|
|
- div_op = instruction->handler_idx == VKD3DSIH_IDIV ? SpvOpSDiv : SpvOpUDiv;
|
|
- mod_op = instruction->handler_idx == VKD3DSIH_IDIV ? SpvOpSRem : SpvOpUMod;
|
|
+ div_op = instruction->opcode == VKD3DSIH_IDIV ? SpvOpSDiv : SpvOpUDiv;
|
|
+ mod_op = instruction->opcode == VKD3DSIH_IDIV ? SpvOpSRem : SpvOpUMod;
|
|
|
|
if (dst[0].reg.type != VKD3DSPR_NULL)
|
|
{
|
|
@@ -7778,13 +7778,13 @@ static void spirv_compiler_emit_bitfield_instruction(struct spirv_compiler *comp
|
|
mask_id = spirv_compiler_get_constant_uint(compiler, size - 1);
|
|
size_id = spirv_compiler_get_constant_uint(compiler, size);
|
|
|
|
- switch (instruction->handler_idx)
|
|
+ switch (instruction->opcode)
|
|
{
|
|
case VKD3DSIH_BFI: op = SpvOpBitFieldInsert; break;
|
|
case VKD3DSIH_IBFE: op = SpvOpBitFieldSExtract; break;
|
|
case VKD3DSIH_UBFE: op = SpvOpBitFieldUExtract; break;
|
|
default:
|
|
- ERR("Unexpected instruction %#x.\n", instruction->handler_idx);
|
|
+ ERR("Unexpected instruction %#x.\n", instruction->opcode);
|
|
return;
|
|
}
|
|
|
|
@@ -7895,7 +7895,7 @@ static void spirv_compiler_emit_comparison_instruction(struct spirv_compiler *co
|
|
unsigned int component_count;
|
|
SpvOp op;
|
|
|
|
- switch (instruction->handler_idx)
|
|
+ switch (instruction->opcode)
|
|
{
|
|
case VKD3DSIH_DEQO:
|
|
case VKD3DSIH_EQO: op = SpvOpFOrdEqual; break;
|
|
@@ -7916,7 +7916,7 @@ static void spirv_compiler_emit_comparison_instruction(struct spirv_compiler *co
|
|
case VKD3DSIH_UGE: op = SpvOpUGreaterThanEqual; break;
|
|
case VKD3DSIH_ULT: op = SpvOpULessThan; break;
|
|
default:
|
|
- ERR("Unexpected instruction %#x.\n", instruction->handler_idx);
|
|
+ ERR("Unexpected instruction %#x.\n", instruction->opcode);
|
|
return;
|
|
}
|
|
|
|
@@ -7949,7 +7949,7 @@ static void spirv_compiler_emit_orderedness_instruction(struct spirv_compiler *c
|
|
src0_id = vkd3d_spirv_build_op_is_nan(builder, type_id, src0_id);
|
|
src1_id = vkd3d_spirv_build_op_is_nan(builder, type_id, src1_id);
|
|
val_id = vkd3d_spirv_build_op_logical_or(builder, type_id, src0_id, src1_id);
|
|
- if (instruction->handler_idx == VKD3DSIH_ORD)
|
|
+ if (instruction->opcode == VKD3DSIH_ORD)
|
|
val_id = vkd3d_spirv_build_op_logical_not(builder, type_id, val_id);
|
|
spirv_compiler_emit_store_dst(compiler, dst, val_id);
|
|
}
|
|
@@ -7964,7 +7964,7 @@ static void spirv_compiler_emit_float_comparison_instruction(struct spirv_compil
|
|
unsigned int component_count;
|
|
SpvOp op;
|
|
|
|
- switch (instruction->handler_idx)
|
|
+ switch (instruction->opcode)
|
|
{
|
|
case VKD3DSIH_SLT: op = SpvOpFOrdLessThan; break;
|
|
case VKD3DSIH_SGE: op = SpvOpFOrdGreaterThanEqual; break;
|
|
@@ -8262,7 +8262,7 @@ static void spirv_compiler_emit_deriv_instruction(struct spirv_compiler *compile
|
|
|
|
static const struct instruction_info
|
|
{
|
|
- enum vkd3d_shader_opcode handler_idx;
|
|
+ enum vkd3d_shader_opcode opcode;
|
|
SpvOp op;
|
|
bool needs_derivative_control;
|
|
}
|
|
@@ -8279,7 +8279,7 @@ static void spirv_compiler_emit_deriv_instruction(struct spirv_compiler *compile
|
|
info = NULL;
|
|
for (i = 0; i < ARRAY_SIZE(deriv_instructions); ++i)
|
|
{
|
|
- if (deriv_instructions[i].handler_idx == instruction->handler_idx)
|
|
+ if (deriv_instructions[i].opcode == instruction->opcode)
|
|
{
|
|
info = &deriv_instructions[i];
|
|
break;
|
|
@@ -8287,7 +8287,7 @@ static void spirv_compiler_emit_deriv_instruction(struct spirv_compiler *compile
|
|
}
|
|
if (!info)
|
|
{
|
|
- ERR("Unexpected instruction %#x.\n", instruction->handler_idx);
|
|
+ ERR("Unexpected instruction %#x.\n", instruction->opcode);
|
|
return;
|
|
}
|
|
|
|
@@ -8497,7 +8497,7 @@ static void spirv_compiler_emit_ld(struct spirv_compiler *compiler,
|
|
uint32_t coordinate_mask;
|
|
bool multisample;
|
|
|
|
- multisample = instruction->handler_idx == VKD3DSIH_LD2DMS;
|
|
+ multisample = instruction->opcode == VKD3DSIH_LD2DMS;
|
|
|
|
spirv_compiler_prepare_image(compiler, &image, &src[1].reg, NULL, VKD3D_IMAGE_FLAG_NONE);
|
|
|
|
@@ -8576,7 +8576,7 @@ static void spirv_compiler_emit_sample(struct spirv_compiler *compiler,
|
|
spirv_compiler_prepare_image(compiler, &image,
|
|
&resource->reg, &sampler->reg, VKD3D_IMAGE_FLAG_SAMPLED);
|
|
|
|
- switch (instruction->handler_idx)
|
|
+ switch (instruction->opcode)
|
|
{
|
|
case VKD3DSIH_SAMPLE:
|
|
op = SpvOpImageSampleImplicitLod;
|
|
@@ -8603,7 +8603,7 @@ static void spirv_compiler_emit_sample(struct spirv_compiler *compiler,
|
|
&src[3], VKD3DSP_WRITEMASK_0);
|
|
break;
|
|
default:
|
|
- ERR("Unexpected instruction %#x.\n", instruction->handler_idx);
|
|
+ ERR("Unexpected instruction %#x.\n", instruction->opcode);
|
|
return;
|
|
}
|
|
|
|
@@ -8637,7 +8637,7 @@ static void spirv_compiler_emit_sample_c(struct spirv_compiler *compiler,
|
|
uint32_t image_operands[2];
|
|
SpvOp op;
|
|
|
|
- if (instruction->handler_idx == VKD3DSIH_SAMPLE_C_LZ)
|
|
+ if (instruction->opcode == VKD3DSIH_SAMPLE_C_LZ)
|
|
{
|
|
op = SpvOpImageSampleDrefExplicitLod;
|
|
operands_mask |= SpvImageOperandsLodMask;
|
|
@@ -8687,12 +8687,12 @@ static void spirv_compiler_emit_gather4(struct spirv_compiler *compiler,
|
|
uint32_t coordinate_mask;
|
|
bool extended_offset;
|
|
|
|
- if (instruction->handler_idx == VKD3DSIH_GATHER4_C
|
|
- || instruction->handler_idx == VKD3DSIH_GATHER4_PO_C)
|
|
+ if (instruction->opcode == VKD3DSIH_GATHER4_C
|
|
+ || instruction->opcode == VKD3DSIH_GATHER4_PO_C)
|
|
image_flags |= VKD3D_IMAGE_FLAG_DEPTH;
|
|
|
|
- extended_offset = instruction->handler_idx == VKD3DSIH_GATHER4_PO
|
|
- || instruction->handler_idx == VKD3DSIH_GATHER4_PO_C;
|
|
+ extended_offset = instruction->opcode == VKD3DSIH_GATHER4_PO
|
|
+ || instruction->opcode == VKD3DSIH_GATHER4_PO_C;
|
|
|
|
addr = &src[0];
|
|
offset = extended_offset ? &src[1] : NULL;
|
|
@@ -8963,7 +8963,6 @@ static void spirv_compiler_emit_store_uav_raw_structured(struct spirv_compiler *
|
|
{
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_SHADER_COMPONENT_UINT, 1);
|
|
spirv_compiler_prepare_image(compiler, &image, &dst->reg, NULL, VKD3D_IMAGE_FLAG_NONE);
|
|
- assert((instruction->handler_idx == VKD3DSIH_STORE_STRUCTURED) != !image.structure_stride);
|
|
base_coordinate_id = spirv_compiler_emit_raw_structured_addressing(compiler,
|
|
type_id, image.structure_stride, &src[0], VKD3DSP_WRITEMASK_0, &src[1], VKD3DSP_WRITEMASK_0);
|
|
|
|
@@ -9007,7 +9006,6 @@ static void spirv_compiler_emit_store_tgsm(struct spirv_compiler *compiler,
|
|
|
|
type_id = vkd3d_spirv_get_type_id(builder, VKD3D_SHADER_COMPONENT_UINT, 1);
|
|
ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, reg_info.storage_class, type_id);
|
|
- assert((instruction->handler_idx == VKD3DSIH_STORE_STRUCTURED) != !reg_info.structure_stride);
|
|
base_coordinate_id = spirv_compiler_emit_raw_structured_addressing(compiler,
|
|
type_id, reg_info.structure_stride, &src[0], VKD3DSP_WRITEMASK_0, &src[1], VKD3DSP_WRITEMASK_0);
|
|
|
|
@@ -9145,7 +9143,7 @@ static void spirv_compiler_emit_uav_counter_instruction(struct spirv_compiler *c
|
|
uint32_t operands[3];
|
|
SpvOp op;
|
|
|
|
- op = instruction->handler_idx == VKD3DSIH_IMM_ATOMIC_ALLOC
|
|
+ op = instruction->opcode == VKD3DSIH_IMM_ATOMIC_ALLOC
|
|
? SpvOpAtomicIIncrement : SpvOpAtomicIDecrement;
|
|
|
|
resource_symbol = spirv_compiler_find_resource(compiler, &src->reg);
|
|
@@ -9211,7 +9209,7 @@ static SpvOp spirv_compiler_map_atomic_instruction(const struct vkd3d_shader_ins
|
|
{
|
|
static const struct
|
|
{
|
|
- enum vkd3d_shader_opcode handler_idx;
|
|
+ enum vkd3d_shader_opcode opcode;
|
|
SpvOp spirv_op;
|
|
}
|
|
atomic_ops[] =
|
|
@@ -9240,16 +9238,16 @@ static SpvOp spirv_compiler_map_atomic_instruction(const struct vkd3d_shader_ins
|
|
|
|
for (i = 0; i < ARRAY_SIZE(atomic_ops); ++i)
|
|
{
|
|
- if (atomic_ops[i].handler_idx == instruction->handler_idx)
|
|
+ if (atomic_ops[i].opcode == instruction->opcode)
|
|
return atomic_ops[i].spirv_op;
|
|
}
|
|
|
|
return SpvOpMax;
|
|
}
|
|
|
|
-static bool is_imm_atomic_instruction(enum vkd3d_shader_opcode handler_idx)
|
|
+static bool is_imm_atomic_instruction(enum vkd3d_shader_opcode opcode)
|
|
{
|
|
- return VKD3DSIH_IMM_ATOMIC_ALLOC <= handler_idx && handler_idx <= VKD3DSIH_IMM_ATOMIC_XOR;
|
|
+ return VKD3DSIH_IMM_ATOMIC_ALLOC <= opcode && opcode <= VKD3DSIH_IMM_ATOMIC_XOR;
|
|
}
|
|
|
|
static void spirv_compiler_emit_atomic_instruction(struct spirv_compiler *compiler,
|
|
@@ -9274,12 +9272,12 @@ static void spirv_compiler_emit_atomic_instruction(struct spirv_compiler *compil
|
|
bool raw;
|
|
SpvOp op;
|
|
|
|
- resource = is_imm_atomic_instruction(instruction->handler_idx) ? &dst[1] : &dst[0];
|
|
+ resource = is_imm_atomic_instruction(instruction->opcode) ? &dst[1] : &dst[0];
|
|
|
|
op = spirv_compiler_map_atomic_instruction(instruction);
|
|
if (op == SpvOpMax)
|
|
{
|
|
- ERR("Unexpected instruction %#x.\n", instruction->handler_idx);
|
|
+ ERR("Unexpected instruction %#x.\n", instruction->opcode);
|
|
return;
|
|
}
|
|
|
|
@@ -9360,7 +9358,7 @@ static void spirv_compiler_emit_atomic_instruction(struct spirv_compiler *compil
|
|
{
|
|
WARN("Ignoring 'volatile' attribute.\n");
|
|
spirv_compiler_warning(compiler, VKD3D_SHADER_WARNING_SPV_IGNORING_FLAG,
|
|
- "Ignoring the 'volatile' attribute flag for atomic instruction %#x.", instruction->handler_idx);
|
|
+ "Ignoring the 'volatile' attribute flag for atomic instruction %#x.", instruction->opcode);
|
|
}
|
|
|
|
memory_semantic = (instruction->flags & VKD3DARF_SEQ_CST)
|
|
@@ -9379,7 +9377,7 @@ static void spirv_compiler_emit_atomic_instruction(struct spirv_compiler *compil
|
|
result_id = vkd3d_spirv_build_op_trv(builder, &builder->function_stream,
|
|
op, type_id, operands, i);
|
|
|
|
- if (is_imm_atomic_instruction(instruction->handler_idx))
|
|
+ if (is_imm_atomic_instruction(instruction->opcode))
|
|
spirv_compiler_emit_store_dst(compiler, dst, result_id);
|
|
}
|
|
|
|
@@ -9684,13 +9682,13 @@ static void spirv_compiler_emit_eval_attrib(struct spirv_compiler *compiler,
|
|
|
|
src_ids[src_count++] = register_info.id;
|
|
|
|
- if (instruction->handler_idx == VKD3DSIH_EVAL_CENTROID)
|
|
+ if (instruction->opcode == VKD3DSIH_EVAL_CENTROID)
|
|
{
|
|
op = GLSLstd450InterpolateAtCentroid;
|
|
}
|
|
else
|
|
{
|
|
- assert(instruction->handler_idx == VKD3DSIH_EVAL_SAMPLE_INDEX);
|
|
+ assert(instruction->opcode == VKD3DSIH_EVAL_SAMPLE_INDEX);
|
|
op = GLSLstd450InterpolateAtSample;
|
|
src_ids[src_count++] = spirv_compiler_emit_load_src(compiler, &src[1], VKD3DSP_WRITEMASK_0);
|
|
}
|
|
@@ -9772,7 +9770,7 @@ static void spirv_compiler_emit_emit_stream(struct spirv_compiler *compiler,
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
unsigned int stream_idx;
|
|
|
|
- if (instruction->handler_idx == VKD3DSIH_EMIT_STREAM)
|
|
+ if (instruction->opcode == VKD3DSIH_EMIT_STREAM)
|
|
stream_idx = instruction->src[0].reg.idx[0].offset;
|
|
else
|
|
stream_idx = 0;
|
|
@@ -9793,7 +9791,7 @@ static void spirv_compiler_emit_cut_stream(struct spirv_compiler *compiler,
|
|
struct vkd3d_spirv_builder *builder = &compiler->spirv_builder;
|
|
unsigned int stream_idx;
|
|
|
|
- if (instruction->handler_idx == VKD3DSIH_CUT_STREAM)
|
|
+ if (instruction->opcode == VKD3DSIH_CUT_STREAM)
|
|
stream_idx = instruction->src[0].reg.idx[0].offset;
|
|
else
|
|
stream_idx = 0;
|
|
@@ -9807,9 +9805,9 @@ static void spirv_compiler_emit_cut_stream(struct spirv_compiler *compiler,
|
|
vkd3d_spirv_build_op_end_primitive(builder);
|
|
}
|
|
|
|
-static SpvOp map_wave_bool_op(enum vkd3d_shader_opcode handler_idx)
|
|
+static SpvOp map_wave_bool_op(enum vkd3d_shader_opcode opcode)
|
|
{
|
|
- switch (handler_idx)
|
|
+ switch (opcode)
|
|
{
|
|
case VKD3DSIH_WAVE_ACTIVE_ALL_EQUAL:
|
|
return SpvOpGroupNonUniformAllEqual;
|
|
@@ -9833,7 +9831,7 @@ static void spirv_compiler_emit_wave_bool_op(struct spirv_compiler *compiler,
|
|
|
|
vkd3d_spirv_enable_capability(builder, SpvCapabilityGroupNonUniformVote);
|
|
|
|
- op = map_wave_bool_op(instruction->handler_idx);
|
|
+ op = map_wave_bool_op(instruction->opcode);
|
|
type_id = vkd3d_spirv_get_op_type_bool(builder);
|
|
val_id = spirv_compiler_emit_load_src(compiler, src, dst->write_mask);
|
|
val_id = vkd3d_spirv_build_op_tr2(builder, &builder->function_stream, op,
|
|
@@ -9865,9 +9863,9 @@ static void spirv_compiler_emit_wave_active_ballot(struct spirv_compiler *compil
|
|
spirv_compiler_emit_store_dst(compiler, dst, val_id);
|
|
}
|
|
|
|
-static SpvOp map_wave_alu_op(enum vkd3d_shader_opcode handler_idx, bool is_float)
|
|
+static SpvOp map_wave_alu_op(enum vkd3d_shader_opcode opcode, bool is_float)
|
|
{
|
|
- switch (handler_idx)
|
|
+ switch (opcode)
|
|
{
|
|
case VKD3DSIH_WAVE_ACTIVE_BIT_AND:
|
|
return SpvOpGroupNonUniformBitwiseAnd;
|
|
@@ -9905,7 +9903,7 @@ static void spirv_compiler_emit_wave_alu_op(struct spirv_compiler *compiler,
|
|
uint32_t type_id, val_id;
|
|
SpvOp op;
|
|
|
|
- op = map_wave_alu_op(instruction->handler_idx, data_type_is_floating_point(src->reg.data_type));
|
|
+ op = map_wave_alu_op(instruction->opcode, data_type_is_floating_point(src->reg.data_type));
|
|
|
|
type_id = vkd3d_spirv_get_type_id_for_data_type(builder, dst->reg.data_type,
|
|
vsir_write_mask_component_count(dst->write_mask));
|
|
@@ -9928,7 +9926,7 @@ static void spirv_compiler_emit_wave_bit_count(struct spirv_compiler *compiler,
|
|
SpvGroupOperation group_op;
|
|
uint32_t type_id, val_id;
|
|
|
|
- group_op = (instruction->handler_idx == VKD3DSIH_WAVE_PREFIX_BIT_COUNT) ? SpvGroupOperationExclusiveScan
|
|
+ group_op = (instruction->opcode == VKD3DSIH_WAVE_PREFIX_BIT_COUNT) ? SpvGroupOperationExclusiveScan
|
|
: SpvGroupOperationReduce;
|
|
|
|
val_id = spirv_compiler_emit_group_nonuniform_ballot(compiler, instruction->src);
|
|
@@ -10014,7 +10012,7 @@ static int spirv_compiler_handle_instruction(struct spirv_compiler *compiler,
|
|
|
|
compiler->location = instruction->location;
|
|
|
|
- switch (instruction->handler_idx)
|
|
+ switch (instruction->opcode)
|
|
{
|
|
case VKD3DSIH_DCL_GLOBAL_FLAGS:
|
|
spirv_compiler_emit_dcl_global_flags(compiler, instruction);
|
|
@@ -10390,9 +10388,9 @@ static int spirv_compiler_handle_instruction(struct spirv_compiler *compiler,
|
|
/* nothing to do */
|
|
break;
|
|
default:
|
|
- FIXME("Unhandled instruction %#x.\n", instruction->handler_idx);
|
|
+ FIXME("Unhandled instruction %#x.\n", instruction->opcode);
|
|
spirv_compiler_error(compiler, VKD3D_SHADER_ERROR_SPV_INVALID_HANDLER,
|
|
- "Encountered invalid/unhandled instruction handler %#x.", instruction->handler_idx);
|
|
+ "Encountered invalid/unhandled instruction handler %#x.", instruction->opcode);
|
|
break;
|
|
}
|
|
|
|
diff --git a/libs/vkd3d/libs/vkd3d-shader/tpf.c b/libs/vkd3d/libs/vkd3d-shader/tpf.c
|
|
index b562e815a81..5df7bbe79c5 100644
|
|
--- a/libs/vkd3d/libs/vkd3d-shader/tpf.c
|
|
+++ b/libs/vkd3d/libs/vkd3d-shader/tpf.c
|
|
@@ -780,7 +780,7 @@ static void shader_sm4_read_shader_data(struct vkd3d_shader_instruction *ins, ui
|
|
if (type != VKD3D_SM4_SHADER_DATA_IMMEDIATE_CONSTANT_BUFFER)
|
|
{
|
|
FIXME("Ignoring shader data type %#x.\n", type);
|
|
- ins->handler_idx = VKD3DSIH_NOP;
|
|
+ ins->opcode = VKD3DSIH_NOP;
|
|
return;
|
|
}
|
|
|
|
@@ -789,7 +789,7 @@ static void shader_sm4_read_shader_data(struct vkd3d_shader_instruction *ins, ui
|
|
if (icb_size % 4)
|
|
{
|
|
FIXME("Unexpected immediate constant buffer size %u.\n", icb_size);
|
|
- ins->handler_idx = VKD3DSIH_INVALID;
|
|
+ ins->opcode = VKD3DSIH_INVALID;
|
|
return;
|
|
}
|
|
|
|
@@ -797,7 +797,7 @@ static void shader_sm4_read_shader_data(struct vkd3d_shader_instruction *ins, ui
|
|
{
|
|
ERR("Failed to allocate immediate constant buffer, size %u.\n", icb_size);
|
|
vkd3d_shader_parser_error(&priv->p, VKD3D_SHADER_ERROR_TPF_OUT_OF_MEMORY, "Out of memory.");
|
|
- ins->handler_idx = VKD3DSIH_INVALID;
|
|
+ ins->opcode = VKD3DSIH_INVALID;
|
|
return;
|
|
}
|
|
icb->register_idx = 0;
|
|
@@ -2395,16 +2395,16 @@ static void shader_sm4_read_instruction(struct vkd3d_shader_sm4_parser *sm4, str
|
|
if (!(opcode_info = get_info_from_sm4_opcode(&sm4->lookup, opcode)))
|
|
{
|
|
FIXME("Unrecognized opcode %#x, opcode_token 0x%08x.\n", opcode, opcode_token);
|
|
- ins->handler_idx = VKD3DSIH_INVALID;
|
|
+ ins->opcode = VKD3DSIH_INVALID;
|
|
*ptr += len;
|
|
return;
|
|
}
|
|
|
|
vsir_instruction_init(ins, &sm4->p.location, opcode_info->handler_idx);
|
|
- if (ins->handler_idx == VKD3DSIH_HS_CONTROL_POINT_PHASE || ins->handler_idx == VKD3DSIH_HS_FORK_PHASE
|
|
- || ins->handler_idx == VKD3DSIH_HS_JOIN_PHASE)
|
|
- sm4->phase = ins->handler_idx;
|
|
- sm4->has_control_point_phase |= ins->handler_idx == VKD3DSIH_HS_CONTROL_POINT_PHASE;
|
|
+ if (ins->opcode == VKD3DSIH_HS_CONTROL_POINT_PHASE || ins->opcode == VKD3DSIH_HS_FORK_PHASE
|
|
+ || ins->opcode == VKD3DSIH_HS_JOIN_PHASE)
|
|
+ sm4->phase = ins->opcode;
|
|
+ sm4->has_control_point_phase |= ins->opcode == VKD3DSIH_HS_CONTROL_POINT_PHASE;
|
|
ins->flags = 0;
|
|
ins->coissue = false;
|
|
ins->raw = false;
|
|
@@ -2417,7 +2417,7 @@ static void shader_sm4_read_instruction(struct vkd3d_shader_sm4_parser *sm4, str
|
|
{
|
|
ERR("Failed to allocate src parameters.\n");
|
|
vkd3d_shader_parser_error(&sm4->p, VKD3D_SHADER_ERROR_TPF_OUT_OF_MEMORY, "Out of memory.");
|
|
- ins->handler_idx = VKD3DSIH_INVALID;
|
|
+ ins->opcode = VKD3DSIH_INVALID;
|
|
return;
|
|
}
|
|
ins->resource_type = VKD3D_SHADER_RESOURCE_NONE;
|
|
@@ -2459,7 +2459,7 @@ static void shader_sm4_read_instruction(struct vkd3d_shader_sm4_parser *sm4, str
|
|
{
|
|
ERR("Failed to allocate dst parameters.\n");
|
|
vkd3d_shader_parser_error(&sm4->p, VKD3D_SHADER_ERROR_TPF_OUT_OF_MEMORY, "Out of memory.");
|
|
- ins->handler_idx = VKD3DSIH_INVALID;
|
|
+ ins->opcode = VKD3DSIH_INVALID;
|
|
return;
|
|
}
|
|
for (i = 0; i < ins->dst_count; ++i)
|
|
@@ -2467,7 +2467,7 @@ static void shader_sm4_read_instruction(struct vkd3d_shader_sm4_parser *sm4, str
|
|
if (!(shader_sm4_read_dst_param(sm4, &p, *ptr, map_data_type(opcode_info->dst_info[i]),
|
|
&dst_params[i])))
|
|
{
|
|
- ins->handler_idx = VKD3DSIH_INVALID;
|
|
+ ins->opcode = VKD3DSIH_INVALID;
|
|
return;
|
|
}
|
|
dst_params[i].modifiers |= instruction_dst_modifier;
|
|
@@ -2478,7 +2478,7 @@ static void shader_sm4_read_instruction(struct vkd3d_shader_sm4_parser *sm4, str
|
|
if (!(shader_sm4_read_src_param(sm4, &p, *ptr, map_data_type(opcode_info->src_info[i]),
|
|
&src_params[i])))
|
|
{
|
|
- ins->handler_idx = VKD3DSIH_INVALID;
|
|
+ ins->opcode = VKD3DSIH_INVALID;
|
|
return;
|
|
}
|
|
}
|
|
@@ -2488,7 +2488,7 @@ static void shader_sm4_read_instruction(struct vkd3d_shader_sm4_parser *sm4, str
|
|
|
|
fail:
|
|
*ptr = sm4->end;
|
|
- ins->handler_idx = VKD3DSIH_INVALID;
|
|
+ ins->opcode = VKD3DSIH_INVALID;
|
|
return;
|
|
}
|
|
|
|
@@ -2693,7 +2693,7 @@ int tpf_parse(const struct vkd3d_shader_compile_info *compile_info, uint64_t con
|
|
ins = &instructions->elements[instructions->count];
|
|
shader_sm4_read_instruction(&sm4, ins);
|
|
|
|
- if (ins->handler_idx == VKD3DSIH_INVALID)
|
|
+ if (ins->opcode == VKD3DSIH_INVALID)
|
|
{
|
|
WARN("Encountered unrecognized or invalid instruction.\n");
|
|
vsir_program_cleanup(program);
|
|
diff --git a/libs/vkd3d/libs/vkd3d-shader/vkd3d_shader_main.c b/libs/vkd3d/libs/vkd3d-shader/vkd3d_shader_main.c
|
|
index 46c0da2a2d7..fdbde019111 100644
|
|
--- a/libs/vkd3d/libs/vkd3d-shader/vkd3d_shader_main.c
|
|
+++ b/libs/vkd3d/libs/vkd3d-shader/vkd3d_shader_main.c
|
|
@@ -849,12 +849,13 @@ static void vkd3d_shader_scan_add_uav_flag(const struct vkd3d_shader_scan_contex
|
|
|
|
static bool vkd3d_shader_instruction_is_uav_read(const struct vkd3d_shader_instruction *instruction)
|
|
{
|
|
- enum vkd3d_shader_opcode handler_idx = instruction->handler_idx;
|
|
- return (VKD3DSIH_ATOMIC_AND <= handler_idx && handler_idx <= VKD3DSIH_ATOMIC_XOR)
|
|
- || (VKD3DSIH_IMM_ATOMIC_ALLOC <= handler_idx && handler_idx <= VKD3DSIH_IMM_ATOMIC_XOR)
|
|
- || handler_idx == VKD3DSIH_LD_UAV_TYPED
|
|
- || (handler_idx == VKD3DSIH_LD_RAW && instruction->src[1].reg.type == VKD3DSPR_UAV)
|
|
- || (handler_idx == VKD3DSIH_LD_STRUCTURED && instruction->src[2].reg.type == VKD3DSPR_UAV);
|
|
+ enum vkd3d_shader_opcode opcode = instruction->opcode;
|
|
+
|
|
+ return (VKD3DSIH_ATOMIC_AND <= opcode && opcode <= VKD3DSIH_ATOMIC_XOR)
|
|
+ || (VKD3DSIH_IMM_ATOMIC_ALLOC <= opcode && opcode <= VKD3DSIH_IMM_ATOMIC_XOR)
|
|
+ || opcode == VKD3DSIH_LD_UAV_TYPED
|
|
+ || (opcode == VKD3DSIH_LD_RAW && instruction->src[1].reg.type == VKD3DSPR_UAV)
|
|
+ || (opcode == VKD3DSIH_LD_STRUCTURED && instruction->src[2].reg.type == VKD3DSPR_UAV);
|
|
}
|
|
|
|
static void vkd3d_shader_scan_record_uav_read(struct vkd3d_shader_scan_context *context,
|
|
@@ -865,9 +866,9 @@ static void vkd3d_shader_scan_record_uav_read(struct vkd3d_shader_scan_context *
|
|
|
|
static bool vkd3d_shader_instruction_is_uav_counter(const struct vkd3d_shader_instruction *instruction)
|
|
{
|
|
- enum vkd3d_shader_opcode handler_idx = instruction->handler_idx;
|
|
- return handler_idx == VKD3DSIH_IMM_ATOMIC_ALLOC
|
|
- || handler_idx == VKD3DSIH_IMM_ATOMIC_CONSUME;
|
|
+ enum vkd3d_shader_opcode opcode = instruction->opcode;
|
|
+
|
|
+ return opcode == VKD3DSIH_IMM_ATOMIC_ALLOC || opcode == VKD3DSIH_IMM_ATOMIC_CONSUME;
|
|
}
|
|
|
|
static void vkd3d_shader_scan_record_uav_counter(struct vkd3d_shader_scan_context *context,
|
|
@@ -878,9 +879,10 @@ static void vkd3d_shader_scan_record_uav_counter(struct vkd3d_shader_scan_contex
|
|
|
|
static bool vkd3d_shader_instruction_is_uav_atomic_op(const struct vkd3d_shader_instruction *instruction)
|
|
{
|
|
- enum vkd3d_shader_opcode handler_idx = instruction->handler_idx;
|
|
- return (VKD3DSIH_ATOMIC_AND <= handler_idx && handler_idx <= VKD3DSIH_ATOMIC_XOR)
|
|
- || (VKD3DSIH_IMM_ATOMIC_ALLOC <= handler_idx && handler_idx <= VKD3DSIH_IMM_ATOMIC_XOR);
|
|
+ enum vkd3d_shader_opcode opcode = instruction->opcode;
|
|
+
|
|
+ return (VKD3DSIH_ATOMIC_AND <= opcode && opcode <= VKD3DSIH_ATOMIC_XOR)
|
|
+ || (VKD3DSIH_IMM_ATOMIC_ALLOC <= opcode && opcode <= VKD3DSIH_IMM_ATOMIC_XOR);
|
|
}
|
|
|
|
static void vkd3d_shader_scan_record_uav_atomic_op(struct vkd3d_shader_scan_context *context,
|
|
@@ -1132,7 +1134,7 @@ static int vkd3d_shader_scan_instruction(struct vkd3d_shader_scan_context *conte
|
|
|
|
context->location = instruction->location;
|
|
|
|
- switch (instruction->handler_idx)
|
|
+ switch (instruction->opcode)
|
|
{
|
|
case VKD3DSIH_DCL_CONSTANT_BUFFER:
|
|
vkd3d_shader_scan_constant_buffer_declaration(context, instruction);
|
|
diff --git a/libs/vkd3d/libs/vkd3d-shader/vkd3d_shader_private.h b/libs/vkd3d/libs/vkd3d-shader/vkd3d_shader_private.h
|
|
index 29b8d6ad022..87bcf2f688b 100644
|
|
--- a/libs/vkd3d/libs/vkd3d-shader/vkd3d_shader_private.h
|
|
+++ b/libs/vkd3d/libs/vkd3d-shader/vkd3d_shader_private.h
|
|
@@ -1189,7 +1189,7 @@ struct vkd3d_shader_location
|
|
struct vkd3d_shader_instruction
|
|
{
|
|
struct vkd3d_shader_location location;
|
|
- enum vkd3d_shader_opcode handler_idx;
|
|
+ enum vkd3d_shader_opcode opcode;
|
|
uint32_t flags;
|
|
unsigned int dst_count;
|
|
unsigned int src_count;
|
|
@@ -1238,8 +1238,8 @@ static inline bool vkd3d_shader_ver_le(const struct vkd3d_shader_version *v, uns
|
|
return v->major < major || (v->major == major && v->minor <= minor);
|
|
}
|
|
|
|
-void vsir_instruction_init(struct vkd3d_shader_instruction *ins, const struct vkd3d_shader_location *location,
|
|
- enum vkd3d_shader_opcode handler_idx);
|
|
+void vsir_instruction_init(struct vkd3d_shader_instruction *ins,
|
|
+ const struct vkd3d_shader_location *location, enum vkd3d_shader_opcode opcode);
|
|
|
|
static inline bool vkd3d_shader_instruction_has_texel_offset(const struct vkd3d_shader_instruction *ins)
|
|
{
|
|
--
|
|
2.43.0
|
|
|