From b2905d22ada20f34d244cac51b1e95f74f3fa85a Mon Sep 17 00:00:00 2001 From: Alistair Leslie-Hughes Date: Thu, 14 Dec 2023 10:07:09 +1100 Subject: [PATCH] Updated vkd3d to 21491d1bbb168da8aeaa7bdde6e5f182b2205558. --- libs/vkd3d/libs/vkd3d-shader/d3d_asm.c | 2 +- libs/vkd3d/libs/vkd3d-shader/ir.c | 14 +- libs/vkd3d/libs/vkd3d-shader/spirv.c | 201 ++++++++++-------- libs/vkd3d/libs/vkd3d-shader/tpf.c | 7 +- .../libs/vkd3d-shader/vkd3d_shader_private.h | 13 +- libs/vkd3d/libs/vkd3d/state.c | 4 +- 6 files changed, 134 insertions(+), 107 deletions(-) diff --git a/libs/vkd3d/libs/vkd3d-shader/d3d_asm.c b/libs/vkd3d/libs/vkd3d-shader/d3d_asm.c index 2d52ee07724..86ddd1ffded 100644 --- a/libs/vkd3d/libs/vkd3d-shader/d3d_asm.c +++ b/libs/vkd3d/libs/vkd3d-shader/d3d_asm.c @@ -1317,7 +1317,7 @@ static void shader_dump_dst_param(struct vkd3d_d3d_asm_compiler *compiler, static const char write_mask_chars[] = "xyzw"; if (param->reg.data_type == VKD3D_DATA_DOUBLE) - write_mask = vkd3d_write_mask_32_from_64(write_mask); + write_mask = vsir_write_mask_32_from_64(write_mask); shader_addline(buffer, ".%s", compiler->colours.write_mask); if (write_mask & VKD3DSP_WRITEMASK_0) diff --git a/libs/vkd3d/libs/vkd3d-shader/ir.c b/libs/vkd3d/libs/vkd3d-shader/ir.c index a35ef862096..1a569619707 100644 --- a/libs/vkd3d/libs/vkd3d-shader/ir.c +++ b/libs/vkd3d/libs/vkd3d-shader/ir.c @@ -593,19 +593,19 @@ struct signature_element *vsir_signature_find_element_for_reg(const struct shade } static unsigned int range_map_get_register_count(uint8_t range_map[][VKD3D_VEC4_SIZE], - unsigned int register_idx, unsigned int write_mask) + unsigned int register_idx, uint32_t write_mask) { - return range_map[register_idx][vkd3d_write_mask_get_component_idx(write_mask)]; + return range_map[register_idx][vsir_write_mask_get_component_idx(write_mask)]; } static void range_map_set_register_range(uint8_t range_map[][VKD3D_VEC4_SIZE], unsigned int register_idx, - unsigned int register_count, unsigned int write_mask, bool is_dcl_indexrange) + unsigned int register_count, uint32_t write_mask, bool is_dcl_indexrange) { unsigned int i, j, r, c, component_idx, component_count; assert(write_mask <= VKD3DSP_WRITEMASK_ALL); - component_idx = vkd3d_write_mask_get_component_idx(write_mask); - component_count = vkd3d_write_mask_component_count(write_mask); + component_idx = vsir_write_mask_get_component_idx(write_mask); + component_count = vsir_write_mask_component_count(write_mask); assert(register_idx < MAX_REG_OUTPUT && MAX_REG_OUTPUT - register_idx >= register_count); @@ -899,7 +899,7 @@ static bool shader_dst_param_io_normalise(struct vkd3d_shader_dst_param *dst_par element_idx = shader_signature_find_element_for_reg(signature, reg_idx, write_mask); e = &signature->elements[element_idx]; - dst_param->write_mask >>= vkd3d_write_mask_get_component_idx(e->mask); + dst_param->write_mask >>= vsir_write_mask_get_component_idx(e->mask); if (is_io_dcl) { /* Validated in the TPF reader. */ @@ -1011,7 +1011,7 @@ static void shader_src_param_io_normalise(struct vkd3d_shader_src_param *src_par reg->idx[id_idx].offset = element_idx; reg->idx_count = id_idx + 1; - if ((component_idx = vkd3d_write_mask_get_component_idx(e->mask))) + if ((component_idx = vsir_write_mask_get_component_idx(e->mask))) { for (i = 0; i < VKD3D_VEC4_SIZE; ++i) if (vkd3d_swizzle_get_component(src_param->swizzle, i)) diff --git a/libs/vkd3d/libs/vkd3d-shader/spirv.c b/libs/vkd3d/libs/vkd3d-shader/spirv.c index db45920200d..5c537598e1e 100644 --- a/libs/vkd3d/libs/vkd3d-shader/spirv.c +++ b/libs/vkd3d/libs/vkd3d-shader/spirv.c @@ -133,7 +133,7 @@ static void vkd3d_spirv_dump(const struct vkd3d_shader_code *spirv, } } -static void vkd3d_spirv_validate(const struct vkd3d_shader_code *spirv, +static bool vkd3d_spirv_validate(struct vkd3d_string_buffer *buffer, const struct vkd3d_shader_code *spirv, enum vkd3d_shader_spirv_environment environment) { spv_diagnostic diagnostic = NULL; @@ -145,12 +145,13 @@ static void vkd3d_spirv_validate(const struct vkd3d_shader_code *spirv, if ((ret = spvValidateBinary(context, spirv->code, spirv->size / sizeof(uint32_t), &diagnostic))) { - FIXME("Failed to validate SPIR-V binary, ret %d.\n", ret); - FIXME("Diagnostic message: %s.\n", debugstr_a(diagnostic->error)); + vkd3d_string_buffer_printf(buffer, "%s", diagnostic->error); } spvDiagnosticDestroy(diagnostic); spvContextDestroy(context); + + return !ret; } #else @@ -163,8 +164,11 @@ static enum vkd3d_result vkd3d_spirv_binary_to_text(const struct vkd3d_shader_co } static void vkd3d_spirv_dump(const struct vkd3d_shader_code *spirv, enum vkd3d_shader_spirv_environment environment) {} -static void vkd3d_spirv_validate(const struct vkd3d_shader_code *spirv, - enum vkd3d_shader_spirv_environment environment) {} +static bool vkd3d_spirv_validate(struct vkd3d_string_buffer *buffer, const struct vkd3d_shader_code *spirv, + enum vkd3d_shader_spirv_environment environment) +{ + return true; +} #endif /* HAVE_SPIRV_TOOLS */ @@ -2403,6 +2407,8 @@ struct spirv_compiler struct ssa_register_info *ssa_register_info; unsigned int ssa_register_count; + + uint64_t config_flags; }; static bool is_in_default_phase(const struct spirv_compiler *compiler) @@ -2458,7 +2464,8 @@ static void spirv_compiler_destroy(struct spirv_compiler *compiler) static struct spirv_compiler *spirv_compiler_create(const struct vkd3d_shader_version *shader_version, struct vkd3d_shader_desc *shader_desc, const struct vkd3d_shader_compile_info *compile_info, const struct vkd3d_shader_scan_descriptor_info1 *scan_descriptor_info, - struct vkd3d_shader_message_context *message_context, const struct vkd3d_shader_location *location) + struct vkd3d_shader_message_context *message_context, const struct vkd3d_shader_location *location, + uint64_t config_flags) { const struct shader_signature *patch_constant_signature = &shader_desc->patch_constant_signature; const struct shader_signature *output_signature = &shader_desc->output_signature; @@ -2475,6 +2482,7 @@ static struct spirv_compiler *spirv_compiler_create(const struct vkd3d_shader_ve memset(compiler, 0, sizeof(*compiler)); compiler->message_context = message_context; compiler->location = *location; + compiler->config_flags = config_flags; if ((target_info = vkd3d_find_struct(compile_info->next, SPIRV_TARGET_INFO))) { @@ -3041,13 +3049,13 @@ static uint32_t spirv_compiler_get_constant_double_vector(struct spirv_compiler } static uint32_t spirv_compiler_get_type_id_for_reg(struct spirv_compiler *compiler, - const struct vkd3d_shader_register *reg, DWORD write_mask) + const struct vkd3d_shader_register *reg, uint32_t write_mask) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; return vkd3d_spirv_get_type_id(builder, vkd3d_component_type_from_data_type(reg->data_type), - vkd3d_write_mask_component_count(write_mask)); + vsir_write_mask_component_count(write_mask)); } static uint32_t spirv_compiler_get_type_id_for_dst(struct spirv_compiler *compiler, @@ -3555,7 +3563,7 @@ static void spirv_compiler_emit_dereference_register(struct spirv_compiler *comp if (index_count) { - component_count = vkd3d_write_mask_component_count(register_info->write_mask); + component_count = vsir_write_mask_component_count(register_info->write_mask); type_id = vkd3d_spirv_get_type_id(builder, register_info->component_type, component_count); ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, register_info->storage_class, type_id); register_info->id = vkd3d_spirv_build_op_access_chain(builder, ptr_type_id, @@ -3596,15 +3604,15 @@ static bool vkd3d_swizzle_is_scalar(unsigned int swizzle) } static uint32_t spirv_compiler_emit_swizzle(struct spirv_compiler *compiler, - uint32_t val_id, unsigned int val_write_mask, enum vkd3d_shader_component_type component_type, - unsigned int swizzle, unsigned int write_mask) + uint32_t val_id, uint32_t val_write_mask, enum vkd3d_shader_component_type component_type, + unsigned int swizzle, uint32_t write_mask) { unsigned int i, component_idx, component_count, val_component_count; struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; uint32_t type_id, components[VKD3D_VEC4_SIZE]; - component_count = vkd3d_write_mask_component_count(write_mask); - val_component_count = vkd3d_write_mask_component_count(val_write_mask); + component_count = vsir_write_mask_component_count(write_mask); + val_component_count = vsir_write_mask_component_count(val_write_mask); if (component_count == val_component_count && (component_count == 1 || vkd3d_swizzle_is_equal(val_write_mask, swizzle, write_mask))) @@ -3614,9 +3622,9 @@ static uint32_t spirv_compiler_emit_swizzle(struct spirv_compiler *compiler, if (component_count == 1) { - component_idx = vkd3d_write_mask_get_component_idx(write_mask); + component_idx = vsir_write_mask_get_component_idx(write_mask); component_idx = vkd3d_swizzle_get_component(swizzle, component_idx); - component_idx -= vkd3d_write_mask_get_component_idx(val_write_mask); + component_idx -= vsir_write_mask_get_component_idx(val_write_mask); return vkd3d_spirv_build_op_composite_extract1(builder, type_id, val_id, component_idx); } @@ -3667,9 +3675,9 @@ static uint32_t spirv_compiler_emit_vector_shuffle(struct spirv_compiler *compil } static uint32_t spirv_compiler_emit_load_constant(struct spirv_compiler *compiler, - const struct vkd3d_shader_register *reg, DWORD swizzle, DWORD write_mask) + const struct vkd3d_shader_register *reg, DWORD swizzle, uint32_t write_mask) { - unsigned int component_count = vkd3d_write_mask_component_count(write_mask); + unsigned int component_count = vsir_write_mask_component_count(write_mask); uint32_t values[VKD3D_VEC4_SIZE] = {0}; unsigned int i, j; @@ -3694,9 +3702,9 @@ static uint32_t spirv_compiler_emit_load_constant(struct spirv_compiler *compile } static uint32_t spirv_compiler_emit_load_constant64(struct spirv_compiler *compiler, - const struct vkd3d_shader_register *reg, DWORD swizzle, DWORD write_mask) + const struct vkd3d_shader_register *reg, DWORD swizzle, uint32_t write_mask) { - unsigned int component_count = vkd3d_write_mask_component_count(write_mask); + unsigned int component_count = vsir_write_mask_component_count(write_mask); uint64_t values[VKD3D_DVEC2_SIZE] = {0}; unsigned int i, j; @@ -3721,9 +3729,9 @@ static uint32_t spirv_compiler_emit_load_constant64(struct spirv_compiler *compi } static uint32_t spirv_compiler_emit_load_undef(struct spirv_compiler *compiler, - const struct vkd3d_shader_register *reg, DWORD write_mask) + const struct vkd3d_shader_register *reg, uint32_t write_mask) { - unsigned int component_count = vkd3d_write_mask_component_count(write_mask); + unsigned int component_count = vsir_write_mask_component_count(write_mask); struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; uint32_t type_id; @@ -3734,28 +3742,28 @@ static uint32_t spirv_compiler_emit_load_undef(struct spirv_compiler *compiler, } static uint32_t spirv_compiler_emit_load_scalar(struct spirv_compiler *compiler, - const struct vkd3d_shader_register *reg, DWORD swizzle, DWORD write_mask, + const struct vkd3d_shader_register *reg, DWORD swizzle, uint32_t write_mask, const struct vkd3d_shader_register_info *reg_info) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; uint32_t type_id, ptr_type_id, index, reg_id, val_id; unsigned int component_idx, reg_component_count; enum vkd3d_shader_component_type component_type; - unsigned int skipped_component_mask; + uint32_t skipped_component_mask; assert(!register_is_constant_or_undef(reg)); - assert(vkd3d_write_mask_component_count(write_mask) == 1); + assert(vsir_write_mask_component_count(write_mask) == 1); - component_idx = vkd3d_write_mask_get_component_idx(write_mask); + component_idx = vsir_write_mask_get_component_idx(write_mask); component_idx = vkd3d_swizzle_get_component(swizzle, component_idx); skipped_component_mask = ~reg_info->write_mask & ((VKD3DSP_WRITEMASK_0 << component_idx) - 1); if (skipped_component_mask) - component_idx -= vkd3d_write_mask_component_count(skipped_component_mask); + component_idx -= vsir_write_mask_component_count(skipped_component_mask); component_type = vkd3d_component_type_from_data_type(reg->data_type); - reg_component_count = vkd3d_write_mask_component_count(reg_info->write_mask); + reg_component_count = vsir_write_mask_component_count(reg_info->write_mask); - if (component_idx >= vkd3d_write_mask_component_count(reg_info->write_mask)) + if (component_idx >= vsir_write_mask_component_count(reg_info->write_mask)) { ERR("Invalid component_idx %u for register %#x, %u (write_mask %#x).\n", component_idx, reg->type, reg->idx[0].offset, reg_info->write_mask); @@ -3894,14 +3902,14 @@ static uint32_t spirv_compiler_emit_load_ssa_reg(struct spirv_compiler *compiler } static uint32_t spirv_compiler_emit_load_reg(struct spirv_compiler *compiler, - const struct vkd3d_shader_register *reg, DWORD swizzle, DWORD write_mask) + const struct vkd3d_shader_register *reg, DWORD swizzle, uint32_t write_mask) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; enum vkd3d_shader_component_type component_type; struct vkd3d_shader_register_info reg_info; unsigned int component_count; - unsigned int write_mask32; uint32_t type_id, val_id; + uint32_t write_mask32; if (reg->type == VKD3DSPR_IMMCONST) return spirv_compiler_emit_load_constant(compiler, reg, swizzle, write_mask); @@ -3910,7 +3918,7 @@ static uint32_t spirv_compiler_emit_load_reg(struct spirv_compiler *compiler, else if (reg->type == VKD3DSPR_UNDEF) return spirv_compiler_emit_load_undef(compiler, reg, write_mask); - component_count = vkd3d_write_mask_component_count(write_mask); + component_count = vsir_write_mask_component_count(write_mask); component_type = vkd3d_component_type_from_data_type(reg->data_type); if (reg->type == VKD3DSPR_SSA) @@ -3924,21 +3932,21 @@ static uint32_t spirv_compiler_emit_load_reg(struct spirv_compiler *compiler, assert(reg_info.component_type != VKD3D_SHADER_COMPONENT_DOUBLE); spirv_compiler_emit_dereference_register(compiler, reg, ®_info); - write_mask32 = (reg->data_type == VKD3D_DATA_DOUBLE) ? vkd3d_write_mask_32_from_64(write_mask) : write_mask; + write_mask32 = (reg->data_type == VKD3D_DATA_DOUBLE) ? vsir_write_mask_32_from_64(write_mask) : write_mask; /* Intermediate value (no storage class). */ if (reg_info.storage_class == SpvStorageClassMax) { val_id = reg_info.id; } - else if (vkd3d_write_mask_component_count(write_mask32) == 1) + else if (vsir_write_mask_component_count(write_mask32) == 1) { return spirv_compiler_emit_load_scalar(compiler, reg, swizzle, write_mask, ®_info); } else { type_id = vkd3d_spirv_get_type_id(builder, - reg_info.component_type, vkd3d_write_mask_component_count(reg_info.write_mask)); + reg_info.component_type, vsir_write_mask_component_count(reg_info.write_mask)); val_id = vkd3d_spirv_build_op_load(builder, type_id, reg_info.id, SpvMemoryAccessMaskNone); } @@ -4041,19 +4049,19 @@ static uint32_t spirv_compiler_emit_load_src_with_type(struct spirv_compiler *co } static void spirv_compiler_emit_store_scalar(struct spirv_compiler *compiler, - uint32_t dst_id, unsigned int dst_write_mask, enum vkd3d_shader_component_type component_type, - SpvStorageClass storage_class, unsigned int write_mask, uint32_t val_id) + uint32_t dst_id, uint32_t dst_write_mask, enum vkd3d_shader_component_type component_type, + SpvStorageClass storage_class, uint32_t write_mask, uint32_t val_id) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; uint32_t type_id, ptr_type_id, index; unsigned int component_idx; - if (vkd3d_write_mask_component_count(dst_write_mask) > 1) + if (vsir_write_mask_component_count(dst_write_mask) > 1) { type_id = vkd3d_spirv_get_type_id(builder, component_type, 1); ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, storage_class, type_id); - component_idx = vkd3d_write_mask_get_component_idx(write_mask); - component_idx -= vkd3d_write_mask_get_component_idx(dst_write_mask); + component_idx = vsir_write_mask_get_component_idx(write_mask); + component_idx -= vsir_write_mask_get_component_idx(dst_write_mask); index = spirv_compiler_get_constant_uint(compiler, component_idx); dst_id = vkd3d_spirv_build_op_in_bounds_access_chain1(builder, ptr_type_id, dst_id, index); } @@ -4062,8 +4070,8 @@ static void spirv_compiler_emit_store_scalar(struct spirv_compiler *compiler, } static void spirv_compiler_emit_store(struct spirv_compiler *compiler, - uint32_t dst_id, unsigned int dst_write_mask, enum vkd3d_shader_component_type component_type, - SpvStorageClass storage_class, unsigned int write_mask, uint32_t val_id) + uint32_t dst_id, uint32_t dst_write_mask, enum vkd3d_shader_component_type component_type, + SpvStorageClass storage_class, uint32_t write_mask, uint32_t val_id) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; unsigned int component_count, dst_component_count; @@ -4073,14 +4081,14 @@ static void spirv_compiler_emit_store(struct spirv_compiler *compiler, assert(write_mask); - component_count = vkd3d_write_mask_component_count(write_mask); - dst_component_count = vkd3d_write_mask_component_count(dst_write_mask); + component_count = vsir_write_mask_component_count(write_mask); + dst_component_count = vsir_write_mask_component_count(dst_write_mask); if (dst_component_count == 1 && component_count != 1) { type_id = vkd3d_spirv_get_type_id(builder, component_type, 1); val_id = vkd3d_spirv_build_op_composite_extract1(builder, type_id, val_id, - vkd3d_write_mask_get_component_idx(dst_write_mask)); + vsir_write_mask_get_component_idx(dst_write_mask)); write_mask &= dst_write_mask; component_count = 1; } @@ -4117,12 +4125,12 @@ static void spirv_compiler_emit_store(struct spirv_compiler *compiler, } static void spirv_compiler_emit_store_reg(struct spirv_compiler *compiler, - const struct vkd3d_shader_register *reg, unsigned int write_mask, uint32_t val_id) + const struct vkd3d_shader_register *reg, uint32_t write_mask, uint32_t val_id) { struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; enum vkd3d_shader_component_type component_type; struct vkd3d_shader_register_info reg_info; - unsigned int src_write_mask = write_mask; + uint32_t src_write_mask = write_mask; uint32_t type_id; assert(!register_is_constant_or_undef(reg)); @@ -4141,9 +4149,9 @@ static void spirv_compiler_emit_store_reg(struct spirv_compiler *compiler, if (component_type != reg_info.component_type) { if (reg->data_type == VKD3D_DATA_DOUBLE) - src_write_mask = vkd3d_write_mask_32_from_64(write_mask); + src_write_mask = vsir_write_mask_32_from_64(write_mask); type_id = vkd3d_spirv_get_type_id(builder, reg_info.component_type, - vkd3d_write_mask_component_count(src_write_mask)); + vsir_write_mask_component_count(src_write_mask)); val_id = vkd3d_spirv_build_op_bitcast(builder, type_id, val_id); component_type = reg_info.component_type; } @@ -4153,9 +4161,9 @@ static void spirv_compiler_emit_store_reg(struct spirv_compiler *compiler, } static uint32_t spirv_compiler_emit_sat(struct spirv_compiler *compiler, - const struct vkd3d_shader_register *reg, DWORD write_mask, uint32_t val_id) + const struct vkd3d_shader_register *reg, uint32_t write_mask, uint32_t val_id) { - unsigned int component_count = vkd3d_write_mask_component_count(write_mask); + unsigned int component_count = vsir_write_mask_component_count(write_mask); struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; uint32_t type_id, zero_id, one_id; @@ -4206,7 +4214,7 @@ static void spirv_compiler_emit_store_dst_components(struct spirv_compiler *comp const struct vkd3d_shader_dst_param *dst, enum vkd3d_shader_component_type component_type, uint32_t *component_ids) { - unsigned int component_count = vkd3d_write_mask_component_count(dst->write_mask); + unsigned int component_count = vsir_write_mask_component_count(dst->write_mask); struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; uint32_t type_id, val_id; @@ -4227,11 +4235,11 @@ static void spirv_compiler_emit_store_dst_scalar(struct spirv_compiler *compiler const struct vkd3d_shader_dst_param *dst, uint32_t val_id, enum vkd3d_shader_component_type component_type, DWORD swizzle) { - unsigned int component_count = vkd3d_write_mask_component_count(dst->write_mask); + unsigned int component_count = vsir_write_mask_component_count(dst->write_mask); uint32_t component_ids[VKD3D_VEC4_SIZE]; unsigned int component_idx, i; - component_idx = vkd3d_write_mask_get_component_idx(dst->write_mask); + component_idx = vsir_write_mask_get_component_idx(dst->write_mask); for (i = 0; i < component_count; ++i) { if (vkd3d_swizzle_get_component(swizzle, component_idx + i)) @@ -4771,7 +4779,7 @@ static uint32_t spirv_compiler_emit_input(struct spirv_compiler *compiler, enum vkd3d_shader_component_type component_type; const struct vkd3d_spirv_builtin *builtin; enum vkd3d_shader_sysval_semantic sysval; - unsigned int write_mask, reg_write_mask; + uint32_t write_mask, reg_write_mask; struct vkd3d_symbol *symbol = NULL; uint32_t val_id, input_id, var_id; uint32_t type_id, float_type_id; @@ -4813,8 +4821,8 @@ static uint32_t spirv_compiler_emit_input(struct spirv_compiler *compiler, else { component_type = signature_element->component_type; - input_component_count = vkd3d_write_mask_component_count(signature_element->mask); - component_idx = vkd3d_write_mask_get_component_idx(signature_element->mask); + input_component_count = vsir_write_mask_component_count(signature_element->mask); + component_idx = vsir_write_mask_get_component_idx(signature_element->mask); } if (needs_private_io_variable(builtin)) @@ -4824,7 +4832,7 @@ static uint32_t spirv_compiler_emit_input(struct spirv_compiler *compiler, } else { - component_idx = vkd3d_write_mask_get_component_idx(write_mask); + component_idx = vsir_write_mask_get_component_idx(write_mask); reg_write_mask = write_mask >> component_idx; } @@ -4980,7 +4988,7 @@ static void calculate_clip_or_cull_distance_mask(const struct signature_element return; } - write_mask = e->mask >> vkd3d_write_mask_get_component_idx(e->mask); + write_mask = e->mask >> vsir_write_mask_get_component_idx(e->mask); *mask |= (write_mask & VKD3DSP_WRITEMASK_ALL) << (VKD3D_VEC4_SIZE * e->semantic_index); } @@ -5118,7 +5126,7 @@ static void spirv_compiler_emit_output(struct spirv_compiler *compiler, const struct shader_signature *shader_signature; const struct vkd3d_spirv_builtin *builtin; enum vkd3d_shader_sysval_semantic sysval; - unsigned int write_mask, reg_write_mask; + uint32_t write_mask, reg_write_mask; bool use_private_variable = false; struct vkd3d_symbol reg_symbol; SpvStorageClass storage_class; @@ -5144,8 +5152,8 @@ static void spirv_compiler_emit_output(struct spirv_compiler *compiler, write_mask = signature_element->mask; - component_idx = vkd3d_write_mask_get_component_idx(write_mask); - output_component_count = vkd3d_write_mask_component_count(write_mask); + component_idx = vsir_write_mask_get_component_idx(write_mask); + output_component_count = vsir_write_mask_component_count(write_mask); if (builtin) { component_type = builtin->component_type; @@ -5285,9 +5293,9 @@ static uint32_t spirv_compiler_get_output_array_index(struct spirv_compiler *com static void spirv_compiler_emit_store_shader_output(struct spirv_compiler *compiler, const struct shader_signature *signature, const struct signature_element *output, const struct vkd3d_shader_output_info *output_info, - uint32_t output_index_id, uint32_t val_id, unsigned int write_mask) + uint32_t output_index_id, uint32_t val_id, uint32_t write_mask) { - unsigned int dst_write_mask, use_mask, uninit_mask, swizzle, mask; + uint32_t dst_write_mask, use_mask, uninit_mask, swizzle, mask; struct vkd3d_spirv_builder *builder = &compiler->spirv_builder; uint32_t type_id, zero_id, ptr_type_id, chain_id, object_id; const struct signature_element *element; @@ -5309,7 +5317,7 @@ static void spirv_compiler_emit_store_shader_output(struct spirv_compiler *compi use_mask |= element->used_mask; } } - index = vkd3d_write_mask_get_component_idx(output->mask); + index = vsir_write_mask_get_component_idx(output->mask); dst_write_mask >>= index; use_mask >>= index; write_mask &= dst_write_mask; @@ -5333,7 +5341,7 @@ static void spirv_compiler_emit_store_shader_output(struct spirv_compiler *compi output_info->component_type, VKD3D_VEC4_SIZE, 0); val_id = spirv_compiler_emit_vector_shuffle(compiler, zero_id, val_id, swizzle, uninit_mask, output_info->component_type, - vkd3d_write_mask_component_count(write_mask)); + vsir_write_mask_component_count(write_mask)); } else { @@ -5345,7 +5353,7 @@ static void spirv_compiler_emit_store_shader_output(struct spirv_compiler *compi if (output_index_id) { type_id = vkd3d_spirv_get_type_id(builder, - output_info->component_type, vkd3d_write_mask_component_count(dst_write_mask)); + output_info->component_type, vsir_write_mask_component_count(dst_write_mask)); ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, SpvStorageClassOutput, type_id); output_id = vkd3d_spirv_build_op_access_chain1(builder, ptr_type_id, output_id, output_index_id); } @@ -6553,7 +6561,7 @@ static void spirv_compiler_emit_default_control_point_phase(struct spirv_compile spirv_compiler_get_register_info(compiler, &output_reg, &output_reg_info); component_type = output->component_type; - component_count = vkd3d_write_mask_component_count(output->mask); + component_count = vsir_write_mask_component_count(output->mask); type_id = vkd3d_spirv_get_type_id(builder, component_type, component_count); output_ptr_type_id = vkd3d_spirv_get_op_type_pointer(builder, SpvStorageClassOutput, type_id); @@ -6788,7 +6796,7 @@ static enum vkd3d_result spirv_compiler_emit_alu_instruction(struct spirv_compil || instruction->handler_idx == VKD3DSIH_ISHR || instruction->handler_idx == VKD3DSIH_USHR)) { uint32_t mask_id = spirv_compiler_get_constant_vector(compiler, - VKD3D_SHADER_COMPONENT_UINT, vkd3d_write_mask_component_count(dst->write_mask), 0x1f); + VKD3D_SHADER_COMPONENT_UINT, vsir_write_mask_component_count(dst->write_mask), 0x1f); src_ids[1] = vkd3d_spirv_build_op_and(builder, type_id, src_ids[1], mask_id); } @@ -6918,7 +6926,7 @@ static void spirv_compiler_emit_mov(struct spirv_compiler *compiler, return; } - component_count = vkd3d_write_mask_component_count(dst->write_mask); + component_count = vsir_write_mask_component_count(dst->write_mask); if (component_count != 1 && component_count != VKD3D_VEC4_SIZE && dst_reg_info.write_mask == VKD3DSP_WRITEMASK_ALL) { @@ -6949,7 +6957,7 @@ general_implementation: if (dst->reg.data_type != src->reg.data_type) { val_id = vkd3d_spirv_build_op_bitcast(builder, vkd3d_spirv_get_type_id_for_data_type(builder, - dst->reg.data_type, vkd3d_write_mask_component_count(dst->write_mask)), val_id); + dst->reg.data_type, vsir_write_mask_component_count(dst->write_mask)), val_id); } spirv_compiler_emit_store_dst(compiler, dst, val_id); } @@ -6967,7 +6975,7 @@ static void spirv_compiler_emit_movc(struct spirv_compiler *compiler, src1_id = spirv_compiler_emit_load_src(compiler, &src[1], dst->write_mask); src2_id = spirv_compiler_emit_load_src(compiler, &src[2], dst->write_mask); - component_count = vkd3d_write_mask_component_count(dst->write_mask); + component_count = vsir_write_mask_component_count(dst->write_mask); type_id = spirv_compiler_get_type_id_for_dst(compiler, dst); if (src[0].reg.data_type != VKD3D_DATA_BOOL) @@ -6993,7 +7001,7 @@ static void spirv_compiler_emit_swapc(struct spirv_compiler *compiler, src1_id = spirv_compiler_emit_load_src(compiler, &src[1], dst->write_mask); src2_id = spirv_compiler_emit_load_src(compiler, &src[2], dst->write_mask); - component_count = vkd3d_write_mask_component_count(dst->write_mask); + component_count = vsir_write_mask_component_count(dst->write_mask); type_id = vkd3d_spirv_get_type_id(builder, VKD3D_SHADER_COMPONENT_FLOAT, component_count); condition_id = spirv_compiler_emit_int_to_bool(compiler, @@ -7016,7 +7024,7 @@ static void spirv_compiler_emit_dot(struct spirv_compiler *compiler, unsigned int component_count, i; DWORD write_mask; - component_count = vkd3d_write_mask_component_count(dst->write_mask); + component_count = vsir_write_mask_component_count(dst->write_mask); component_type = vkd3d_component_type_from_data_type(dst->reg.data_type); if (instruction->handler_idx == VKD3DSIH_DP4) @@ -7054,7 +7062,7 @@ static void spirv_compiler_emit_rcp(struct spirv_compiler *compiler, uint32_t type_id, src_id, val_id, div_id; unsigned int component_count; - component_count = vkd3d_write_mask_component_count(dst->write_mask); + component_count = vsir_write_mask_component_count(dst->write_mask); type_id = spirv_compiler_get_type_id_for_dst(compiler, dst); src_id = spirv_compiler_emit_load_src(compiler, src, dst->write_mask); @@ -7134,7 +7142,7 @@ static void spirv_compiler_emit_imad(struct spirv_compiler *compiler, uint32_t type_id, val_id, src_ids[3]; unsigned int i, component_count; - component_count = vkd3d_write_mask_component_count(dst->write_mask); + component_count = vsir_write_mask_component_count(dst->write_mask); type_id = vkd3d_spirv_get_type_id(builder, VKD3D_SHADER_COMPONENT_INT, component_count); for (i = 0; i < ARRAY_SIZE(src_ids); ++i) @@ -7168,7 +7176,7 @@ static void spirv_compiler_emit_int_div(struct spirv_compiler *compiler, if (dst[0].reg.type != VKD3DSPR_NULL) { - component_count = vkd3d_write_mask_component_count(dst[0].write_mask); + component_count = vsir_write_mask_component_count(dst[0].write_mask); type_id = spirv_compiler_get_type_id_for_dst(compiler, &dst[0]); src0_id = spirv_compiler_emit_load_src(compiler, &src[0], dst[0].write_mask); @@ -7190,7 +7198,7 @@ static void spirv_compiler_emit_int_div(struct spirv_compiler *compiler, { if (!component_count || dst[0].write_mask != dst[1].write_mask) { - component_count = vkd3d_write_mask_component_count(dst[1].write_mask); + component_count = vsir_write_mask_component_count(dst[1].write_mask); type_id = spirv_compiler_get_type_id_for_dst(compiler, &dst[1]); src0_id = spirv_compiler_emit_load_src(compiler, &src[0], dst[1].write_mask); @@ -7228,7 +7236,7 @@ static void spirv_compiler_emit_ftoi(struct spirv_compiler *compiler, * as a signed integer, but Direct3D expects the result to saturate, * and for NaN to yield zero. */ - component_count = vkd3d_write_mask_component_count(dst->write_mask); + component_count = vsir_write_mask_component_count(dst->write_mask); src_type_id = spirv_compiler_get_type_id_for_reg(compiler, &src->reg, dst->write_mask); dst_type_id = spirv_compiler_get_type_id_for_dst(compiler, dst); src_id = spirv_compiler_emit_load_src(compiler, src, dst->write_mask); @@ -7281,7 +7289,7 @@ static void spirv_compiler_emit_ftou(struct spirv_compiler *compiler, * as an unsigned integer, but Direct3D expects the result to saturate, * and for NaN to yield zero. */ - component_count = vkd3d_write_mask_component_count(dst->write_mask); + component_count = vsir_write_mask_component_count(dst->write_mask); src_type_id = spirv_compiler_get_type_id_for_reg(compiler, &src->reg, dst->write_mask); dst_type_id = spirv_compiler_get_type_id_for_dst(compiler, dst); src_id = spirv_compiler_emit_load_src(compiler, src, dst->write_mask); @@ -7468,7 +7476,7 @@ static void spirv_compiler_emit_comparison_instruction(struct spirv_compiler *co return; } - component_count = vkd3d_write_mask_component_count(dst->write_mask); + component_count = vsir_write_mask_component_count(dst->write_mask); src0_id = spirv_compiler_emit_load_src(compiler, &src[0], dst->write_mask); src1_id = spirv_compiler_emit_load_src(compiler, &src[1], dst->write_mask); @@ -8621,7 +8629,7 @@ static void spirv_compiler_emit_store_uav_raw_structured(struct spirv_compiler * assert(data->reg.data_type == VKD3D_DATA_UINT); val_id = spirv_compiler_emit_load_src(compiler, data, dst->write_mask); - component_count = vkd3d_write_mask_component_count(dst->write_mask); + component_count = vsir_write_mask_component_count(dst->write_mask); for (component_idx = 0; component_idx < component_count; ++component_idx) { data_id = component_count > 1 ? @@ -8650,7 +8658,7 @@ static void spirv_compiler_emit_store_uav_raw_structured(struct spirv_compiler * assert(data->reg.data_type == VKD3D_DATA_UINT); val_id = spirv_compiler_emit_load_src(compiler, data, dst->write_mask); - component_count = vkd3d_write_mask_component_count(dst->write_mask); + component_count = vsir_write_mask_component_count(dst->write_mask); for (component_idx = 0; component_idx < component_count; ++component_idx) { /* Mesa Vulkan drivers require the texel parameter to be a vector. */ @@ -8694,7 +8702,7 @@ static void spirv_compiler_emit_store_tgsm(struct spirv_compiler *compiler, assert(data->reg.data_type == VKD3D_DATA_UINT); val_id = spirv_compiler_emit_load_src(compiler, data, dst->write_mask); - component_count = vkd3d_write_mask_component_count(dst->write_mask); + component_count = vsir_write_mask_component_count(dst->write_mask); for (component_idx = 0; component_idx < component_count; ++component_idx) { data_id = component_count > 1 ? @@ -9356,7 +9364,7 @@ static void spirv_compiler_emit_eval_attrib(struct spirv_compiler *compiler, } type_id = vkd3d_spirv_get_type_id(builder, VKD3D_SHADER_COMPONENT_FLOAT, - vkd3d_write_mask_component_count(register_info.write_mask)); + vsir_write_mask_component_count(register_info.write_mask)); instr_set_id = vkd3d_spirv_get_glsl_std450_instr_set(builder); val_id = vkd3d_spirv_build_op_ext_inst(builder, type_id, instr_set_id, op, src_ids, src_count); @@ -9977,11 +9985,28 @@ static int spirv_compiler_generate_spirv(struct spirv_compiler *compiler, if (!vkd3d_spirv_compile_module(builder, spirv, spirv_compiler_get_entry_point_name(compiler))) return VKD3D_ERROR; - if (TRACE_ON()) + if (TRACE_ON() || parser->config_flags & VKD3D_SHADER_CONFIG_FLAG_FORCE_VALIDATION) { enum vkd3d_shader_spirv_environment environment = spirv_compiler_get_target_environment(compiler); - vkd3d_spirv_dump(spirv, environment); - vkd3d_spirv_validate(spirv, environment); + struct vkd3d_string_buffer buffer; + + if (TRACE_ON()) + vkd3d_spirv_dump(spirv, environment); + + vkd3d_string_buffer_init(&buffer); + if (!vkd3d_spirv_validate(&buffer, spirv, environment)) + { + FIXME("Failed to validate SPIR-V binary.\n"); + vkd3d_shader_trace_text(buffer.buffer, buffer.content_size); + + if (compiler->config_flags & VKD3D_SHADER_CONFIG_FLAG_FORCE_VALIDATION) + { + spirv_compiler_error(compiler, VKD3D_SHADER_ERROR_SPV_INVALID_SHADER, + "Execution generated an invalid shader, failing compilation:\n%s", + buffer.buffer); + } + } + vkd3d_string_buffer_cleanup(&buffer); } if (compiler->failed) @@ -10008,7 +10033,7 @@ int spirv_compile(struct vkd3d_shader_parser *parser, int ret; if (!(spirv_compiler = spirv_compiler_create(&parser->shader_version, &parser->shader_desc, - compile_info, scan_descriptor_info, message_context, &parser->location))) + compile_info, scan_descriptor_info, message_context, &parser->location, parser->config_flags))) { ERR("Failed to create SPIR-V compiler.\n"); return VKD3D_ERROR; diff --git a/libs/vkd3d/libs/vkd3d-shader/tpf.c b/libs/vkd3d/libs/vkd3d-shader/tpf.c index 1b009c13016..235e855223f 100644 --- a/libs/vkd3d/libs/vkd3d-shader/tpf.c +++ b/libs/vkd3d/libs/vkd3d-shader/tpf.c @@ -920,10 +920,11 @@ static void shader_sm4_read_dcl_index_range(struct vkd3d_shader_instruction *ins uint32_t opcode_token, const uint32_t *tokens, unsigned int token_count, struct vkd3d_shader_sm4_parser *priv) { struct vkd3d_shader_index_range *index_range = &ins->declaration.index_range; - unsigned int i, register_idx, register_count, write_mask; + unsigned int i, register_idx, register_count; enum vkd3d_shader_register_type type; struct sm4_index_range_array *ranges; unsigned int *io_masks; + uint32_t write_mask; shader_sm4_read_dst_param(priv, &tokens, &tokens[token_count], VKD3D_DATA_OPAQUE, &index_range->dst); @@ -933,7 +934,7 @@ static void shader_sm4_read_dcl_index_range(struct vkd3d_shader_instruction *ins register_count = index_range->register_count; write_mask = index_range->dst.write_mask; - if (vkd3d_write_mask_component_count(write_mask) != 1) + if (vsir_write_mask_component_count(write_mask) != 1) { WARN("Unhandled write mask %#x.\n", write_mask); vkd3d_shader_parser_warning(&priv->p, VKD3D_SHADER_WARNING_TPF_UNHANDLED_INDEX_RANGE_MASK, @@ -2230,7 +2231,7 @@ static bool shader_sm4_read_dst_param(struct vkd3d_shader_sm4_parser *priv, cons } if (data_type == VKD3D_DATA_DOUBLE) - dst_param->write_mask = vkd3d_write_mask_64_from_32(dst_param->write_mask); + dst_param->write_mask = vsir_write_mask_64_from_32(dst_param->write_mask); /* Some scalar registers are declared with no write mask in shader bytecode. */ if (!dst_param->write_mask && shader_sm4_is_scalar_register(&dst_param->reg)) dst_param->write_mask = VKD3DSP_WRITEMASK_0; diff --git a/libs/vkd3d/libs/vkd3d-shader/vkd3d_shader_private.h b/libs/vkd3d/libs/vkd3d-shader/vkd3d_shader_private.h index 0e8d75d9897..6fa57a111bb 100644 --- a/libs/vkd3d/libs/vkd3d-shader/vkd3d_shader_private.h +++ b/libs/vkd3d/libs/vkd3d-shader/vkd3d_shader_private.h @@ -96,6 +96,7 @@ enum vkd3d_shader_error VKD3D_SHADER_ERROR_SPV_INVALID_TYPE = 2006, VKD3D_SHADER_ERROR_SPV_INVALID_HANDLER = 2007, VKD3D_SHADER_ERROR_SPV_NOT_IMPLEMENTED = 2008, + VKD3D_SHADER_ERROR_SPV_INVALID_SHADER = 2009, VKD3D_SHADER_WARNING_SPV_INVALID_SWIZZLE = 2300, @@ -1515,7 +1516,7 @@ static inline enum vkd3d_shader_input_sysval_semantic vkd3d_siv_from_sysval(enum return vkd3d_siv_from_sysval_indexed(sysval, 0); } -static inline unsigned int vkd3d_write_mask_get_component_idx(DWORD write_mask) +static inline unsigned int vsir_write_mask_get_component_idx(uint32_t write_mask) { unsigned int i; @@ -1530,7 +1531,7 @@ static inline unsigned int vkd3d_write_mask_get_component_idx(DWORD write_mask) return 0; } -static inline unsigned int vkd3d_write_mask_component_count(DWORD write_mask) +static inline unsigned int vsir_write_mask_component_count(uint32_t write_mask) { unsigned int count = vkd3d_popcount(write_mask & VKD3DSP_WRITEMASK_ALL); assert(1 <= count && count <= VKD3D_VEC4_SIZE); @@ -1543,15 +1544,15 @@ static inline unsigned int vkd3d_write_mask_from_component_count(unsigned int co return (VKD3DSP_WRITEMASK_0 << component_count) - 1; } -static inline unsigned int vkd3d_write_mask_64_from_32(DWORD write_mask32) +static inline uint32_t vsir_write_mask_64_from_32(uint32_t write_mask32) { - unsigned int write_mask64 = write_mask32 | (write_mask32 >> 1); + uint32_t write_mask64 = write_mask32 | (write_mask32 >> 1); return (write_mask64 & VKD3DSP_WRITEMASK_0) | ((write_mask64 & VKD3DSP_WRITEMASK_2) >> 1); } -static inline unsigned int vkd3d_write_mask_32_from_64(unsigned int write_mask64) +static inline uint32_t vsir_write_mask_32_from_64(uint32_t write_mask64) { - unsigned int write_mask32 = (write_mask64 | (write_mask64 << 1)) + uint32_t write_mask32 = (write_mask64 | (write_mask64 << 1)) & (VKD3DSP_WRITEMASK_0 | VKD3DSP_WRITEMASK_2); return write_mask32 | (write_mask32 << 1); } diff --git a/libs/vkd3d/libs/vkd3d/state.c b/libs/vkd3d/libs/vkd3d/state.c index fc3187f4bea..9a039452c99 100644 --- a/libs/vkd3d/libs/vkd3d/state.c +++ b/libs/vkd3d/libs/vkd3d/state.c @@ -515,7 +515,7 @@ static HRESULT d3d12_root_signature_init_push_constants(struct d3d12_root_signat assert(p->ShaderVisibility <= D3D12_SHADER_VISIBILITY_PIXEL); push_constants[p->ShaderVisibility].stageFlags = use_vk_heaps ? VK_SHADER_STAGE_ALL : stage_flags_from_visibility(p->ShaderVisibility); - push_constants[p->ShaderVisibility].size += p->u.Constants.Num32BitValues * sizeof(uint32_t); + push_constants[p->ShaderVisibility].size += align(p->u.Constants.Num32BitValues, 4) * sizeof(uint32_t); } if (push_constants[D3D12_SHADER_VISIBILITY_ALL].size) { @@ -564,7 +564,7 @@ static HRESULT d3d12_root_signature_init_push_constants(struct d3d12_root_signat idx = push_constant_count == 1 ? 0 : p->ShaderVisibility; offset = push_constants_offset[idx]; - push_constants_offset[idx] += p->u.Constants.Num32BitValues * sizeof(uint32_t); + push_constants_offset[idx] += align(p->u.Constants.Num32BitValues, 4) * sizeof(uint32_t); root_signature->parameters[i].parameter_type = p->ParameterType; root_constant->stage_flags = push_constant_count == 1 -- 2.43.0