Francisco Casas 98b5eb474a vkd3d-shader/tpf: Don't pass 0x4 as mask for vec4 constant src registers. ...

Co-authored-by: Evan Tang <etang@codeweavers.com>

Evan Tang reported that new fixmes appeared on the shader_runner when
running some of his tests after
f50d0ae2cbc5ee2a26fedd7b8aac2def62decd6c.

    vkd3d:652593:fixme:shader_sm4_read_src_param Unhandled mask 0x4.

The change to blame seems to be this added line in
sm4_src_from_constant_value().

    +    src->swizzle = VKD3D_SHADER_NO_SWIZZLE;

On tpf binaries the last 12 bits of each src register in an instruction
specify the swizzle, and there are 5 possible combinations:

    Dimension NONE
    -------- 00

    Dimension SCALAR
    -------- 01

    Dimension VEC4, with a 4 bit writemask:
    ---- xxxx 00 01

    Dimension VEC4, with an 8 bit swizzle:
    xx xx xx xx 01 01

    Dimension VEC4, with a 2bit scalar dimension number:
    ------ xx 10 01

So far, we have only seen src registers use 4 bit writemasks in a
single case: for vec4 constants, and it is always zero.

So we expect this:

    ---- 0000 00 01

Now, I probably wanted to initialize src->swizzle to zero when writing
constants, but VKD3D_SHADER_NO_SWIZZLE is not zero, it is actually the
default swizzle:

    11 10 01 00

And the last 4 bits (0x4) get written in the mask part, which causes
the reader to complain.

2023-11-06 23:09:10 +01:00

..

vkd3d

vkd3d: Add partial implementation for CreateCommittedResource1().

2023-10-10 22:11:46 +02:00

vkd3d-common

vkd3d: Use CONST_VTABLE.

2023-10-02 22:25:14 +02:00

vkd3d-shader

vkd3d-shader/tpf: Don't pass 0x4 as mask for vec4 constant src registers.

2023-11-06 23:09:10 +01:00

vkd3d-utils

vkd3d-utils: Implement D3DStripShader().

2023-10-19 23:07:50 +02:00

.gitignore

libs/vkd3d: Trace build version.

2018-06-27 22:43:49 +02:00