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vkd3d-1.16
Commit Graph

817 Commits

Author SHA1 Message Date
Elizabeth Figura
c1adf54a44 vkd3d-shader/hlsl: Forbid referring to typedefs with "struct". 2025-05-14 15:09:48 +02:00
Elizabeth Figura
8ca50a2f7e tests/hlsl: Add more tests for struct syntax. 2025-05-14 15:09:42 +02:00
Elizabeth Figura
e16176672a vkd3d-shader/hlsl: Validate "numthreads" attribute values. 2025-05-14 14:56:42 +02:00
Elizabeth Figura
cfb59828f3 tests/hlsl: Add more tests for the "numthreads" attribute. 2025-05-14 14:56:42 +02:00
Elizabeth Figura
a06b9f6646 vkd3d-shader/hlsl: Do not emit HLSL_OP1_ABS for unsigned types. 2025-05-14 14:55:59 +02:00
Elizabeth Figura
4a5411aa6e vkd3d-shader/hlsl: Return a uint1 from GetRenderTargetSampleCount(). 2025-05-12 15:29:23 +02:00
Elizabeth Figura
4cdea712d0 tests/hlsl: Show that GetRenderTargetSampleCount() returns a vector. 2025-05-12 15:28:49 +02:00
Nikolay Sivov
5d5d892830 vkd3d-shader/fx: Use the same BlendState states description for both fx_4_1 and fx_5_0. 
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
 2025-05-06 18:58:03 +02:00
Nikolay Sivov
d660a0d2ae tests: Add a fx_4_1 compilation test for the BlendState states. 
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
 2025-05-06 18:58:03 +02:00
Francisco Casas
7b07d77396 ci: Update the DXC version used on the CI to 1.8.2502. 2025-05-06 18:39:02 +02:00
Shaun Ren
5b06fe83df vkd3d-shader/hlsl: Generate vsir instructions for stream output operations. 2025-05-05 14:54:07 +02:00
Shaun Ren
c8c1e270e0 vkd3d-shader/hlsl: Validate maximum output size in geometry shaders. 2025-05-05 14:43:53 +02:00
Francisco Casas
e6db0ab614 tests: Add tests for DeviceMemoryBarrierWithGroupSync(). 2025-05-05 14:27:35 +02:00
Francisco Casas
b89f0bc730 vkd3d-shader/hlsl: Generate vsir for HLSL_IR_SYNC operations. 
The following table shows how each intrinsic maps to d3d assembly and the
flags that appear in the tpf bytecode, in binary.

    GroupMemoryBarrier()                   sync_g               0010
    GroupMemoryBarrierWithGroupSync()      sync_g_t             0011
    DeviceMemoryBarrier()                  sync_uglobal         1000
    DeviceMemoryBarrierWithGroupSync()     sync_uglobal_t       1001
    AllMemoryBarrier()                     sync_uglobal_g       1010
    AllMemoryBarrierWithGroupSync()        sync_uglobal_g_t     1011
 2025-05-05 14:17:47 +02:00
Francisco Casas
758a4bef09 vkd3d-shader/hlsl: Parse barriers. 
And introduce hlsl_ir_sync to represent them.
 2025-05-05 14:15:14 +02:00
Conor McCarthy
4c8c31fa2e tests/hlsl: Add a shader model 5.1 test to srv-byteaddressbuffer.shader_test. 
Some code paths for TPF handling are not tested if no 5.1 shaders are
compiled.
 2025-04-23 18:11:42 +02:00
Shaun Ren
5d29554fed tests/hlsl: Add geometry shader stream output syntax tests. 2025-04-23 18:03:59 +02:00
Giovanni Mascellani
a189a4cfb7 tests/hlsl: Do not test the implicit passthrough control point phase for SM6. 2025-04-16 16:43:45 +02:00
Giovanni Mascellani
dbd1938ce4 tests/hlsl: Fix the precision for a 16-bit arithmetic test. 2025-04-16 16:42:20 +02:00
Giovanni Mascellani
3186d66596 tests/hlsl: Do not test dst() on integer arguments with SM6. 
That seems to hit a DXC bug we're not interested into.
 2025-04-16 16:36:58 +02:00
Giovanni Mascellani
9db9f3bdaf tests/hlsl: Do not test 16-bit out-of-bound varyings. 2025-04-16 16:35:23 +02:00
Giovanni Mascellani
26656808e6 tests/hlsl: Remove a test in which a function reads an "out" argument. 
The code doesn't make sense in the first place, even if it's
accepted by the compiler, so it makes sense that the behaviour
is undefined. And indeed the behaviour is different on AMD (4 is
returned), NVIDIA (QNaN is returned) and WARP (device is removed).
 2025-04-16 16:30:19 +02:00
Giovanni Mascellani
df1aecb7bd tests/hlsl: Do not test 16-bit out-of-bound UAV writes. 2025-04-16 16:28:42 +02:00
Giovanni Mascellani
0ac661f571 tests/hlsl: Do not test 16-bit out-of-bound SRV buffer reads. 
They do not behave consistently between AMD, NVIDIA and WARP, so
there is little point enforcing a specific behaviour.
 2025-04-16 16:25:26 +02:00
Giovanni Mascellani
4412a83655 tests: Create structured buffers with the appropriate stride. 
The stride didn't match the structure size used in the shader.

This didn't seem to be a problem on AMD and WARP, but it was
on NVIDIA on Windows. Specifically, it seems that the buffer
is read using the shader structure size (so most tests pass),
but bounds are checked using the buffer stride, so a test
returned zero simply because an out-of-bounds read was detected.
 2025-04-14 15:56:01 +02:00