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77 Commits

Author SHA1 Message Date
Giovanni Mascellani
b0c8a47f9d vkd3d-shader/ir: Check that SSA registers are used validly. 
Specifically, they are assigned only once and only assigned components
are used.

Right now we don't check that the assignment dominates all usages.
 2024-01-15 19:57:01 +01:00
Giovanni Mascellani
26bebe8f91 vkd3d-shader/ir: Check that SSA registers have consistent dimensions. 2024-01-15 19:57:00 +01:00
Giovanni Mascellani
7503429555 vkd3d-shader/ir: Check that TEMP registers have consistent dimensions. 2024-01-15 19:56:59 +01:00
Giovanni Mascellani
fbd77486de vkd3d-shader/ir: Use vkd3d_free() instead of free(). 2024-01-15 19:56:58 +01:00
Giovanni Mascellani
26c6a87268 vkd3d-shader/ir: Simplify control flow in vsir_validate_register(). 2024-01-15 19:56:56 +01:00
Giovanni Mascellani
78d95889bd vkd3d-shader: Make *src and *dst mutable in vkd3d_shader_instruction. 
They were originally made const because no optimization/normalization
pass existed. Now having to cast away const all the time is becoming
more and more burdening.
 2024-01-11 23:05:11 +01:00
Giovanni Mascellani
bd9118cac4 vkd3d-shader/ir: Validate destination write masks depending on the dimension. 2024-01-04 22:23:25 +01:00
Giovanni Mascellani
15e7711786 vkd3d-shader/ir: Validate source swizzles depending on the dimension. 2024-01-04 22:23:24 +01:00
Giovanni Mascellani
e91da41dea vkd3d-shader/ir: Validate SSA registers. 2024-01-04 22:23:23 +01:00
Zebediah Figura
1ce7e3d8b1 vkd3d-shader/d3dbc: Assign unique register indices for VKD3DSPR_RASTOUT. 2024-01-04 22:23:09 +01:00
Zebediah Figura
3f52fda8ad vkd3d-shader: Lower shader model 1/2 inter-stage I/O to a flat array. 
An alternative is that we stash the reg_type in the signature, but this seems
far simpler for the backend to deal with.
 2024-01-04 22:23:07 +01:00
Henri Verbeet
e33d3b3954 vkd3d-shader/ir: Rename the "immconst_uint" field of struct vkd3d_shader_register to "immconst_u32". 
For consistency with the rest of vkd3d-shader; e.g. put_u32() and
read_u32().
 2024-01-03 22:37:39 +01:00
Henri Verbeet
8a1de71fb1 vkd3d-shader/ir: Pass a uint32_t swizzle to vkd3d_swizzle_get_component(). 2023-12-14 23:19:49 +01:00
Henri Verbeet
713adaa56a vkd3d-shader/ir: Pass a uint32_t write mask to vkd3d_write_mask_component_count(). 2023-12-13 22:33:04 +01:00
Henri Verbeet
e1aa12f94b vkd3d-shader/ir: Pass a uint32_t write mask to vkd3d_write_mask_get_component_idx(). 2023-12-13 22:33:03 +01:00
Conor McCarthy
45679a966c vkd3d-shader/ir: Pass a local copy of location to control_point_normaliser_emit_hs_input(). 2023-12-07 21:57:49 +01:00
Conor McCarthy
b5c067b41a vkd3d-shader/ir: Do not merge signature elements which have different interpolation modes. 
Regression in signature normalisation, however the old code was not
correct either because it would apply the interpolation mode to all
components. Found in an Assassin's Creed: Valhalla shader.
 2023-12-06 15:31:18 +01:00
Conor McCarthy
eb05e434ff vkd3d-shader/dxil: Implement the DXIL LOAD instruction. 2023-11-22 22:07:59 +01:00
Conor McCarthy
59730ecfd8 vkd3d-shader/dxil: Implement the DXIL GEP instruction. 2023-11-22 22:07:58 +01:00
Giovanni Mascellani
b1123ed35f vkd3d-shader/ir: Correctly compute the TEMP count after hull shader flattening. 
The previous computation was incorrect because the count was taken
after resetting it to zero (as part of setting the instruction to NOP).
 2023-11-20 22:07:41 +01:00
Giovanni Mascellani
5cb17cfd1c vkd3d-shader/ir: Validate IFC instructions. 2023-11-20 22:07:36 +01:00
Giovanni Mascellani
849a8f3add vkd3d-shader/ir: Expect two sources for LOOP in SM1-3. 2023-11-20 22:07:35 +01:00
Giovanni Mascellani
0c5c18bdce vkd3d-shader/ir: Validate index count for IMMCONST64 registers. 2023-11-09 21:15:51 +01:00
Giovanni Mascellani
b74470b9d2 vkd3d-shader/ir: Validate index count for IMMCONST registers. 2023-11-09 21:15:49 +01:00
Giovanni Mascellani
c867682982 vkd3d-shader/ir: Validate index count for NULL registers. 2023-11-09 21:15:47 +01:00
Giovanni Mascellani
12fcb8dcc6 vkd3d-shader/ir: Validate register indices. 2023-11-09 21:15:44 +01:00
Giovanni Mascellani
b7aeb5dd70 vkd3d-shader/ir: Use vsir_register_init() to initialize a register. 2023-11-09 21:15:42 +01:00
Giovanni Mascellani
a869069a48 vkd3d-shader/ir: Validate the TEMP register indices in each HS phase. 2023-11-09 21:15:40 +01:00
Giovanni Mascellani
0f4bda9c9d vkd3d-shader/ir: Keep track of hull shader phases. 2023-11-09 21:15:38 +01:00
Conor McCarthy
5768c019c1 vkd3d-shader/ir: Check the handler before changing it to NOP in remove_dead_code(). 2023-11-09 21:15:29 +01:00
Zebediah Figura
c7a7d9a18c vkd3d-shader/ir: Normalize all I/O registers to INPUT/OUTPUT/PATCHCONST. 
Specifically, map COLOROUT to OUTPUT, and map INCONTROLPOINT to INPUT for domain
shaders as well as hull shaders.

Obscure the non-existent differences from the view of the backend.
 2023-11-09 21:14:52 +01:00
Zebediah Figura
852eefc01d vkd3d-shader/ir: Synthesize HS inputs with the register index and write mask of the signature element. 
This pass was written as if to output normalized I/O, but it runs before the I/O
normalization pass.

Fixes: 98b5e2c6e0
 2023-11-07 22:26:53 +01:00
Zebediah Figura
12240efa79 vkd3d-shader/spirv: Use register counts from the signature and shader desc. 2023-11-07 22:26:49 +01:00
Giovanni Mascellani
7d49f9637a vkd3d-shader/ir: Check that SWITCH blocks are correctly nested. 2023-11-07 22:26:05 +01:00
Giovanni Mascellani
93632fb407 vkd3d-shader/ir: Check that REP blocks are correctly nested. 2023-11-07 22:26:04 +01:00
Giovanni Mascellani
92c36615ed vkd3d-shader/ir: Check that LOOP blocks are correctly nested. 2023-11-07 22:26:03 +01:00
Giovanni Mascellani
2f7d52dba4 vkd3d-shader/ir: Check that IF blocks are correctly nested. 2023-11-07 22:26:01 +01:00
Giovanni Mascellani
0a7e200f89 vkd3d-shader/ir: Do not enfore DCL_TEMPS count for hull shaders. 
Hull shaders have a different temps count for each phase, and the
parser only reports the count for the patch constant phase.
In order to properly check for temps count on hull shaders, we first
need to decode its phases.
 2023-11-07 22:26:00 +01:00
Giovanni Mascellani
ca3f594ae3 vkd3d-shader/ir: Emit an ERR() on validation errors. 2023-11-07 22:25:58 +01:00
Zebediah Figura
b73d2c978d vkd3d-shader/ir: Check for vocp usage during IR normalization. 
The hull shader barrier used for this was broken by I/O normalization, since
vocp is no longer exposed to the spirv backend.

Restore this barrier by checking for vocp during normalization instead.
 2023-11-06 23:07:56 +01:00
Zebediah Figura
8b42f523f2 vkd3d-shader/ir: Pass a vkd3d_shader_parser to instruction_array_normalise_io_registers(). 2023-11-06 23:07:54 +01:00
Giovanni Mascellani
af72466db1 vkd3d-shader/ir: Validate the index of a TEMP register. 2023-11-02 18:22:52 +01:00
Giovanni Mascellani
4140b87499 vkd3d-shader/ir: Validate the DCL_TEMPS instruction. 2023-11-02 18:22:50 +01:00
Giovanni Mascellani
79fa5fd8bb vkd3d-shader/ir: Validate the register index count. 2023-11-02 18:22:49 +01:00
Giovanni Mascellani
26e4191d4b vkd3d-shader/ir: Validate the register dimension. 2023-11-02 18:22:47 +01:00
Giovanni Mascellani
f3a20be35a vkd3d-shader/ir: Validate the register data type. 2023-11-02 18:22:38 +01:00
Giovanni Mascellani
72d0f765f2 vkd3d-shader/ir: Validate the register precision. 2023-11-02 18:22:37 +01:00
Zebediah Figura
15b69721de vkd3d-shader/tpf: Set the interpolation mode for signature elements. 2023-10-31 21:59:38 +01:00
Zebediah Figura
6a942581db vkd3d-shader/ir: Translate TEX instructions to SAMPLE. 2023-10-09 21:58:40 +02:00
Francisco Casas
e904660497 vkd3d-shader: Turn vkd3d_shader_register.immconst_type into vkd3d_shader_register.dimension. 2023-09-26 22:07:04 +02:00