Similarly to the already done split from
HLSL IR -> d3dbc
to
HLSL IR -> vsir -> d3bc
we now start splitting the
HLSL IR -> tpf
translation into
HLSL IR -> vsir -> tpf
So hlsl_sm4_write is split into two functions, sm4_generate_vsir() and
tpf_compile().
This translation should be completed once tpf_compile() no longer needs
the hlsl_ctx and entry_func parameters.
Specifically we should write the sysval semantic as an instruction idx
for the following instructions:
VKD3D_SM4_OP_DCL_INPUT_SGV
VKD3D_SM4_OP_DCL_INPUT_PS_SGV
VKD3D_SM4_OP_DCL_INPUT_SIV
VKD3D_SM4_OP_DCL_INPUT_PS_SIV
VKD3D_SM4_OP_DCL_OUTPUT_SIV
and not the following ones:
VKD3D_SM4_OP_DCL_INPUT
VKD3D_SM4_OP_DCL_PS_INPUT
VKD3D_SM4_OP_DCL_OUTPUT
Which is consistent with what we do when reading these instructions in
the following functions:
shader_sm4_read_declaration_register_semantic()
shader_sm4_read_dcl_input_ps_siv()
and
shader_sm4_read_dcl_input_ps()
shader_sm4_read_declaration_dst()
for the non-SGV and non-SIV cases.
Note that the non-SGV and non-SIV instructions don't need/use this
extra information because they rely on the dst register type and index.
I suggest to introduce this change because the here replaced check is
brittle, and we might be omitting the sysval semantic in some cases.
The primary goal here is to move compilation profile type and version
check outside of a parsing stage. Default values for parameters were
never subjected to this fixup, and it does look tpf-specific, so moving
it where it belongs.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
