128 Commits

Author SHA1 Message Date
Henri Verbeet
3759186193 vkd3d-shader/ir: Pass a uint32_t write mask to vkd3d_write_mask_64_from_32(). 2023-12-13 22:33:06 +01:00
Henri Verbeet
713adaa56a vkd3d-shader/ir: Pass a uint32_t write mask to vkd3d_write_mask_component_count(). 2023-12-13 22:33:04 +01:00
Zebediah Figura
cabf9996f9 vkd3d-shader/tpf: Do not uninvert used masks for domain shader patch constants. 2023-12-11 23:18:42 +01:00
Conor McCarthy
cb88844a3d vkd3d-shader: Add a register index to struct vkd3d_shader_immediate_constant_buffer. 2023-12-07 21:56:47 +01:00
Conor McCarthy
ffae57eb8d vkd3d-shader/dxil: Support null constant arrays. 2023-12-07 21:56:43 +01:00
Nikolay Sivov
6a4a9a4518 vkd3d-shader/hlsl: Handle 'linear centroid' modifier. 2023-11-28 00:10:12 +01:00
Zebediah Figura
10957bebbf vkd3d-shader/tpf: Remove an unnecessary local variable declaration.
Found with -Wshadow.
2023-11-28 00:09:56 +01:00
Conor McCarthy
85d5f83fb7 vkd3d-shader/dxil: Implement default address space global variables. 2023-11-22 22:07:54 +01:00
Nikolay Sivov
88caf87789 vkd3d-shader/hlsl: Add a helper to check for a numeric type. 2023-11-15 21:48:49 +01:00
Henri Verbeet
215a2c4ede vkd3d-shader/ir: Introduce vsir_register_is_descriptor(). 2023-11-13 23:19:10 +01:00
Conor McCarthy
22960753e9 vkd3d-shader/spirv: Introduce orderedness to comparison instructions. 2023-11-10 20:23:51 +01:00
Nikolay Sivov
dd6a9135f4 vkd3d-shader/hlsl: Implement tex2Dproj().
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-10 20:23:41 +01:00
Nikolay Sivov
494f681bf6 vkd3d-shader/tpf: Add support for ceil().
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-11-08 22:49:38 +01:00
Zebediah Figura
0058764f01 vkd3d-shader: Store the control point counts in struct vkd3d_shader_desc. 2023-11-07 22:26:49 +01:00
Francisco Casas
0ef25ad137 vkd3d-shader/tpf: Support relative addressing for indexable temps in SM4.
For relative addressing, the vkd3d_shader_registers must point to
another vkd3d_shader_src_param. For now, use the sm4_instruction to save
them, since the only purpose of this struct is to be used as paramter
for write_sm4_instruction.
2023-11-07 22:25:49 +01:00
Francisco Casas
281796c526 vkd3d-shader/tpf: Move sm4_register_from_node() up. 2023-11-07 22:25:48 +01:00
Francisco Casas
e10d41d799 vkd3d-shader/tpf: Support writing relative addressing indexes. 2023-11-07 22:25:47 +01:00
Francisco Casas
617a20bffc vkd3d-shader/tpf: Write register index addressing. 2023-11-07 22:25:45 +01:00
Francisco Casas
043526a9f7 vkd3d-shader/tpf: Encode dst and src registers using the same function.
This function will also be required to encode rel_addr registers.
2023-11-07 22:25:44 +01:00
Henri Verbeet
aa5380f32a vkd3d-shader/tpf: Do not write RDEF constant buffer entries for HLSL_CLASS_OBJECT variables.
RWBuffer objects would trigger a vkd3d_unreachable() in sm4_base_type().
It would be easy enough to add the required case there, but (manual,
unfortunately) tests show that we aren't supposed to write constant
buffer entries for objects in the first place, as you'd expect.

This particular path ends up being exercised by vkd3d's internal UAV
clear shaders, but unfortunately it looks like our RDEF data may have
more issues; the ability to write tests for it would seem helpful.
2023-11-06 23:09:47 +01:00
Francisco Casas
98b5eb474a vkd3d-shader/tpf: Don't pass 0x4 as mask for vec4 constant src registers.
Co-authored-by: Evan Tang <etang@codeweavers.com>

Evan Tang reported that new fixmes appeared on the shader_runner when
running some of his tests after
f50d0ae2cbc5ee2a26fedd7b8aac2def62decd6c.

    vkd3d:652593:fixme:shader_sm4_read_src_param Unhandled mask 0x4.

The change to blame seems to be this added line in
sm4_src_from_constant_value().

    +    src->swizzle = VKD3D_SHADER_NO_SWIZZLE;

On tpf binaries the last 12 bits of each src register in an instruction
specify the swizzle, and there are 5 possible combinations:

    Dimension NONE
    -------- 00

    Dimension SCALAR
    -------- 01

    Dimension VEC4, with a 4 bit writemask:
    ---- xxxx 00 01

    Dimension VEC4, with an 8 bit swizzle:
    xx xx xx xx 01 01

    Dimension VEC4, with a 2bit scalar dimension number:
    ------ xx 10 01

So far, we have only seen src registers use 4 bit writemasks in a
single case: for vec4 constants, and it is always zero.

So we expect this:

    ---- 0000 00 01

Now, I probably wanted to initialize src->swizzle to zero when writing
constants, but VKD3D_SHADER_NO_SWIZZLE is not zero, it is actually the
default swizzle:

    11 10 01 00

And the last 4 bits (0x4) get written in the mask part, which causes
the reader to complain.
2023-11-06 23:09:10 +01:00
Giovanni Mascellani
26e4191d4b vkd3d-shader/ir: Validate the register dimension. 2023-11-02 18:22:47 +01:00
Zebediah Figura
15b69721de vkd3d-shader/tpf: Set the interpolation mode for signature elements. 2023-10-31 21:59:38 +01:00
Francisco Casas
eef2163375 vkd3d-shader/tpf: Declare indexable temps.
If var->indexable, then the variable is given a unique register number,
regardless of its lifetime.
2023-10-31 21:59:22 +01:00
Nikolay Sivov
bc2a4ee66a vkd3d-shader/tpf: Write out 'switch' statements.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
2023-10-31 21:59:05 +01:00