d6d6f37578
vkd3d-shader/hlsl: Migrate SM4 control flow instructions to the vsir program.
...
Translate the instructions that contain hlsl_blocks. Also move
other control flow instructions such as HS_CONTROL_POINT_PHASE and
RET to the vsir_program so that we can directly iterate over it now.
2024-11-27 13:02:53 +01:00
81fa4d45b9
vkd3d-shader/tpf: Apply extra bits to all conditional ops.
2024-11-27 12:54:27 +01:00
28ad600b43
vkd3d-shader/hlsl: Store SM4 jumps in the vsir program.
2024-11-27 12:54:15 +01:00
4f549155c5
vkd3d-shader/hlsl: Store SM4 HLSL_RESOURCE_RESINFOs in the vsir program.
2024-11-24 00:01:03 +01:00
c89f503604
vkd3d-shader/hlsl: Store SM4 HLSL_RESOURCE_SAMPLE_INFOs in the vsir program.
2024-11-24 00:00:46 +01:00
4382af6e1b
vkd3d-shader/hlsl: Store SM4 HLSL_RESOURCE_GATHERs in the vsir program.
2024-11-23 23:55:07 +01:00
42ce821603
vkd3d-shader/hlsl: Store SM4 HLSL_RESOURCE_SAMPLEs in the vsir program.
2024-11-23 23:52:24 +01:00
52b81f42eb
vkd3d-shader/hlsl: Store SM4 HLSL_RESOURCE_LOADs in the vsir program.
2024-11-23 23:49:57 +01:00
1ed8d907b3
vkd3d-shader/ir: Keep track of the tessellator domain in struct vsir_program.
2024-11-21 19:28:46 +01:00
1a6409cd5b
vkd3d-shader/hlsl: Add parser support for stream-output object types.
...
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com >
2024-11-21 19:28:46 +01:00
13dfccc1c6
vkd3d-shader/hlsl: Store SM4 resource stores in the vsir program.
2024-11-21 19:28:46 +01:00
5b4af411f5
vkd3d-shader/hlsl: Store SM4 loads in the vsir program.
2024-11-21 19:28:46 +01:00
874ca85a95
vkd3d-shader/hlsl: Store SM4 stores in the vsir program.
2024-11-21 19:28:46 +01:00
5dedcff665
vkd3d-shader/tpf: Remove HLSL_IR_SWIZZLE handling.
2024-11-21 19:28:46 +01:00
5df836c513
vkd3d-shader/hlsl: Store SM4 MOD in the vsir program.
2024-11-06 22:49:12 +01:00
30bc6965a2
vkd3d-shader/hlsl: Store SM4 DOT in the vsir program.
2024-11-06 22:48:13 +01:00
e8b373e3ff
vkd3d-shader/hlsl: Store SM4 DIV in the vsir program.
2024-11-06 22:47:42 +01:00
24f4308982
vkd3d-shader/hlsl: Store SM4 MUL in the vsir program.
2024-11-06 22:45:46 +01:00
e4d36bd855
vkd3d-shader/hlsl: Store SM4 SAT in the vsir program.
2024-11-06 22:45:23 +01:00
2e3f4a01bf
vkd3d-shader/hlsl: Store SM4 RCP in the vsir program.
2024-11-06 22:40:50 +01:00
3c4889add3
vkd3d-shader/hlsl: Store SM4 SIN and COS in the vsir program.
2024-11-06 22:38:04 +01:00
befba8e813
vkd3d-shader/hlsl: Store SM4 casts in the vsir program.
2024-11-06 22:27:49 +01:00
e5ba79b4f1
vkd3d-shader/hlsl: Implement the ByteAddressBuffer.Load*() methods.
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Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com >
2024-11-06 22:09:23 +01:00
90a07ada8e
vkd3d-shader/tpf: Use SCALAR swizzle dimension for RASTERIZER registers.
...
While we currently output instructions like this:
sampleinfo_uint r0.x, rasterizer.xxxx
> SAMPLE_INFO (111)
0 0000100[len:4] 0000000000001[1] 00001101111[opcode:111]
└─ 0 000[d3i:0] 000[d2i:0] 000[d1i:0] 01[idxs:1] 00000000[type:0] 0000[0] 0001[wmask:1] 00[swtype:0] 10[dim:2]
└─ 00000000000000000000000000000000[0|0.0]
└─ 0 000[d3i:0] 000[d2i:0] 000[d1i:0] 00[idxs:0] 00001110[type:14] 00000000[sw:0] 01[swtype:1] 10[dim:2]
FXC/d3dcompiler outputs instructions like this:
sampleinfo o0.x, rasterizer.x
> SAMPLE_INFO (111)
0 0000100[len:4] 0000000000000[0] 00001101111[opcode:111]
└─ 0 000[d3i:0] 000[d2i:0] 000[d1i:0] 01[idxs:1] 00000010[type:2] 0000[0] 0001[wmask:1] 00[swtype:0] 10[dim:2]
└─ 00000000000000000000000000000000[0|0.0]
└─ 0 000[d3i:0] 000[d2i:0] 000[d1i:0] 00[idxs:0] 00001110[type:14] 000000[0] 00[swcomp:0] 10[swtype:2] 10[dim:2]
Note the difference in swtype of the rasterizer src register.
2024-11-05 19:50:55 +01:00
950c381728
vkd3d-shader/hlsl: Store RASTERIZER_SAMPLE_COUNT in the vsir program.
...
Also, the profile check for GetRenderTargetSampleCount() is moved to
parse time.
2024-11-05 19:48:31 +01:00
