Nikolay Sivov
f525399545
vkd3d-shader/fx: Read instruction arguments in full before printing them.
...
The binary format stores destination argument after sources. Each
argument takes either 3 tokens or 5 tokens, when indexed. For simplicity
read them all first, and print destination first.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com >
2025-06-11 20:04:27 +02:00
Nikolay Sivov
d6a4084321
vkd3d-shader/fx: Use a version-neutral name for the opcode table.
...
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com >
2025-06-11 18:25:42 +02:00
Nikolay Sivov
47b9316a86
vkd3d-shader/fx: Give fxlvm-specific constants a version-neutral name.
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Those are reusable for fx_2_0 preshaders.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com >
2025-06-11 18:21:30 +02:00
Giovanni Mascellani
94cbb333f8
vkd3d-shader/dxil: Emit 16-bit ICB values as minimum precision registers.
2025-06-11 18:20:23 +02:00
Giovanni Mascellani
0b5a96d963
vkd3d-shader/dxil: Emit 16-bit SSA values as minimum precision registers.
2025-06-11 18:20:23 +02:00
Giovanni Mascellani
73940cde73
vkd3d-shader/dxil: Emit 16-bit IDXTEMP values as minimum precision registers.
2025-06-11 18:20:23 +02:00
Giovanni Mascellani
5e86d5c21b
vkd3d-shader/dxil: Emit 16-bit arrays as minimum precision types.
...
The type is not explicitly annotated as minimum precision, because
no backend currently cares about that bit anyway. We're still
relying on the fact that in SM 6.0 16-bit types are always
understood as minimum precision.
2025-06-11 18:20:20 +02:00
Giovanni Mascellani
1d780e1a6b
vkd3d-shader/dxil: Emit 16-bit CONSTANT values as minimum precision registers.
2025-06-11 18:10:12 +02:00
Henri Verbeet
14477b1066
demos: Allow Vulkan to determine the swapchain image count.
...
We currently always use 3. That's not a bad choice, but doesn't take the
minImageCount/maxImageCount of the Vulkan implementation into account.
2025-06-10 17:51:15 +02:00
Henri Verbeet
cea7b4e920
tests/shader_runner: Introduce the "f32" probe format.
2025-06-10 17:49:13 +02:00
Henri Verbeet
9c987e5a0b
tests/shader_runner: Introduce the "u32" probe format.
2025-06-10 17:48:19 +02:00
Henri Verbeet
95cf0a8b2c
tests/shader_runner: Introduce the "i32" probe format.
2025-06-10 17:47:32 +02:00
Henri Verbeet
73820756d1
tests/shader_runner: Introduce the "f64" probe format.
2025-06-10 17:46:51 +02:00
Henri Verbeet
b09e9159ba
tests/shader_runner: Introduce the "u64" probe format.
2025-06-10 17:46:51 +02:00
Henri Verbeet
261cdb0f29
tests/shader_runner: Rename the "ri64" probe format to "i64".
2025-06-10 17:46:51 +02:00
Henri Verbeet
7dfa9e8f81
vkd3d-shader/msl: Implement VKD3DSIH_DISCARD.
2025-06-10 17:45:06 +02:00
Henri Verbeet
f538085e41
vkd3d-shader/msl: Implement switches.
2025-06-10 17:45:06 +02:00
Henri Verbeet
79be1d3051
vkd3d-shader/msl: Implement loops.
2025-06-10 17:45:06 +02:00
Henri Verbeet
a570932b82
vkd3d-shader/msl: Implement VKD3DSIH_IMUL.
2025-06-10 17:45:06 +02:00
Henri Verbeet
a2eb3324d4
vkd3d-shader/msl: Implement VKD3DSIH_ILT.
2025-06-10 17:45:06 +02:00
Henri Verbeet
83ed825e5a
vkd3d-shader/ir: Use vsir_opcode_get_name() in vsir_program_lower_instructions().
2025-06-10 17:44:18 +02:00
Henri Verbeet
c8e6d35e17
vkd3d-shader/glsl: Use vsir_opcode_get_name() in shader_glsl_unhandled().
2025-06-10 17:44:18 +02:00
Henri Verbeet
66c0530a05
vkd3d-shader/d3dbc: Use vsir_opcode_get_name() in d3dbc_write_vsir_instruction().
2025-06-10 17:44:18 +02:00
Henri Verbeet
6a06929f6b
vkd3d-shader/d3dbc: Use vsir_opcode_get_name() in shader_sm1_get_opcode_info_from_vsir_instruction().
2025-06-10 17:44:18 +02:00
Henri Verbeet
1214359022
vkd3d-shader/ir: Introduce vsir_opcode_get_name().
2025-06-10 17:44:18 +02:00
