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https://gitlab.winehq.org/wine/vkd3d.git
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vkd3d-shader/tpf: Create a stub STAT section.
Signed-off-by: Nikolay Sivov <nsivov@codeweavers.com>
This commit is contained in:
parent
5df81049aa
commit
ec644b395b
Notes:
Henri Verbeet
2024-09-12 18:56:19 +02:00
Approved-by: Elizabeth Figura (@zfigura) Approved-by: Henri Verbeet (@hverbeet) Merge-Request: https://gitlab.winehq.org/wine/vkd3d/-/merge_requests/1056
@ -616,6 +616,20 @@ enum vkd3d_sm4_shader_data_type
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VKD3D_SM4_SHADER_DATA_MESSAGE = 0x4,
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VKD3D_SM4_SHADER_DATA_MESSAGE = 0x4,
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};
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};
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enum vkd3d_sm4_stat_field
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{
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VKD3D_STAT_UNUSED = 0,
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VKD3D_STAT_MOV,
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VKD3D_STAT_INSTR_COUNT,
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VKD3D_STAT_COUNT,
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};
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struct vkd3d_sm4_stat_field_info
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{
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enum vkd3d_sm4_opcode opcode;
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enum vkd3d_sm4_stat_field field;
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};
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struct sm4_index_range
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struct sm4_index_range
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{
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{
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unsigned int index;
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unsigned int index;
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@ -634,6 +648,7 @@ struct vkd3d_sm4_lookup_tables
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const struct vkd3d_sm4_opcode_info *opcode_info_from_sm4[VKD3D_SM4_OP_COUNT];
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const struct vkd3d_sm4_opcode_info *opcode_info_from_sm4[VKD3D_SM4_OP_COUNT];
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const struct vkd3d_sm4_register_type_info *register_type_info_from_sm4[VKD3D_SM4_REGISTER_TYPE_COUNT];
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const struct vkd3d_sm4_register_type_info *register_type_info_from_sm4[VKD3D_SM4_REGISTER_TYPE_COUNT];
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const struct vkd3d_sm4_register_type_info *register_type_info_from_vkd3d[VKD3DSPR_COUNT];
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const struct vkd3d_sm4_register_type_info *register_type_info_from_vkd3d[VKD3DSPR_COUNT];
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const struct vkd3d_sm4_stat_field_info *stat_field_from_sm4[VKD3D_SM4_OP_COUNT];
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};
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};
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struct vkd3d_shader_sm4_parser
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struct vkd3d_shader_sm4_parser
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@ -1330,11 +1345,17 @@ static const enum vkd3d_shader_register_precision register_precision_table[] =
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/* VKD3D_SM4_REGISTER_PRECISION_MIN_UINT_16 */ VKD3D_SHADER_REGISTER_PRECISION_MIN_UINT_16,
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/* VKD3D_SM4_REGISTER_PRECISION_MIN_UINT_16 */ VKD3D_SHADER_REGISTER_PRECISION_MIN_UINT_16,
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};
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};
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struct sm4_stat
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{
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uint32_t fields[VKD3D_STAT_COUNT];
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};
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struct tpf_writer
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struct tpf_writer
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{
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{
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struct hlsl_ctx *ctx;
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struct hlsl_ctx *ctx;
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struct vkd3d_bytecode_buffer *buffer;
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struct vkd3d_bytecode_buffer *buffer;
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struct vkd3d_sm4_lookup_tables lookup;
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struct vkd3d_sm4_lookup_tables lookup;
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struct sm4_stat *stat;
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};
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};
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static void init_sm4_lookup_tables(struct vkd3d_sm4_lookup_tables *lookup)
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static void init_sm4_lookup_tables(struct vkd3d_sm4_lookup_tables *lookup)
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@ -1662,6 +1683,11 @@ static void init_sm4_lookup_tables(struct vkd3d_sm4_lookup_tables *lookup)
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{VKD3D_SM5_RT_OUTPUT_STENCIL_REF, VKD3DSPR_OUTSTENCILREF, VKD3D_SM4_SWIZZLE_VEC4},
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{VKD3D_SM5_RT_OUTPUT_STENCIL_REF, VKD3DSPR_OUTSTENCILREF, VKD3D_SM4_SWIZZLE_VEC4},
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};
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};
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static const struct vkd3d_sm4_stat_field_info stat_field_table[] =
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{
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{VKD3D_SM4_OP_MOV, VKD3D_STAT_MOV},
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};
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memset(lookup, 0, sizeof(*lookup));
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memset(lookup, 0, sizeof(*lookup));
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for (i = 0; i < ARRAY_SIZE(opcode_table); ++i)
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for (i = 0; i < ARRAY_SIZE(opcode_table); ++i)
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@ -1678,12 +1704,21 @@ static void init_sm4_lookup_tables(struct vkd3d_sm4_lookup_tables *lookup)
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lookup->register_type_info_from_sm4[info->sm4_type] = info;
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lookup->register_type_info_from_sm4[info->sm4_type] = info;
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lookup->register_type_info_from_vkd3d[info->vkd3d_type] = info;
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lookup->register_type_info_from_vkd3d[info->vkd3d_type] = info;
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}
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}
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for (i = 0; i < ARRAY_SIZE(stat_field_table); ++i)
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{
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const struct vkd3d_sm4_stat_field_info *info = &stat_field_table[i];
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lookup->stat_field_from_sm4[info->opcode] = info;
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}
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}
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}
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static void tpf_writer_init(struct tpf_writer *tpf, struct hlsl_ctx *ctx, struct vkd3d_bytecode_buffer *buffer)
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static void tpf_writer_init(struct tpf_writer *tpf, struct hlsl_ctx *ctx, struct sm4_stat *stat,
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struct vkd3d_bytecode_buffer *buffer)
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{
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{
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tpf->ctx = ctx;
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tpf->ctx = ctx;
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tpf->buffer = buffer;
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tpf->buffer = buffer;
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tpf->stat = stat;
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init_sm4_lookup_tables(&tpf->lookup);
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init_sm4_lookup_tables(&tpf->lookup);
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}
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}
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@ -1721,6 +1756,16 @@ static enum vkd3d_sm4_swizzle_type vkd3d_sm4_get_default_swizzle_type(
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return register_type_info->default_src_swizzle_type;
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return register_type_info->default_src_swizzle_type;
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}
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}
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static enum vkd3d_sm4_stat_field get_stat_field_from_sm4_opcode(
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const struct vkd3d_sm4_lookup_tables *lookup, enum vkd3d_sm4_opcode sm4_opcode)
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{
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const struct vkd3d_sm4_stat_field_info *field_info;
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if (sm4_opcode >= VKD3D_SM4_OP_COUNT || !(field_info = lookup->stat_field_from_sm4[sm4_opcode]))
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return VKD3D_STAT_UNUSED;
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return field_info->field;
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}
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static enum vkd3d_data_type map_data_type(char t)
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static enum vkd3d_data_type map_data_type(char t)
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{
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{
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switch (t)
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switch (t)
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@ -4187,6 +4232,7 @@ static void write_sm4_instruction(const struct tpf_writer *tpf, const struct sm4
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{
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{
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struct vkd3d_bytecode_buffer *buffer = tpf->buffer;
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struct vkd3d_bytecode_buffer *buffer = tpf->buffer;
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uint32_t token = instr->opcode | instr->extra_bits;
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uint32_t token = instr->opcode | instr->extra_bits;
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enum vkd3d_sm4_stat_field stat_field;
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unsigned int size, i, j;
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unsigned int size, i, j;
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size_t token_position;
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size_t token_position;
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@ -4219,6 +4265,11 @@ static void write_sm4_instruction(const struct tpf_writer *tpf, const struct sm4
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size = (bytecode_get_size(buffer) - token_position) / sizeof(uint32_t);
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size = (bytecode_get_size(buffer) - token_position) / sizeof(uint32_t);
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token |= (size << VKD3D_SM4_INSTRUCTION_LENGTH_SHIFT);
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token |= (size << VKD3D_SM4_INSTRUCTION_LENGTH_SHIFT);
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set_u32(buffer, token_position, token);
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set_u32(buffer, token_position, token);
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++tpf->stat->fields[VKD3D_STAT_INSTR_COUNT];
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stat_field = get_stat_field_from_sm4_opcode(&tpf->lookup, instr->opcode & VKD3D_SM4_OPCODE_MASK);
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++tpf->stat->fields[stat_field];
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}
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}
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static bool encode_texel_offset_as_aoffimmi(struct sm4_instruction *instr,
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static bool encode_texel_offset_as_aoffimmi(struct sm4_instruction *instr,
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@ -6017,8 +6068,8 @@ static void write_sm4_block(const struct tpf_writer *tpf, const struct hlsl_bloc
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}
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}
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}
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}
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static void write_sm4_shdr(struct hlsl_ctx *ctx,
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static void write_sm4_shdr(struct hlsl_ctx *ctx, const struct hlsl_ir_function_decl *entry_func,
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const struct hlsl_ir_function_decl *entry_func, struct dxbc_writer *dxbc)
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struct sm4_stat *stat, struct dxbc_writer *dxbc)
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{
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{
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const struct hlsl_profile_info *profile = ctx->profile;
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const struct hlsl_profile_info *profile = ctx->profile;
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struct vkd3d_bytecode_buffer buffer = {0};
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struct vkd3d_bytecode_buffer buffer = {0};
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@ -6043,7 +6094,7 @@ static void write_sm4_shdr(struct hlsl_ctx *ctx,
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VKD3D_SM4_LIB,
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VKD3D_SM4_LIB,
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};
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};
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tpf_writer_init(&tpf, ctx, &buffer);
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tpf_writer_init(&tpf, ctx, stat, &buffer);
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extern_resources = sm4_get_extern_resources(ctx, &extern_resources_count);
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extern_resources = sm4_get_extern_resources(ctx, &extern_resources_count);
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@ -6135,8 +6186,58 @@ static void write_sm4_sfi0(struct hlsl_ctx *ctx, struct dxbc_writer *dxbc)
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vkd3d_free(flags);
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vkd3d_free(flags);
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}
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}
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static void write_sm4_stat(struct hlsl_ctx *ctx, const struct sm4_stat *stat, struct dxbc_writer *dxbc)
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{
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struct vkd3d_bytecode_buffer buffer = {0};
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put_u32(&buffer, stat->fields[VKD3D_STAT_INSTR_COUNT]);
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put_u32(&buffer, 0); /* Temp count */
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put_u32(&buffer, 0); /* Def count */
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put_u32(&buffer, 0); /* DCL count */
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put_u32(&buffer, 0); /* Float instruction count */
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put_u32(&buffer, 0); /* Int instruction count */
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put_u32(&buffer, 0); /* Uint instruction count */
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put_u32(&buffer, 0); /* Static flow control count */
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put_u32(&buffer, 0); /* Dynamic flow control count */
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put_u32(&buffer, 0); /* Macro instruction count */
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put_u32(&buffer, 0); /* Temp array count */
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put_u32(&buffer, 0); /* Array instr count */
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put_u32(&buffer, 0); /* Cut instr count */
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put_u32(&buffer, 0); /* Emit instr count */
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put_u32(&buffer, 0); /* Texture instructions */
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put_u32(&buffer, 0); /* Texture load instructions */
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put_u32(&buffer, 0); /* Texture comparison instructions */
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put_u32(&buffer, 0); /* Texture bias instructions */
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put_u32(&buffer, 0); /* Texture gradient instructions */
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put_u32(&buffer, stat->fields[VKD3D_STAT_MOV]);
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put_u32(&buffer, 0); /* MOVC instructions */
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put_u32(&buffer, 0); /* Conversion instructions */
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put_u32(&buffer, 0); /* Bitwise instructions */
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put_u32(&buffer, 0); /* Input primitive */
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put_u32(&buffer, 0); /* GS output topology */
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put_u32(&buffer, 0); /* GS max output vertex count */
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put_u32(&buffer, 0); /* Unknown */
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put_u32(&buffer, 0); /* Unknown */
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put_u32(&buffer, 0); /* Sample frequency */
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if (hlsl_version_ge(ctx, 5, 0))
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{
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put_u32(&buffer, 0); /* GS instance count */
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put_u32(&buffer, 0); /* Control point count */
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put_u32(&buffer, 0); /* HS output primitive */
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put_u32(&buffer, 0); /* HS partitioning */
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put_u32(&buffer, 0); /* Tessellator domain */
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put_u32(&buffer, 0); /* Barrier instructions */
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put_u32(&buffer, 0); /* Interlocked instructions */
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put_u32(&buffer, 0); /* UAV store instructions */
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}
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add_section(ctx, dxbc, TAG_STAT, &buffer);
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}
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int hlsl_sm4_write(struct hlsl_ctx *ctx, struct hlsl_ir_function_decl *entry_func, struct vkd3d_shader_code *out)
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int hlsl_sm4_write(struct hlsl_ctx *ctx, struct hlsl_ir_function_decl *entry_func, struct vkd3d_shader_code *out)
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{
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{
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struct sm4_stat stat = {0};
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struct dxbc_writer dxbc;
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struct dxbc_writer dxbc;
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size_t i;
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size_t i;
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int ret;
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int ret;
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@ -6146,8 +6247,9 @@ int hlsl_sm4_write(struct hlsl_ctx *ctx, struct hlsl_ir_function_decl *entry_fun
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write_sm4_signature(ctx, &dxbc, false);
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write_sm4_signature(ctx, &dxbc, false);
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write_sm4_signature(ctx, &dxbc, true);
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write_sm4_signature(ctx, &dxbc, true);
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write_sm4_rdef(ctx, &dxbc);
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write_sm4_rdef(ctx, &dxbc);
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write_sm4_shdr(ctx, entry_func, &dxbc);
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write_sm4_shdr(ctx, entry_func, &stat, &dxbc);
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write_sm4_sfi0(ctx, &dxbc);
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write_sm4_sfi0(ctx, &dxbc);
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write_sm4_stat(ctx, &stat, &dxbc);
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if (!(ret = ctx->result))
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if (!(ret = ctx->result))
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ret = dxbc_writer_write(&dxbc, out);
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ret = dxbc_writer_write(&dxbc, out);
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@ -1877,7 +1877,7 @@ static inline void *vkd3d_find_struct_(const struct vkd3d_struct *chain,
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#define VKD3D_DXBC_HEADER_SIZE (8 * sizeof(uint32_t))
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#define VKD3D_DXBC_HEADER_SIZE (8 * sizeof(uint32_t))
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#define VKD3D_DXBC_CHUNK_ALIGNMENT sizeof(uint32_t)
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#define VKD3D_DXBC_CHUNK_ALIGNMENT sizeof(uint32_t)
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#define DXBC_MAX_SECTION_COUNT 5
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#define DXBC_MAX_SECTION_COUNT 6
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struct dxbc_writer
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struct dxbc_writer
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{
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{
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