From ea90f7ae2e872436683523a01ef42b6e7ef0486f Mon Sep 17 00:00:00 2001 From: Henri Verbeet Date: Tue, 2 Sep 2025 15:47:03 +0200 Subject: [PATCH] vkd3d-shader/dxil: Emit 16-bit indexable temporaries as 32-bit registers. Unless the "native low precision" flag is enabled. vkd3d_component_type_from_data_type() currently ends up doing this mapping for us in the SPIR-V backend, but that's about to go away. --- libs/vkd3d-shader/dxil.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/libs/vkd3d-shader/dxil.c b/libs/vkd3d-shader/dxil.c index 1678128da..fb2cde450 100644 --- a/libs/vkd3d-shader/dxil.c +++ b/libs/vkd3d-shader/dxil.c @@ -3698,6 +3698,14 @@ static void sm6_parser_declare_indexable_temp(struct sm6_parser *sm6, const stru { enum vsir_data_type data_type = vsir_data_type_from_dxil(elem_type, sm6); + if (!(sm6->program->global_flags & VKD3DSGF_FORCE_NATIVE_LOW_PRECISION)) + { + if (data_type == VSIR_DATA_F16) + data_type = VSIR_DATA_F32; + else if (data_type == VSIR_DATA_U16) + data_type = VSIR_DATA_U32; + } + if (ins) vsir_instruction_init(ins, &sm6->p.location, VSIR_OP_DCL_INDEXABLE_TEMP); else